From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f169.google.com (mail-pl1-f169.google.com [209.85.214.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2BCB112DBB for ; Thu, 10 Nov 2022 13:05:54 +0000 (UTC) Received: by mail-pl1-f169.google.com with SMTP id d20so1334975plr.10 for ; Thu, 10 Nov 2022 05:05:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=lrV3scjxXBUgyRehk9/on/q8TxNDq8MdTdotV2WeMBQ=; b=GVZ09h+ngHWOecbTC/uzghXW93HVi79Hc3aHUMBuHut0K+MRP4qjrmbxOsy9wAvyhh CzAf4wAUsz2LX8ScnTSnBYBlU0zD4SfZXHjTGLx4odMNe2HTZmWoc8/O0MjERSTJDuKQ 9UeL9YNFV2iAuj4M769TxWHJzx0wEKM1UD/fL8Quarzgi8/jAHx03TmKPyEcNniVs1JP E1bQ9YyT5yBnS4K6hTH0QDyjNMb9vjtJqKa6/m2IeBhMmf0jPp66hTlfQCyxBUHnorSo 4QxzB8BVVnzEGtFh63S81NhnvCx7MGrBaQEPEUdQo8KV1MCY/puvxsLONjSQ8GgFephe xQuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=lrV3scjxXBUgyRehk9/on/q8TxNDq8MdTdotV2WeMBQ=; b=Tr1YemO2S5uzJzCzdO5GlKLWcwCWv/0Rl3XlzE8zMlBRQOUo/cWrp8npgb3rqf1Jou 3ohjcfvAF3UNO9kg6B7ArW0cWy/nmo1ljACd3R9j1c0bdIZj3hMWonXo+z4Lg9Jjz2nC yk1sS62yZoOLmW8EakUopXAokwNoORSoxDEuZP4DBDzRdYdxDg/2Q/QkhbA9VKyLBP77 l8UWDbecvfo/UkV/e5AySsPMLvPKnaL3zTBCEatBINSrAhpGtQIez+yVMu+qJd7gSBoA NmjQi+tGFP8JRcAMipLng3nzU8MB26kGjfXHgkdXSC4i6Ass72ydLixP/jqQtwHOxDSk 83wg== X-Gm-Message-State: ACrzQf15fipuhVdxOdhdVJsAI/AL1Gp3n+R3PCfg91IqSa5op5wemVEF sjsTTsJta9wwKuI4frzC9+DS82toYphvbnf8stOovQ== X-Google-Smtp-Source: AMsMyM4ntafpxKu1kZoVYdCyuwK4y2qgGm0PDcBHChl8r8c0pj7m0JmQ6SHmodBY/Un25AY0R73awNrQX1GtCyrtwGQ= X-Received: by 2002:a17:903:100c:b0:186:63a1:3b5d with SMTP id a12-20020a170903100c00b0018663a13b5dmr65965693plb.148.1668085553525; Thu, 10 Nov 2022 05:05:53 -0800 (PST) Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech> In-Reply-To: From: Ulf Hansson Date: Thu, 10 Nov 2022 14:05:16 +0100 Message-ID: Subject: Re: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook To: Linus Walleij Cc: Maxime Ripard , Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , David Lechner , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven , linux-stm32@st-md-mailman.stormreply.com, alsa-devel@alsa-project.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-mips@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, AngeloGioacchino Del Regno , patches@opensource.cirrus.com, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Content-Type: text/plain; charset="UTF-8" On Thu, 10 Nov 2022 at 12:39, Linus Walleij wrote: > > On Thu, Nov 10, 2022 at 12:29 PM Ulf Hansson wrote: > > On Fri, 4 Nov 2022 at 14:32, Maxime Ripard wrote: > > > > > > The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent > > > hook, but doesn't provide a determine_rate implementation. > > > > > > This is a bit odd, since set_parent() is there to, as its name implies, > > > change the parent of a clock. However, the most likely candidate to > > > trigger that parent change is a call to clk_set_rate(), with > > > determine_rate() figuring out which parent is the best suited for a > > > given rate. > > > > > > The other trigger would be a call to clk_set_parent(), but it's far less > > > used, and it doesn't look like there's any obvious user for that clock. > > > > If I recall correctly, that is the use case we did target for these > > types of clocks. See sound/soc/ux500/ux500_ab85xx.c, for example. > > Hm I am trying to get that driver to work ... from time to time. > It's just that ALSA SoC DT has changed to much that it turns out > into a complete rewrite :/ > > So in sound/soc/ux500/mop500_ab8500.c > I see this: > > status = clk_set_parent(drvdata->clk_ptr_intclk, clk_ptr); > if (status) > (...) > > and there is elaborate code to switch between "SYSCLK" and > "ULPCLK" (ulta-low power clock). Just like you say... however > a clock named SYSCLK or ULPCLK does not appear in the > code in drivers/clk/ux500 or any DT bindings so... it seems to > be non-working for the time being. It's definitely not working, but the corresponding clocks ("ulpclk", "intclk", "audioclk", etc) are being registered in ab8500_reg_clks(). What seems to be missing is a DT conversion for these clocks, so they can be consumed properly. Right? Kind regards Uffe From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3A62CC4321E for ; Thu, 10 Nov 2022 13:05:59 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 93D6B10E797; Thu, 10 Nov 2022 13:05:57 +0000 (UTC) Received: from mail-pj1-x1034.google.com (mail-pj1-x1034.google.com [IPv6:2607:f8b0:4864:20::1034]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0085010E797 for ; Thu, 10 Nov 2022 13:05:53 +0000 (UTC) Received: by mail-pj1-x1034.google.com with SMTP id c15-20020a17090a1d0f00b0021365864446so1456703pjd.4 for ; Thu, 10 Nov 2022 05:05:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=lrV3scjxXBUgyRehk9/on/q8TxNDq8MdTdotV2WeMBQ=; b=GVZ09h+ngHWOecbTC/uzghXW93HVi79Hc3aHUMBuHut0K+MRP4qjrmbxOsy9wAvyhh CzAf4wAUsz2LX8ScnTSnBYBlU0zD4SfZXHjTGLx4odMNe2HTZmWoc8/O0MjERSTJDuKQ 9UeL9YNFV2iAuj4M769TxWHJzx0wEKM1UD/fL8Quarzgi8/jAHx03TmKPyEcNniVs1JP E1bQ9YyT5yBnS4K6hTH0QDyjNMb9vjtJqKa6/m2IeBhMmf0jPp66hTlfQCyxBUHnorSo 4QxzB8BVVnzEGtFh63S81NhnvCx7MGrBaQEPEUdQo8KV1MCY/puvxsLONjSQ8GgFephe xQuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=lrV3scjxXBUgyRehk9/on/q8TxNDq8MdTdotV2WeMBQ=; b=hCnErJym/KHwLgsCMO2duFROkmKTCT4AupFnmYRAUqb9BKJe+CqcZi5S4NNozSsJHl yD3WgYZ38X8jm4LWWxPY5xLulvUjzhnKqMbHXhKlBWU3Cp9Ha0XYXLYlB5Cs0UNNXKaq lvHfL1e114VHKQD9O5kzm1qbxwXXv3nKa7TYeH8Az8Xf7e1dA2QK/dIdFdCOiuU56N0w KoTSa0PIUbyXPDNjrIS0MfSpBKzFjICJ/HgGK+o3J9SWWKRpNkVbcjLIjUExp7XrurJX HleCNZXPCSWuXCaXnwCpBhCtzucSXH9c5hgBbN+0vZpTbEfac5m8hn3BjbZjyFTV4Za7 KNEQ== X-Gm-Message-State: ACrzQf1tshGcYnvak2Y818s3+TSY6dmCSP/f8KVuG6UuvtgvgN1vI1Rc /itS6LRH7xNGhxTipCshZdkq9PNCZguOjtk41CQQ1A== X-Google-Smtp-Source: AMsMyM4ntafpxKu1kZoVYdCyuwK4y2qgGm0PDcBHChl8r8c0pj7m0JmQ6SHmodBY/Un25AY0R73awNrQX1GtCyrtwGQ= X-Received: by 2002:a17:903:100c:b0:186:63a1:3b5d with SMTP id a12-20020a170903100c00b0018663a13b5dmr65965693plb.148.1668085553525; Thu, 10 Nov 2022 05:05:53 -0800 (PST) MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech> In-Reply-To: From: Ulf Hansson Date: Thu, 10 Nov 2022 14:05:16 +0100 Message-ID: Subject: Re: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook To: Linus Walleij Content-Type: text/plain; charset="UTF-8" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Belloni , Prashant Gaikwad , Geert Uytterhoeven , Liam Girdwood , Michael Turquette , Sekhar Nori , Alexandre Torgue , dri-devel@lists.freedesktop.org, Jaroslav Kysela , Paul Cercueil , Max Filippov , Thierry Reding , linux-phy@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Abel Vesa , Kishon Vijay Abraham I , Samuel Holland , Chunyan Zhang , Takashi Iwai , linux-tegra@vger.kernel.org, Jernej Skrabec , Jonathan Hunter , Chen-Yu Tsai , NXP Linux Team , Orson Zhai , linux-mips@vger.kernel.org, Luca Ceresoli , linux-sunxi@lists.linux.dev, linux-rtc@vger.kernel.org, linux-clk@vger.kernel.org, Charles Keepax , alsa-devel@alsa-project.org, Manivannan Sadhasivam , linux-kernel@vger.kernel.org, Sascha Hauer , linux-actions@lists.infradead.org, Richard Fitzgerald , Mark Brown , linux-mediatek@lists.infradead.org, Maxime Ripard , Baolin Wang , Matthias Brugger , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , Alessandro Zummo , Stephen Boyd , patches@opensource.cirrus.com, Peter De Schrijver , Nicolas Ferre , =?UTF-8?Q?Andreas_F=C3=A4rber?= , linux-renesas-soc@vger.kernel.org, Dinh Nguyen , Vinod Koul , Maxime Coquelin , David Lechner , Shawn Guo , Claudiu Beznea Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Thu, 10 Nov 2022 at 12:39, Linus Walleij wrote: > > On Thu, Nov 10, 2022 at 12:29 PM Ulf Hansson wrote: > > On Fri, 4 Nov 2022 at 14:32, Maxime Ripard wrote: > > > > > > The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent > > > hook, but doesn't provide a determine_rate implementation. > > > > > > This is a bit odd, since set_parent() is there to, as its name implies, > > > change the parent of a clock. However, the most likely candidate to > > > trigger that parent change is a call to clk_set_rate(), with > > > determine_rate() figuring out which parent is the best suited for a > > > given rate. > > > > > > The other trigger would be a call to clk_set_parent(), but it's far less > > > used, and it doesn't look like there's any obvious user for that clock. > > > > If I recall correctly, that is the use case we did target for these > > types of clocks. See sound/soc/ux500/ux500_ab85xx.c, for example. > > Hm I am trying to get that driver to work ... from time to time. > It's just that ALSA SoC DT has changed to much that it turns out > into a complete rewrite :/ > > So in sound/soc/ux500/mop500_ab8500.c > I see this: > > status = clk_set_parent(drvdata->clk_ptr_intclk, clk_ptr); > if (status) > (...) > > and there is elaborate code to switch between "SYSCLK" and > "ULPCLK" (ulta-low power clock). Just like you say... however > a clock named SYSCLK or ULPCLK does not appear in the > code in drivers/clk/ux500 or any DT bindings so... it seems to > be non-working for the time being. It's definitely not working, but the corresponding clocks ("ulpclk", "intclk", "audioclk", etc) are being registered in ab8500_reg_clks(). What seems to be missing is a DT conversion for these clocks, so they can be consumed properly. Right? Kind regards Uffe From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44BB8C433FE for ; Thu, 10 Nov 2022 13:06:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:Subject:Message-ID:Date:From: In-Reply-To:References:MIME-Version:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tUPzEXHhzrst40bafuaAtJNMJKKSRPRpURbct4mkFDs=; b=mV/vp+2KNv4r9x z7IoP9d8qp/13fdAJmT35S5JjC18GrsnFnKbr8LU5nRHBabpQNhCYDjLW5izgDPQmCp/aTSJ+2PNW DZxhbzWPgLV0qkR4SkHq/puYsXvbuY9l/XtjTVEgawfd0YM10gPtowUZnYqXuqcaFW8+6x8FBYZ9e XQ5R89KrTEq84UScRdaPoDbhB89WVN8uUWhK2XVte27xGhFn7dgW0CeOYlZGjsxHoqedAKcRs/7Ek 8tG9++kuW3Zbi84xRTSYN47Qd7L7zeiA4sEiL6AYwfsg9UnDYFzc5ukWD4NmOvWkuAe27Da/Q8b/g epQEGC8i7n9SDh5AiQWA==; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=lrV3scjxXBUgyRehk9/on/q8TxNDq8MdTdotV2WeMBQ=; b=V3e9RwLRSaNSsuAls955cAq0ZfHw2Y7Mcnqz+MyOl0ObyyafVB5Tga0r9aAWOojNTa lSogBU/JsG964hW/Exk9FdFvOx4YyLRbz1o6zNtz9gQiBQ+z8OcTMEboXzNj6xbgng3q 1pR9s5aZ+CUAfr0FSl/rVIfhpxHUF0a+LmcsVUy3gZgFYxcAIyPj27v/9paYKTZzauBb mSwGYwtzsfbSZySPnTn5cDy/s3AoXLdsJDxKH+rs6iTexF5Wjb+ndBYo2vPuhmjnpEj1 vNaI8c4GSSUjZhu8yWXlKiMRYdB+4DGLpt976v/UgKBt7PKHdX0imjKWrYDOcWmtqI7X p5mA== X-Gm-Message-State: ACrzQf3x4JX2PmISE6ZfLmqACRbyx7YN1ZMJ6awD8ACtJ6CuaIdBKblI pwwyuWjtK7QHdUJ3D+zouelVkkMFjk9xHba/x0rNLw== X-Google-Smtp-Source: AMsMyM4ntafpxKu1kZoVYdCyuwK4y2qgGm0PDcBHChl8r8c0pj7m0JmQ6SHmodBY/Un25AY0R73awNrQX1GtCyrtwGQ= X-Received: by 2002:a17:903:100c:b0:186:63a1:3b5d with SMTP id a12-20020a170903100c00b0018663a13b5dmr65965693plb.148.1668085553525; Thu, 10 Nov 2022 05:05:53 -0800 (PST) MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech> In-Reply-To: From: Ulf Hansson Date: Thu, 10 Nov 2022 14:05:16 +0100 Message-ID: Subject: Re: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook To: Linus Walleij Cc: Maxime Ripard , Stephen Boyd , Maxime Coquelin , Chen-Yu Tsai , Daniel Vetter , Nicolas Ferre , Thierry Reding , Jaroslav Kysela , Shawn Guo , Fabio Estevam , Claudiu Beznea , Michael Turquette , Dinh Nguyen , Paul Cercueil , Chunyan Zhang , Manivannan Sadhasivam , =?UTF-8?Q?Andreas_F=C3=A4rber?= , Jonathan Hunter , Abel Vesa , Charles Keepax , Alessandro Zummo , Peter De Schrijver , Orson Zhai , Alexandre Torgue , Prashant Gaikwad , Liam Girdwood , Alexandre Belloni , Samuel Holland , Matthias Brugger , Richard Fitzgerald , Vinod Koul , NXP Linux Team , Sekhar Nori , Kishon Vijay Abraham I , Takashi Iwai , David Airlie , Luca Ceresoli , Jernej Skrabec , Pengutronix Kernel Team , Baolin Wang , David Lechner , Sascha Hauer , Mark Brown , Max Filippov , Geert Uytterhoeven , linux-stm32@st-md-mailman.stormreply.com, alsa-devel@alsa-project.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, linux-mips@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-actions@lists.infradead.org, linux-clk@vger.kernel.org, AngeloGioacchino Del Regno , patches@opensource.cirrus.com, linux-tegra@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221110_050555_642768_83814142 X-CRM114-Status: GOOD ( 27.89 ) X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org On Thu, 10 Nov 2022 at 12:39, Linus Walleij wrote: > > On Thu, Nov 10, 2022 at 12:29 PM Ulf Hansson wrote: > > On Fri, 4 Nov 2022 at 14:32, Maxime Ripard wrote: > > > > > > The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent > > > hook, but doesn't provide a determine_rate implementation. > > > > > > This is a bit odd, since set_parent() is there to, as its name implies, > > > change the parent of a clock. However, the most likely candidate to > > > trigger that parent change is a call to clk_set_rate(), with > > > determine_rate() figuring out which parent is the best suited for a > > > given rate. > > > > > > The other trigger would be a call to clk_set_parent(), but it's far less > > > used, and it doesn't look like there's any obvious user for that clock. > > > > If I recall correctly, that is the use case we did target for these > > types of clocks. See sound/soc/ux500/ux500_ab85xx.c, for example. > > Hm I am trying to get that driver to work ... from time to time. > It's just that ALSA SoC DT has changed to much that it turns out > into a complete rewrite :/ > > So in sound/soc/ux500/mop500_ab8500.c > I see this: > > status = clk_set_parent(drvdata->clk_ptr_intclk, clk_ptr); > if (status) > (...) > > and there is elaborate code to switch between "SYSCLK" and > "ULPCLK" (ulta-low power clock). Just like you say... however > a clock named SYSCLK or ULPCLK does not appear in the > code in drivers/clk/ux500 or any DT bindings so... it seems to > be non-working for the time being. It's definitely not working, but the corresponding clocks ("ulpclk", "intclk", "audioclk", etc) are being registered in ab8500_reg_clks(). What seems to be missing is a DT conversion for these clocks, so they can be consumed properly. Right? Kind regards Uffe -- linux-phy mailing list linux-phy@lists.infradead.org https://lists.infradead.org/mailman/listinfo/linux-phy From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56CC7C43219 for ; Thu, 10 Nov 2022 19:08:04 +0000 (UTC) Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 65344166F; Thu, 10 Nov 2022 20:07:12 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 65344166F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1668107282; bh=KNIdyjTIHwogLXoD9QnV1UUSP3xbQbBiVNa+Zt4tGqw=; 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Thu, 10 Nov 2022 05:05:53 -0800 (PST) MIME-Version: 1.0 References: <20221018-clk-range-checks-fixes-v2-0-f6736dec138e@cerno.tech> <20221018-clk-range-checks-fixes-v2-35-f6736dec138e@cerno.tech> In-Reply-To: From: Ulf Hansson Date: Thu, 10 Nov 2022 14:05:16 +0100 Message-ID: Subject: Re: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook To: Linus Walleij Content-Type: text/plain; charset="UTF-8" X-Mailman-Approved-At: Thu, 10 Nov 2022 20:06:20 +0100 Cc: Alexandre Belloni , Prashant Gaikwad , Geert Uytterhoeven , Liam Girdwood , Michael Turquette , Sekhar Nori , Alexandre Torgue , dri-devel@lists.freedesktop.org, Paul Cercueil , Max Filippov , Thierry Reding , linux-phy@lists.infradead.org, David Airlie , Fabio Estevam , linux-stm32@st-md-mailman.stormreply.com, Abel Vesa , Kishon Vijay Abraham I , Samuel Holland , Chunyan Zhang , Takashi Iwai , linux-tegra@vger.kernel.org, Jernej Skrabec , Jonathan Hunter , Chen-Yu Tsai , NXP Linux Team , Orson Zhai , linux-mips@vger.kernel.org, Luca Ceresoli , linux-sunxi@lists.linux.dev, linux-rtc@vger.kernel.org, linux-clk@vger.kernel.org, Charles Keepax , Daniel Vetter , alsa-devel@alsa-project.org, Manivannan Sadhasivam , linux-kernel@vger.kernel.org, Sascha Hauer , linux-actions@lists.infradead.org, Richard Fitzgerald , Mark Brown , linux-mediatek@lists.infradead.org, Maxime Ripard , Baolin Wang , Matthias Brugger , Pengutronix Kernel Team , linux-arm-kernel@lists.infradead.org, AngeloGioacchino Del Regno , Alessandro Zummo , Stephen Boyd , patches@opensource.cirrus.com, Peter De Schrijver , Nicolas Ferre , =?UTF-8?Q?Andreas_F=C3=A4rber?= , linux-renesas-soc@vger.kernel.org, Dinh Nguyen , Vinod Koul , Maxime Coquelin , David Lechner , Shawn Guo , Claudiu Beznea X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" On Thu, 10 Nov 2022 at 12:39, Linus Walleij wrote: > > On Thu, Nov 10, 2022 at 12:29 PM Ulf Hansson wrote: > > On Fri, 4 Nov 2022 at 14:32, Maxime Ripard wrote: > > > > > > The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent > > > hook, but doesn't provide a determine_rate implementation. > > > > > > This is a bit odd, since set_parent() is there to, as its name implies, > > > change the parent of a clock. However, the most likely candidate to > > > trigger that parent change is a call to clk_set_rate(), with > > > determine_rate() figuring out which parent is the best suited for a > > > given rate. > > > > > > The other trigger would be a call to clk_set_parent(), but it's far less > > > used, and it doesn't look like there's any obvious user for that clock. > > > > If I recall correctly, that is the use case we did target for these > > types of clocks. See sound/soc/ux500/ux500_ab85xx.c, for example. > > Hm I am trying to get that driver to work ... from time to time. > It's just that ALSA SoC DT has changed to much that it turns out > into a complete rewrite :/ > > So in sound/soc/ux500/mop500_ab8500.c > I see this: > > status = clk_set_parent(drvdata->clk_ptr_intclk, clk_ptr); > if (status) > (...) > > and there is elaborate code to switch between "SYSCLK" and > "ULPCLK" (ulta-low power clock). Just like you say... however > a clock named SYSCLK or ULPCLK does not appear in the > code in drivers/clk/ux500 or any DT bindings so... it seems to > be non-working for the time being. It's definitely not working, but the corresponding clocks ("ulpclk", "intclk", "audioclk", etc) are being registered in ab8500_reg_clks(). What seems to be missing is a DT conversion for these clocks, so they can be consumed properly. Right? Kind regards Uffe