From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08AB5C433E1 for ; Tue, 2 Jun 2020 15:02:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CBF3C20772 for ; Tue, 2 Jun 2020 15:02:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="rcV8xvqQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728123AbgFBPCr (ORCPT ); Tue, 2 Jun 2020 11:02:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726174AbgFBPCq (ORCPT ); Tue, 2 Jun 2020 11:02:46 -0400 Received: from mail-wm1-x342.google.com (mail-wm1-x342.google.com [IPv6:2a00:1450:4864:20::342]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 52642C08C5C0 for ; Tue, 2 Jun 2020 08:02:46 -0700 (PDT) Received: by mail-wm1-x342.google.com with SMTP id f5so3472900wmh.2 for ; Tue, 02 Jun 2020 08:02:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Ie4XwPUUWuHUs6FpQc71seJRalOxPBnrHjEeZHur870=; b=rcV8xvqQ9pPbeXXUaiQ/IjScOQcZmPZgnBs587oPVmCd3+x1Ol79xSWBWAkedejyog avM37VtRjXAmg1llx2WbnE0Bc2LRYohlI/hp6EaqXOo5OlFJ6HREm4XxCFvpA3MYRoeE 4v4sIWbUUqGgKydRX315TGSREnqTA8r57cXrvVxcWngHLMpdtFVSiuCKeaWv+2IG8Jk3 FyA2tUj1kGPE99oxoNNjsIPXVPxdUShKlY5qjAiV4ZR5Ug6LI0ay8NpiPNSHr3VTuk4n iCBZEeEYjuryK4ouCKVKYCfPkxG4uUHEYu67H+aEf1AFloavvIhZVSzJtXN+0E/wH7Wv MjRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Ie4XwPUUWuHUs6FpQc71seJRalOxPBnrHjEeZHur870=; b=fw3StN0NG1LM7yUMthKquHjZLlIo6vA3mj5IIQ4c3cQiE7brd24gSinvyqty/xdngb WaZG3AczJvahwuMR4WwpCiqIpiTfH3CjiS2J2QSEWWlescPYQf01RyngkzAZA0UKaZWX 6eBoQOyNDSl+p5Hr2jlrahRr4K2Y1adTQ8/uTSKB1R1kgSW1z1O6DWGPVRfqB6EmoFxc T6er+wDHS+21za2XO8Z2h9xpPj2XG9v1J/uVsjoXmKQnKNrzSRlGGMJlboe0CtC5qemX Go3UaaxSrD78wnMLHWQv0yMPeN3h7ntyj6gFuPgPNimV7rJ1jSlNiDDSK4GEt39lZVg7 xsgA== X-Gm-Message-State: AOAM531hFT7MByOOpZ+uGh+/iq8auF0gV/fYCqR2uEel4R/5bkNrjCfd ALoHVC1zkM3mUIvKuJeeWDRQ4xDOo65Qfy1QK+8V8dkl X-Google-Smtp-Source: ABdhPJw+qlivYu2F8CIkQRiCrVBEGIQXfJye4OGlUJ/N4SBalG1P/TzpCkBTffuFw04vbpL4M63++mj+iMJssStM1iQ= X-Received: by 2002:a7b:c186:: with SMTP id y6mr4835128wmi.82.1591110165044; Tue, 02 Jun 2020 08:02:45 -0700 (PDT) MIME-Version: 1.0 References: <20200602141228.7zbkob7bw3owajsq@gilmour> In-Reply-To: <20200602141228.7zbkob7bw3owajsq@gilmour> From: Dave Stevenson Date: Tue, 2 Jun 2020 16:02:28 +0100 Message-ID: Subject: Re: [PATCH v3 032/105] drm/vc4: crtc: Enable and disable the PV in atomic_enable / disable To: Maxime Ripard Cc: Eric Anholt , Nicolas Saenz Julienne , DRI Development , linux-rpi-kernel@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org, LKML , Tim Gover , Phil Elwell Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Maxime and Eric On Tue, 2 Jun 2020 at 15:12, Maxime Ripard wrote: > > Hi Eric > > On Wed, May 27, 2020 at 09:54:44AM -0700, Eric Anholt wrote: > > On Wed, May 27, 2020 at 8:50 AM Maxime Ripard wrote: > > > > > > The VIDEN bit in the pixelvalve currently being used to enable or disable > > > the pixelvalve seems to not be enough in some situations, which whill end > > > up with the pixelvalve stalling. > > > > > > In such a case, even re-enabling VIDEN doesn't bring it back and we need to > > > clear the FIFO. This can only be done if the pixelvalve is disabled though. > > > > > > In order to overcome this, we can configure the pixelvalve during > > > mode_set_no_fb, but only enable it in atomic_enable and flush the FIFO > > > there, and in atomic_disable disable the pixelvalve again. > > > > What displays has this been tested with? Getting this sequencing > > right is so painful, and things like DSI are tricky to get to light > > up. > > That FIFO is between the HVS and the HDMI PVs, so this was obviously > tested against that. Dave also tested the DSI output IIRC, so we should > be covered here. DSI wasn't working on the first patch set that Maxime sent - I haven't tested this one as yet but will do so. DPI was working early on to both an Adafruit 800x480 DPI panel, and via a VGA666 as VGA. HDMI is obviously working. VEC is being ignored now. The clock structure is more restricted than earlier chips, so to get the required clocks for the VEC without using fractional divides it compromises the clock that other parts of the system can run at (IIRC including the ARM). That's why the VEC has to be explicitly enabled for the firmware to enable it as the only output. It's annoying, but that's just a restriction of the chip. Dave From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4E90FC433DF for ; Tue, 2 Jun 2020 15:03:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1BC3A2074B for ; Tue, 2 Jun 2020 15:03:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Wu0NY4q8"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="rcV8xvqQ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1BC3A2074B Authentication-Results: mail.kernel.org; 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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Ie4XwPUUWuHUs6FpQc71seJRalOxPBnrHjEeZHur870=; b=JsV9dXprFLAHrDfGRS2SkjwMBp4NfTvPCAMJ2TP5PemSpi7s/AykMv0FjGdFIw9vOX wnICA6ehhS1KM4WfI17WaPaZD/njhjyMNLtZmVhY+rObpRyQnOD4UKF5E8XcuDcydex2 GTxCIBd9pVdp8AluMgQe68rk4xgbwsIeP06PkboPfcY0pfzU7i0hLftD65WRoPPJBG5T bTAuxPHttylUQJewVbJCcb3pAqcxkqKblaI9Dtv3GPOQTJY8cQ9uhfLWFZDcWbXAiWLn qM+vPQo/r4wLB+3ympSNWLwDpsIAZyaOjihjceAn+sHPzLBmV57uwECsHCDBvyCJH1Zq XjNw== X-Gm-Message-State: AOAM532Q46yemMfq9v3pVkGkYrvU/dNETL1aWrOa+x76DVVomiJdWxJR 1iclul2PdQDW07BC2ciAh1evlCmm2wm9+WVwgUcSMw== X-Google-Smtp-Source: ABdhPJw+qlivYu2F8CIkQRiCrVBEGIQXfJye4OGlUJ/N4SBalG1P/TzpCkBTffuFw04vbpL4M63++mj+iMJssStM1iQ= X-Received: by 2002:a7b:c186:: with SMTP id y6mr4835128wmi.82.1591110165044; Tue, 02 Jun 2020 08:02:45 -0700 (PDT) MIME-Version: 1.0 References: <20200602141228.7zbkob7bw3owajsq@gilmour> In-Reply-To: <20200602141228.7zbkob7bw3owajsq@gilmour> From: Dave Stevenson Date: Tue, 2 Jun 2020 16:02:28 +0100 Message-ID: Subject: Re: [PATCH v3 032/105] drm/vc4: crtc: Enable and disable the PV in atomic_enable / disable To: Maxime Ripard X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200602_080247_364117_4AE23DD8 X-CRM114-Status: GOOD ( 19.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tim Gover , LKML , DRI Development , Eric Anholt , bcm-kernel-feedback-list@broadcom.com, Nicolas Saenz Julienne , Phil Elwell , linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Maxime and Eric On Tue, 2 Jun 2020 at 15:12, Maxime Ripard wrote: > > Hi Eric > > On Wed, May 27, 2020 at 09:54:44AM -0700, Eric Anholt wrote: > > On Wed, May 27, 2020 at 8:50 AM Maxime Ripard wrote: > > > > > > The VIDEN bit in the pixelvalve currently being used to enable or disable > > > the pixelvalve seems to not be enough in some situations, which whill end > > > up with the pixelvalve stalling. > > > > > > In such a case, even re-enabling VIDEN doesn't bring it back and we need to > > > clear the FIFO. This can only be done if the pixelvalve is disabled though. > > > > > > In order to overcome this, we can configure the pixelvalve during > > > mode_set_no_fb, but only enable it in atomic_enable and flush the FIFO > > > there, and in atomic_disable disable the pixelvalve again. > > > > What displays has this been tested with? Getting this sequencing > > right is so painful, and things like DSI are tricky to get to light > > up. > > That FIFO is between the HVS and the HDMI PVs, so this was obviously > tested against that. Dave also tested the DSI output IIRC, so we should > be covered here. DSI wasn't working on the first patch set that Maxime sent - I haven't tested this one as yet but will do so. DPI was working early on to both an Adafruit 800x480 DPI panel, and via a VGA666 as VGA. HDMI is obviously working. VEC is being ignored now. The clock structure is more restricted than earlier chips, so to get the required clocks for the VEC without using fractional divides it compromises the clock that other parts of the system can run at (IIRC including the ARM). That's why the VEC has to be explicitly enabled for the firmware to enable it as the only output. It's annoying, but that's just a restriction of the chip. Dave _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.6 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0406FC433DF for ; Tue, 2 Jun 2020 15:02:48 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B747920757 for ; Tue, 2 Jun 2020 15:02:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=raspberrypi.com header.i=@raspberrypi.com header.b="rcV8xvqQ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B747920757 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=raspberrypi.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0EDE36E409; Tue, 2 Jun 2020 15:02:47 +0000 (UTC) Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by gabe.freedesktop.org (Postfix) with ESMTPS id 671C76E409 for ; Tue, 2 Jun 2020 15:02:46 +0000 (UTC) Received: by mail-wm1-x341.google.com with SMTP id r9so3265478wmh.2 for ; Tue, 02 Jun 2020 08:02:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=raspberrypi.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=Ie4XwPUUWuHUs6FpQc71seJRalOxPBnrHjEeZHur870=; b=rcV8xvqQ9pPbeXXUaiQ/IjScOQcZmPZgnBs587oPVmCd3+x1Ol79xSWBWAkedejyog avM37VtRjXAmg1llx2WbnE0Bc2LRYohlI/hp6EaqXOo5OlFJ6HREm4XxCFvpA3MYRoeE 4v4sIWbUUqGgKydRX315TGSREnqTA8r57cXrvVxcWngHLMpdtFVSiuCKeaWv+2IG8Jk3 FyA2tUj1kGPE99oxoNNjsIPXVPxdUShKlY5qjAiV4ZR5Ug6LI0ay8NpiPNSHr3VTuk4n iCBZEeEYjuryK4ouCKVKYCfPkxG4uUHEYu67H+aEf1AFloavvIhZVSzJtXN+0E/wH7Wv MjRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=Ie4XwPUUWuHUs6FpQc71seJRalOxPBnrHjEeZHur870=; b=iHGogjkolXu0HXd6P/XW5cgZnku371qgdxi5cHq36hkINEl80M6EC5oh40lpOMmrNb hlbxwQycZMlQ51r9L/y1hPnuBVxX0m04wP3pCVS9ZFq0jFUX/cmZ+od8UoBc0HQUa9Mi WbJ+bndyGPP16QG5G67eXaWafOhb7Sr7RTiz4WNr401XrhgvFpqhSJK72xhWtHCGEh4d ECEoWTXWK04aT6Y6BFPAW95cYLqGJWm0ulyddHPwQmh5SSgSPbG4KwYyiuVSpZXtWCFJ reT1F95waVaD8CWgTqAbp2Ak/hvOCqyl5sEGb7Fyont5/ZWxuSd0o2YJWe5HIFjpup8E vNCg== X-Gm-Message-State: AOAM532+JGUlxuvXv98jpmbALiljbRh6oMwmQUZHcE4fqXtXSCeywbkC M3W2m9r2/afhnfC1TmQSyvZv7tpE3wULaEWIWkOYGg== X-Google-Smtp-Source: ABdhPJw+qlivYu2F8CIkQRiCrVBEGIQXfJye4OGlUJ/N4SBalG1P/TzpCkBTffuFw04vbpL4M63++mj+iMJssStM1iQ= X-Received: by 2002:a7b:c186:: with SMTP id y6mr4835128wmi.82.1591110165044; Tue, 02 Jun 2020 08:02:45 -0700 (PDT) MIME-Version: 1.0 References: <20200602141228.7zbkob7bw3owajsq@gilmour> In-Reply-To: <20200602141228.7zbkob7bw3owajsq@gilmour> From: Dave Stevenson Date: Tue, 2 Jun 2020 16:02:28 +0100 Message-ID: Subject: Re: [PATCH v3 032/105] drm/vc4: crtc: Enable and disable the PV in atomic_enable / disable To: Maxime Ripard X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tim Gover , LKML , DRI Development , bcm-kernel-feedback-list@broadcom.com, Nicolas Saenz Julienne , Phil Elwell , linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Maxime and Eric On Tue, 2 Jun 2020 at 15:12, Maxime Ripard wrote: > > Hi Eric > > On Wed, May 27, 2020 at 09:54:44AM -0700, Eric Anholt wrote: > > On Wed, May 27, 2020 at 8:50 AM Maxime Ripard wrote: > > > > > > The VIDEN bit in the pixelvalve currently being used to enable or disable > > > the pixelvalve seems to not be enough in some situations, which whill end > > > up with the pixelvalve stalling. > > > > > > In such a case, even re-enabling VIDEN doesn't bring it back and we need to > > > clear the FIFO. This can only be done if the pixelvalve is disabled though. > > > > > > In order to overcome this, we can configure the pixelvalve during > > > mode_set_no_fb, but only enable it in atomic_enable and flush the FIFO > > > there, and in atomic_disable disable the pixelvalve again. > > > > What displays has this been tested with? Getting this sequencing > > right is so painful, and things like DSI are tricky to get to light > > up. > > That FIFO is between the HVS and the HDMI PVs, so this was obviously > tested against that. Dave also tested the DSI output IIRC, so we should > be covered here. DSI wasn't working on the first patch set that Maxime sent - I haven't tested this one as yet but will do so. DPI was working early on to both an Adafruit 800x480 DPI panel, and via a VGA666 as VGA. HDMI is obviously working. VEC is being ignored now. The clock structure is more restricted than earlier chips, so to get the required clocks for the VEC without using fractional divides it compromises the clock that other parts of the system can run at (IIRC including the ARM). That's why the VEC has to be explicitly enabled for the firmware to enable it as the only output. It's annoying, but that's just a restriction of the chip. Dave _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel