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X-Received-From: 2607:f8b0:4864:20::d41 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , jasowang@redhat.com, QEMU Developers , Beniamino Galvani , qemu-arm , imammedo@redhat.com, =?UTF-8?B?QWxleCBCZW5uw6ll?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --000000000000a52783059d9c977c Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sun, Jan 19, 2020 at 7:37 PM Philippe Mathieu-Daud=C3=A9 wrote: > On 1/19/20 1:50 AM, Niek Linnenbank wrote: > > The Allwinner H3 System on Chip contains multiple USB 2.0 bus > > connections which provide software access using the Enhanced > > Host Controller Interface (EHCI) and Open Host Controller > > Interface (OHCI) interfaces. This commit adds support for > > both interfaces in the Allwinner H3 System on Chip. > > > > Signed-off-by: Niek Linnenbank > > Reviewed-by: Gerd Hoffmann > > --- > > hw/usb/hcd-ehci.h | 1 + > > include/hw/arm/allwinner-h3.h | 8 ++++++ > > hw/arm/allwinner-h3.c | 52 ++++++++++++++++++++++++++++++++--= - > > hw/usb/hcd-ehci-sysbus.c | 17 ++++++++++++ > > 4 files changed, 74 insertions(+), 4 deletions(-) > > > > diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h > > index 0298238f0b..edb59311c4 100644 > > --- a/hw/usb/hcd-ehci.h > > +++ b/hw/usb/hcd-ehci.h > > @@ -342,6 +342,7 @@ typedef struct EHCIPCIState { > > #define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb" > > #define TYPE_PLATFORM_EHCI "platform-ehci-usb" > > #define TYPE_EXYNOS4210_EHCI "exynos4210-ehci-usb" > > +#define TYPE_AW_H3_EHCI "aw-h3-ehci-usb" > > #define TYPE_TEGRA2_EHCI "tegra2-ehci-usb" > > #define TYPE_PPC4xx_EHCI "ppc4xx-ehci-usb" > > #define TYPE_FUSBH200_EHCI "fusbh200-ehci-usb" > > diff --git a/include/hw/arm/allwinner-h3.h > b/include/hw/arm/allwinner-h3.h > > index abdc20871a..4f4dcbcd17 100644 > > --- a/include/hw/arm/allwinner-h3.h > > +++ b/include/hw/arm/allwinner-h3.h > > @@ -56,6 +56,14 @@ enum { > > AW_H3_SRAM_A1, > > AW_H3_SRAM_A2, > > AW_H3_SRAM_C, > > + AW_H3_EHCI0, > > + AW_H3_OHCI0, > > + AW_H3_EHCI1, > > + AW_H3_OHCI1, > > + AW_H3_EHCI2, > > + AW_H3_OHCI2, > > + AW_H3_EHCI3, > > + AW_H3_OHCI3, > > AW_H3_CCU, > > AW_H3_PIT, > > AW_H3_UART0, > > diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c > > index 8df8e3e05e..f360625ee9 100644 > > --- a/hw/arm/allwinner-h3.c > > +++ b/hw/arm/allwinner-h3.c > > @@ -28,6 +28,7 @@ > > #include "hw/sysbus.h" > > #include "hw/char/serial.h" > > #include "hw/misc/unimp.h" > > +#include "hw/usb/hcd-ehci.h" > > #include "sysemu/sysemu.h" > > #include "hw/arm/allwinner-h3.h" > > > > @@ -36,6 +37,14 @@ const hwaddr allwinner_h3_memmap[] =3D { > > [AW_H3_SRAM_A1] =3D 0x00000000, > > [AW_H3_SRAM_A2] =3D 0x00044000, > > [AW_H3_SRAM_C] =3D 0x00010000, > > + [AW_H3_EHCI0] =3D 0x01c1a000, > > + [AW_H3_OHCI0] =3D 0x01c1a400, > > + [AW_H3_EHCI1] =3D 0x01c1b000, > > + [AW_H3_OHCI1] =3D 0x01c1b400, > > + [AW_H3_EHCI2] =3D 0x01c1c000, > > + [AW_H3_OHCI2] =3D 0x01c1c400, > > + [AW_H3_EHCI3] =3D 0x01c1d000, > > + [AW_H3_OHCI3] =3D 0x01c1d400, > > [AW_H3_CCU] =3D 0x01c20000, > > [AW_H3_PIT] =3D 0x01c20c00, > > [AW_H3_UART0] =3D 0x01c28000, > > @@ -73,10 +82,10 @@ struct AwH3Unimplemented { > > { "msgbox", 0x01c17000, 4 * KiB }, > > { "spinlock", 0x01c18000, 4 * KiB }, > > { "usb0-otg", 0x01c19000, 4 * KiB }, > > - { "usb0", 0x01c1a000, 4 * KiB }, > > - { "usb1", 0x01c1b000, 4 * KiB }, > > - { "usb2", 0x01c1c000, 4 * KiB }, > > - { "usb3", 0x01c1d000, 4 * KiB }, > > + { "usb0-phy", 0x01c1a000, 4 * KiB }, > > + { "usb1-phy", 0x01c1b000, 4 * KiB }, > > + { "usb2-phy", 0x01c1c000, 4 * KiB }, > > + { "usb3-phy", 0x01c1d000, 4 * KiB }, > > As in v3 comment, this can be done in patch #1. > OK, I'll rename them in patch 1, so it won't show up here. > > Reviewed-by: Philippe Mathieu-Daud=C3=A9 > Tested-by: Philippe Mathieu-Daud=C3=A9 > Thanks for reviewing and testing Philippe! Regards, Niek > > > { "smc", 0x01c1e000, 4 * KiB }, > > { "pio", 0x01c20800, 1 * KiB }, > > { "owa", 0x01c21000, 1 * KiB }, > > @@ -144,6 +153,14 @@ enum { > > AW_H3_GIC_SPI_UART3 =3D 3, > > AW_H3_GIC_SPI_TIMER0 =3D 18, > > AW_H3_GIC_SPI_TIMER1 =3D 19, > > + AW_H3_GIC_SPI_EHCI0 =3D 72, > > + AW_H3_GIC_SPI_OHCI0 =3D 73, > > + AW_H3_GIC_SPI_EHCI1 =3D 74, > > + AW_H3_GIC_SPI_OHCI1 =3D 75, > > + AW_H3_GIC_SPI_EHCI2 =3D 76, > > + AW_H3_GIC_SPI_OHCI2 =3D 77, > > + AW_H3_GIC_SPI_EHCI3 =3D 78, > > + AW_H3_GIC_SPI_OHCI3 =3D 79, > > }; > > > > /* Allwinner H3 general constants */ > > @@ -284,6 +301,33 @@ static void allwinner_h3_realize(DeviceState *dev, > Error **errp) > > qdev_init_nofail(DEVICE(&s->ccu)); > > sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccu), 0, s->memmap[AW_H3_CCU])= ; > > > > + /* Universal Serial Bus */ > > + sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI0], > > + qdev_get_gpio_in(DEVICE(&s->gic), > > + AW_H3_GIC_SPI_EHCI0)); > > + sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI1], > > + qdev_get_gpio_in(DEVICE(&s->gic), > > + AW_H3_GIC_SPI_EHCI1)); > > + sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI2], > > + qdev_get_gpio_in(DEVICE(&s->gic), > > + AW_H3_GIC_SPI_EHCI2)); > > + sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI3], > > + qdev_get_gpio_in(DEVICE(&s->gic), > > + AW_H3_GIC_SPI_EHCI3)); > > + > > + sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_OHCI0], > > + qdev_get_gpio_in(DEVICE(&s->gic), > > + AW_H3_GIC_SPI_OHCI0)); > > + sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_OHCI1], > > + qdev_get_gpio_in(DEVICE(&s->gic), > > + AW_H3_GIC_SPI_OHCI1)); > > + sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_OHCI2], > > + qdev_get_gpio_in(DEVICE(&s->gic), > > + AW_H3_GIC_SPI_OHCI2)); > > + sysbus_create_simple("sysbus-ohci", s->memmap[AW_H3_OHCI3], > > + qdev_get_gpio_in(DEVICE(&s->gic), > > + AW_H3_GIC_SPI_OHCI3)); > > + > > /* UART0. For future clocktree API: All UARTS are connected to > APB2_CLK. */ > > serial_mm_init(get_system_memory(), s->memmap[AW_H3_UART0], 2, > > qdev_get_gpio_in(DEVICE(&s->gic), > AW_H3_GIC_SPI_UART0), > > diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c > > index 020211fd10..174c3446ef 100644 > > --- a/hw/usb/hcd-ehci-sysbus.c > > +++ b/hw/usb/hcd-ehci-sysbus.c > > @@ -145,6 +145,22 @@ static const TypeInfo ehci_exynos4210_type_info = =3D { > > .class_init =3D ehci_exynos4210_class_init, > > }; > > > > +static void ehci_aw_h3_class_init(ObjectClass *oc, void *data) > > +{ > > + SysBusEHCIClass *sec =3D SYS_BUS_EHCI_CLASS(oc); > > + DeviceClass *dc =3D DEVICE_CLASS(oc); > > + > > + sec->capsbase =3D 0x0; > > + sec->opregbase =3D 0x10; > > + set_bit(DEVICE_CATEGORY_USB, dc->categories); > > +} > > + > > +static const TypeInfo ehci_aw_h3_type_info =3D { > > + .name =3D TYPE_AW_H3_EHCI, > > + .parent =3D TYPE_SYS_BUS_EHCI, > > + .class_init =3D ehci_aw_h3_class_init, > > +}; > > + > > static void ehci_tegra2_class_init(ObjectClass *oc, void *data) > > { > > SysBusEHCIClass *sec =3D SYS_BUS_EHCI_CLASS(oc); > > @@ -267,6 +283,7 @@ static void ehci_sysbus_register_types(void) > > type_register_static(&ehci_platform_type_info); > > type_register_static(&ehci_xlnx_type_info); > > type_register_static(&ehci_exynos4210_type_info); > > + type_register_static(&ehci_aw_h3_type_info); > > type_register_static(&ehci_tegra2_type_info); > > type_register_static(&ehci_ppc4xx_type_info); > > type_register_static(&ehci_fusbh200_type_info); > > > > --=20 Niek Linnenbank --000000000000a52783059d9c977c Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Sun, Jan 19, 2020 at 7:37 PM Phili= ppe Mathieu-Daud=C3=A9 <philmd@redh= at.com> wrote:
On 1/19/20 1:50 AM, Niek Linnenbank wrote:
> The Allwinner H3 System on Chip contains multiple USB 2.0 bus
> connections which provide software access using the Enhanced
> Host Controller Interface (EHCI) and Open Host Controller
> Interface (OHCI) interfaces. This commit adds support for
> both interfaces in the Allwinner H3 System on Chip.
>
> Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com>
> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
>=C2=A0 =C2=A0hw/usb/hcd-ehci.h=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0|=C2=A0 1 +
>=C2=A0 =C2=A0include/hw/arm/allwinner-h3.h |=C2=A0 8 ++++++
>=C2=A0 =C2=A0hw/arm/allwinner-h3.c=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0| 5= 2 ++++++++++++++++++++++++++++++++---
>=C2=A0 =C2=A0hw/usb/hcd-ehci-sysbus.c=C2=A0 =C2=A0 =C2=A0 | 17 ++++++++= ++++
>=C2=A0 =C2=A04 files changed, 74 insertions(+), 4 deletions(-)
>
> diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
> index 0298238f0b..edb59311c4 100644
> --- a/hw/usb/hcd-ehci.h
> +++ b/hw/usb/hcd-ehci.h
> @@ -342,6 +342,7 @@ typedef struct EHCIPCIState {
>=C2=A0 =C2=A0#define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb"
>=C2=A0 =C2=A0#define TYPE_PLATFORM_EHCI "platform-ehci-usb" >=C2=A0 =C2=A0#define TYPE_EXYNOS4210_EHCI "exynos4210-ehci-usb&quo= t;
> +#define TYPE_AW_H3_EHCI "aw-h3-ehci-usb"
>=C2=A0 =C2=A0#define TYPE_TEGRA2_EHCI "tegra2-ehci-usb"
>=C2=A0 =C2=A0#define TYPE_PPC4xx_EHCI "ppc4xx-ehci-usb"
>=C2=A0 =C2=A0#define TYPE_FUSBH200_EHCI "fusbh200-ehci-usb" > diff --git a/include/hw/arm/allwinner-h3.h b/include/hw/arm/allwinner-= h3.h
> index abdc20871a..4f4dcbcd17 100644
> --- a/include/hw/arm/allwinner-h3.h
> +++ b/include/hw/arm/allwinner-h3.h
> @@ -56,6 +56,14 @@ enum {
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_SRAM_A1,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_SRAM_A2,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_SRAM_C,
> +=C2=A0 =C2=A0 AW_H3_EHCI0,
> +=C2=A0 =C2=A0 AW_H3_OHCI0,
> +=C2=A0 =C2=A0 AW_H3_EHCI1,
> +=C2=A0 =C2=A0 AW_H3_OHCI1,
> +=C2=A0 =C2=A0 AW_H3_EHCI2,
> +=C2=A0 =C2=A0 AW_H3_OHCI2,
> +=C2=A0 =C2=A0 AW_H3_EHCI3,
> +=C2=A0 =C2=A0 AW_H3_OHCI3,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_CCU,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_PIT,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_UART0,
> diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c
> index 8df8e3e05e..f360625ee9 100644
> --- a/hw/arm/allwinner-h3.c
> +++ b/hw/arm/allwinner-h3.c
> @@ -28,6 +28,7 @@
>=C2=A0 =C2=A0#include "hw/sysbus.h"
>=C2=A0 =C2=A0#include "hw/char/serial.h"
>=C2=A0 =C2=A0#include "hw/misc/unimp.h"
> +#include "hw/usb/hcd-ehci.h"
>=C2=A0 =C2=A0#include "sysemu/sysemu.h"
>=C2=A0 =C2=A0#include "hw/arm/allwinner-h3.h"
>=C2=A0 =C2=A0
> @@ -36,6 +37,14 @@ const hwaddr allwinner_h3_memmap[] =3D {
>=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_SRAM_A1]=C2=A0 =C2=A0 =3D 0x00000000,=
>=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_SRAM_A2]=C2=A0 =C2=A0 =3D 0x00044000,=
>=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_SRAM_C]=C2=A0 =C2=A0 =C2=A0=3D 0x0001= 0000,
> +=C2=A0 =C2=A0 [AW_H3_EHCI0]=C2=A0 =C2=A0 =C2=A0 =3D 0x01c1a000,
> +=C2=A0 =C2=A0 [AW_H3_OHCI0]=C2=A0 =C2=A0 =C2=A0 =3D 0x01c1a400,
> +=C2=A0 =C2=A0 [AW_H3_EHCI1]=C2=A0 =C2=A0 =C2=A0 =3D 0x01c1b000,
> +=C2=A0 =C2=A0 [AW_H3_OHCI1]=C2=A0 =C2=A0 =C2=A0 =3D 0x01c1b400,
> +=C2=A0 =C2=A0 [AW_H3_EHCI2]=C2=A0 =C2=A0 =C2=A0 =3D 0x01c1c000,
> +=C2=A0 =C2=A0 [AW_H3_OHCI2]=C2=A0 =C2=A0 =C2=A0 =3D 0x01c1c400,
> +=C2=A0 =C2=A0 [AW_H3_EHCI3]=C2=A0 =C2=A0 =C2=A0 =3D 0x01c1d000,
> +=C2=A0 =C2=A0 [AW_H3_OHCI3]=C2=A0 =C2=A0 =C2=A0 =3D 0x01c1d400,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_CCU]=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D 0= x01c20000,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_PIT]=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D 0= x01c20c00,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_UART0]=C2=A0 =C2=A0 =C2=A0 =3D 0x01c2= 8000,
> @@ -73,10 +82,10 @@ struct AwH3Unimplemented {
>=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "msgbox",=C2=A0 =C2=A0 0x01c1700= 0, 4 * KiB },
>=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "spinlock",=C2=A0 0x01c18000, 4 = * KiB },
>=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "usb0-otg",=C2=A0 0x01c19000, 4 = * KiB },
> -=C2=A0 =C2=A0 { "usb0",=C2=A0 =C2=A0 =C2=A0 0x01c1a000, 4 *= KiB },
> -=C2=A0 =C2=A0 { "usb1",=C2=A0 =C2=A0 =C2=A0 0x01c1b000, 4 *= KiB },
> -=C2=A0 =C2=A0 { "usb2",=C2=A0 =C2=A0 =C2=A0 0x01c1c000, 4 *= KiB },
> -=C2=A0 =C2=A0 { "usb3",=C2=A0 =C2=A0 =C2=A0 0x01c1d000, 4 *= KiB },
> +=C2=A0 =C2=A0 { "usb0-phy",=C2=A0 0x01c1a000, 4 * KiB }, > +=C2=A0 =C2=A0 { "usb1-phy",=C2=A0 0x01c1b000, 4 * KiB }, > +=C2=A0 =C2=A0 { "usb2-phy",=C2=A0 0x01c1c000, 4 * KiB }, > +=C2=A0 =C2=A0 { "usb3-phy",=C2=A0 0x01c1d000, 4 * KiB },
As in v3 comment, this can be done in patch #1.

OK, I'll rename them in patch 1, so it won't show up here.=
=C2=A0
philmd@redhat.com>
Tested-by: Philippe Mathieu-Daud=C3=A9 <philmd@redhat.com>

<= /div>
Thanks for reviewing and testing Philippe!
Regards,
Niek
=C2=A0

>=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "smc",=C2=A0 =C2=A0 =C2=A0 =C2= =A00x01c1e000, 4 * KiB },
>=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "pio",=C2=A0 =C2=A0 =C2=A0 =C2= =A00x01c20800, 1 * KiB },
>=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "owa",=C2=A0 =C2=A0 =C2=A0 =C2= =A00x01c21000, 1 * KiB },
> @@ -144,6 +153,14 @@ enum {
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_GIC_SPI_UART3=C2=A0 =C2=A0 =C2=A0=3D= =C2=A0 3,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_GIC_SPI_TIMER0=C2=A0 =C2=A0 =3D 18, >=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_GIC_SPI_TIMER1=C2=A0 =C2=A0 =3D 19, > +=C2=A0 =C2=A0 AW_H3_GIC_SPI_EHCI0=C2=A0 =C2=A0 =C2=A0=3D 72,
> +=C2=A0 =C2=A0 AW_H3_GIC_SPI_OHCI0=C2=A0 =C2=A0 =C2=A0=3D 73,
> +=C2=A0 =C2=A0 AW_H3_GIC_SPI_EHCI1=C2=A0 =C2=A0 =C2=A0=3D 74,
> +=C2=A0 =C2=A0 AW_H3_GIC_SPI_OHCI1=C2=A0 =C2=A0 =C2=A0=3D 75,
> +=C2=A0 =C2=A0 AW_H3_GIC_SPI_EHCI2=C2=A0 =C2=A0 =C2=A0=3D 76,
> +=C2=A0 =C2=A0 AW_H3_GIC_SPI_OHCI2=C2=A0 =C2=A0 =C2=A0=3D 77,
> +=C2=A0 =C2=A0 AW_H3_GIC_SPI_EHCI3=C2=A0 =C2=A0 =C2=A0=3D 78,
> +=C2=A0 =C2=A0 AW_H3_GIC_SPI_OHCI3=C2=A0 =C2=A0 =C2=A0=3D 79,
>=C2=A0 =C2=A0};
>=C2=A0 =C2=A0
>=C2=A0 =C2=A0/* Allwinner H3 general constants */
> @@ -284,6 +301,33 @@ static void allwinner_h3_realize(DeviceState *dev= , Error **errp)
>=C2=A0 =C2=A0 =C2=A0 =C2=A0qdev_init_nofail(DEVICE(&s->ccu)); >=C2=A0 =C2=A0 =C2=A0 =C2=A0sysbus_mmio_map(SYS_BUS_DEVICE(&s->cc= u), 0, s->memmap[AW_H3_CCU]);
>=C2=A0 =C2=A0
> +=C2=A0 =C2=A0 /* Universal Serial Bus */
> +=C2=A0 =C2=A0 sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H= 3_EHCI0],
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0qdev_get_gpio_in(DEVICE(&s->gic),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 AW_H3_GIC_SPI_EHCI0));
> +=C2=A0 =C2=A0 sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H= 3_EHCI1],
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0qdev_get_gpio_in(DEVICE(&s->gic),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 AW_H3_GIC_SPI_EHCI1));
> +=C2=A0 =C2=A0 sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H= 3_EHCI2],
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0qdev_get_gpio_in(DEVICE(&s->gic),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 AW_H3_GIC_SPI_EHCI2));
> +=C2=A0 =C2=A0 sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H= 3_EHCI3],
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0qdev_get_gpio_in(DEVICE(&s->gic),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 AW_H3_GIC_SPI_EHCI3));
> +
> +=C2=A0 =C2=A0 sysbus_create_simple("sysbus-ohci", s->mem= map[AW_H3_OHCI0],
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0qdev_get_gpio_in(DEVICE(&s->gic),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 AW_H3_GIC_SPI_OHCI0));
> +=C2=A0 =C2=A0 sysbus_create_simple("sysbus-ohci", s->mem= map[AW_H3_OHCI1],
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0qdev_get_gpio_in(DEVICE(&s->gic),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 AW_H3_GIC_SPI_OHCI1));
> +=C2=A0 =C2=A0 sysbus_create_simple("sysbus-ohci", s->mem= map[AW_H3_OHCI2],
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0qdev_get_gpio_in(DEVICE(&s->gic),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 AW_H3_GIC_SPI_OHCI2));
> +=C2=A0 =C2=A0 sysbus_create_simple("sysbus-ohci", s->mem= map[AW_H3_OHCI3],
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0qdev_get_gpio_in(DEVICE(&s->gic),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 AW_H3_GIC_SPI_OHCI3));
> +
>=C2=A0 =C2=A0 =C2=A0 =C2=A0/* UART0. For future clocktree API: All UART= S are connected to APB2_CLK. */
>=C2=A0 =C2=A0 =C2=A0 =C2=A0serial_mm_init(get_system_memory(), s->me= mmap[AW_H3_UART0], 2,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 qdev_get_gpio_in(DEVICE(&s->gic), AW_H3_GIC_SPI_UART0),
> diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
> index 020211fd10..174c3446ef 100644
> --- a/hw/usb/hcd-ehci-sysbus.c
> +++ b/hw/usb/hcd-ehci-sysbus.c
> @@ -145,6 +145,22 @@ static const TypeInfo ehci_exynos4210_type_info = =3D {
>=C2=A0 =C2=A0 =C2=A0 =C2=A0.class_init=C2=A0 =C2=A0 =3D ehci_exynos4210= _class_init,
>=C2=A0 =C2=A0};
>=C2=A0 =C2=A0
> +static void ehci_aw_h3_class_init(ObjectClass *oc, void *data)
> +{
> +=C2=A0 =C2=A0 SysBusEHCIClass *sec =3D SYS_BUS_EHCI_CLASS(oc);
> +=C2=A0 =C2=A0 DeviceClass *dc =3D DEVICE_CLASS(oc);
> +
> +=C2=A0 =C2=A0 sec->capsbase =3D 0x0;
> +=C2=A0 =C2=A0 sec->opregbase =3D 0x10;
> +=C2=A0 =C2=A0 set_bit(DEVICE_CATEGORY_USB, dc->categories);
> +}
> +
> +static const TypeInfo ehci_aw_h3_type_info =3D {
> +=C2=A0 =C2=A0 .name=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D TYPE_AW_H3_= EHCI,
> +=C2=A0 =C2=A0 .parent=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D TYPE_SYS_BUS_EHC= I,
> +=C2=A0 =C2=A0 .class_init=C2=A0 =C2=A0 =3D ehci_aw_h3_class_init,
> +};
> +
>=C2=A0 =C2=A0static void ehci_tegra2_class_init(ObjectClass *oc, void *= data)
>=C2=A0 =C2=A0{
>=C2=A0 =C2=A0 =C2=A0 =C2=A0SysBusEHCIClass *sec =3D SYS_BUS_EHCI_CLASS(= oc);
> @@ -267,6 +283,7 @@ static void ehci_sysbus_register_types(void)
>=C2=A0 =C2=A0 =C2=A0 =C2=A0type_register_static(&ehci_platform_type= _info);
>=C2=A0 =C2=A0 =C2=A0 =C2=A0type_register_static(&ehci_xlnx_type_inf= o);
>=C2=A0 =C2=A0 =C2=A0 =C2=A0type_register_static(&ehci_exynos4210_ty= pe_info);
> +=C2=A0 =C2=A0 type_register_static(&ehci_aw_h3_type_info);
>=C2=A0 =C2=A0 =C2=A0 =C2=A0type_register_static(&ehci_tegra2_type_i= nfo);
>=C2=A0 =C2=A0 =C2=A0 =C2=A0type_register_static(&ehci_ppc4xx_type_i= nfo);
>=C2=A0 =C2=A0 =C2=A0 =C2=A0type_register_static(&ehci_fusbh200_type= _info);
>



--
Niek Linnenbank

--000000000000a52783059d9c977c--