From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.3 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,HTML_MESSAGE,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 77A42C34022 for ; Mon, 17 Feb 2020 19:36:22 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 381C52064C for ; Mon, 17 Feb 2020 19:36:22 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="GA6Js8ah" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 381C52064C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:52074 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3mBp-0003KS-Fa for qemu-devel@archiver.kernel.org; Mon, 17 Feb 2020 14:36:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:56446) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3mAD-0000OP-2k for qemu-devel@nongnu.org; Mon, 17 Feb 2020 14:34:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j3mAA-0005ij-Km for qemu-devel@nongnu.org; Mon, 17 Feb 2020 14:34:40 -0500 Received: from mail-il1-x144.google.com ([2607:f8b0:4864:20::144]:44699) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1j3mAA-0005hu-At; Mon, 17 Feb 2020 14:34:38 -0500 Received: by mail-il1-x144.google.com with SMTP id s85so15205206ill.11; Mon, 17 Feb 2020 11:34:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=fEVMIIQ96FX3VUZKtUePl/vfZoq3yp6AbT/Ral18fPM=; b=GA6Js8ahXZ0Il2kMpfbsZTccaMFqiINsrz7qBr6HsOSuINfO5nA2KQ5FMm4k+x/Qtd 3nrCwawj1hjGfwCsoEY1E6pkeCjgr2wciloSXgMWKgqhhLV6b7iDqT2PKrvsZxmjwvy7 5wXzOHuMIH+/Ai2VhrVO7q5aZxKMduGj4m4ZJqa0ieas6E8sFCDoUJMUzGHYEYLJju+J GKrWnnlbEZjHUvkXvxDKra74hoJTV/3S3FIPLuRHMlaIWPkSI2yHSkoteVNF1OwaQCS7 Ijq2pvQPtefWku2iRR8mdHmnAQtkvUvpZF+ox8K0DltmMIwmPBD5y0DadeOuq+EipeDm r5tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=fEVMIIQ96FX3VUZKtUePl/vfZoq3yp6AbT/Ral18fPM=; b=GQ/jUN7oJ5q13dTZTZu/CMKmj/BmG7d7RUPVuRD9xgdocqj/sbxcgQHexSpJWOjCj0 wTyIMPUd7R7rYYc6g9jAt7PIAM0S7NF3JNiGYTdMFhhQxkPBk391dixSuJPGTbnx3PRR yMwlMBZWPL0UCCdCBnsfNtG9koOWqj2H7v76iqQ3zYqs6xtqs0VhqcDoeQIsNgqXw+zh 20R+puqxUFKNuhQOPui1MKcwl8eU5sEQDIdDMhvS9GMMhM7kHIgRFIbG52YTdghxe1ej CJBHiDgMyBLHht4j3wFYBYZGwYiaalNDMn/VCKCF7WAxg+S4G2nk0B7itZ+1qj0hy5Vf J8gQ== X-Gm-Message-State: APjAAAWTQuwyaQ+Q754fNSbL5NA8NVsmDyL4P56gszMJajMz3VBw9W68 EgpibpVDi9YE+kcTbBzzD0Bm7s0nD2Ieo+pRU9s= X-Google-Smtp-Source: APXvYqzObUb1R1ui0bRfZFvYNOqhEU0nRFZXm6naT61Ev9WlMm4TJde8I94+xyal/Da0z8F+JOBcinGM3pv7WbEmG4w= X-Received: by 2002:a92:81d9:: with SMTP id q86mr15274561ilk.67.1581968077215; Mon, 17 Feb 2020 11:34:37 -0800 (PST) MIME-Version: 1.0 References: <20200108200020.4745-1-nieklinnenbank@gmail.com> <20200108200020.4745-8-nieklinnenbank@gmail.com> <8be03fbb-74f2-e688-76b1-ab504f25f8e4@redhat.com> <20200120175918.GA2949@minyard.net> <20200203131017.GE2626@minyard.net> In-Reply-To: From: Niek Linnenbank Date: Mon, 17 Feb 2020 20:34:25 +0100 Message-ID: Subject: Re: [PATCH v3 07/17] hw/arm/allwinner: add Security Identifier device To: =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Content-Type: multipart/alternative; boundary="00000000000049dab1059ecaa516" X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::144 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Corey Minyard , Peter Maydell , QEMU Developers , "Dr. David Alan Gilbert" , Yury Kotov , qemu-arm Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --00000000000049dab1059ecaa516 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, Feb 12, 2020 at 11:48 PM Philippe Mathieu-Daud=C3=A9 wrote: > )-.On Wed, Feb 12, 2020 at 10:31 PM Niek Linnenbank > wrote: > > > > Hi Corey, > > > > On Thu, Feb 6, 2020 at 10:09 PM Niek Linnenbank < > nieklinnenbank@gmail.com> wrote: > >> > >> Hi Corey, > >> > >> On Mon, Feb 3, 2020 at 2:10 PM Corey Minyard > wrote: > >>> > >>> On Sun, Feb 02, 2020 at 10:27:49PM +0100, Niek Linnenbank wrote: > >>> > Hi Corey, > >>> > > >>> > Thanks for reviewing! > >>> > > >>> > On Mon, Jan 20, 2020 at 6:59 PM Corey Minyard > wrote: > >>> > > >>> > > On Sat, Jan 18, 2020 at 04:25:08PM +0100, Philippe Mathieu-Daud= =C3=A9 > wrote: > >>> > > > Cc'ing Corey/David for good advices about using UUID. > >>> > > > >>> > > Is there any reason you didn't use the built-in qemu UUID for > this? It > >>> > > would simplify things in general. > >>> > > > >>> > > >>> > Currently the Allwinner SID device is using the QemuUUID type from > >>> > include/qemu/uuid.h. > >>> > Is that the build-in UUID you are referring to or should I use > something > >>> > else? > >>> > >>> You are using the QemuUUID type, which is of course what you should d= o, > >>> but you aren't using the UUID generated by qemu (at least that I can > find). > >>> That in include/sysemu/sysemu.h and is named qemu_uuid. Whether you > >>> should use that or not depends on your needs. If you just need some > >>> uuid, then that's what you should probably use. If you need somethin= g > >>> the user can individually control for this device, for instance, then > >>> that probably won't do. > >> > >> > >> Ah I did not know about the qemu_uuid variable, thanks for pointing > that out. > >> Basically the SID identifier is a number that is unique for each board > that comes > >> out of the factory. It is currently used by U-Boot to as input to > generate a MAC address. > >> > >> If I understand correctly, qemu_uuid is optional and by default zero. > >> However the SID value should not be zero, as otherwise U-Boot can't > pick a MAC address > >> resulting in a non-working ethernet device. > >> > >> Currently the hw/arm/orangepi.c machine specifies a fixed SID to be > used for the emulated board, > >> also containing a prefix (8100c002) that indicates the H3 chipset. One > thing that I am strugling with is that > > Suggestion while reading this, you might display a warning if the user > provided UUID doesn't start with 8100c002. > Yeah sure, I can add a warning for it. > > >> I'm not able to override the property using '-global', if > hw/arm/orangepi.c initializes the property with qdev_prop_set_string: > >> > >> $ qemu-system-arm -M orangepi-pc -kernel u-boot -nographic -nic user \ > >> -global allwinner-sid.identifier=3D8100c002-0001-0002-0003-00004455668= 8 > >> > >> If I don't set the property in hw/arm/orangepi.c, I can set it with > '-global'. Do you perhaps have a > >> recommendation how to improve that? Basically what is needed is that > the machine sets the default > >> property including the chip prefix, and that the user can override it. > Although it is not required for a > >> working emulated board, it would be a nice-to-have that the user can > set it. > > > > > > FYI and possibly others who have a similar usecase, I figured out how t= o > do this. In the machine init function, > > after creating the new SoC object, simply check if the identifier has a > value: > > > > + if (qemu_uuid_is_null(&s->h3->sid.identifier)) { > > + qdev_prop_set_string(DEVICE(s->h3), "identifier", > > + "8100c002-0001-0002-0003-000044556677"); > > Similarly, display a warning "No UUID provided, using default one..." > (or generate one 8100c002-XXX)? > If its allright with you, I would prefer not to display a warning for the default behavior. The other boards are also not displaying such warnings and it keeps the qemu output clean. > > > + } > > > > That way, if the user passed -global to override it, the machine will > not overrule the user's value > > and by default the machine sets an identifier containing the H3 specifi= c > chip prefix. > > > [...] > >>> > > > > --- /dev/null > >>> > > > > +++ b/hw/misc/allwinner-sid.c > >>> > > > > @@ -0,0 +1,170 @@ > >>> > > > > +/* > >>> > > > > + * Allwinner Security ID emulation > >>> > > > > + * > >>> > > > > + * Copyright (C) 2019 Niek Linnenbank < > nieklinnenbank@gmail.com> > >>> > > > > + * > >>> > > > > + * This program is free software: you can redistribute it > and/or > >>> > > modify > >>> > > > > + * it under the terms of the GNU General Public License as > published > >>> > > by > >>> > > > > + * the Free Software Foundation, either version 2 of the > License, or > >>> > > > > + * (at your option) any later version. > >>> > > > > + * > >>> > > > > + * This program is distributed in the hope that it will be > useful, > >>> > > > > + * but WITHOUT ANY WARRANTY; without even the implied > warranty of > >>> > > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See > the > >>> > > > > + * GNU General Public License for more details. > >>> > > > > + * > >>> > > > > + * You should have received a copy of the GNU General Public > License > >>> > > > > + * along with this program. If not, see < > >>> > > http://www.gnu.org/licenses/>. > >>> > > > > + */ > >>> > > > > + > >>> > > > > +#include "qemu/osdep.h" > >>> > > > > +#include "qemu/units.h" > >>> > > > > +#include "hw/sysbus.h" > >>> > > > > +#include "migration/vmstate.h" > >>> > > > > +#include "qemu/log.h" > >>> > > > > +#include "qemu/module.h" > >>> > > > > +#include "qemu/guest-random.h" > >>> > > > > +#include "qapi/error.h" > >>> > > > > +#include "hw/qdev-properties.h" > >>> > > > > +#include "hw/misc/allwinner-sid.h" > >>> > > > > +#include "trace.h" > >>> > > > > + > >>> > > > > +/* SID register offsets */ > >>> > > > > +enum { > >>> > > > > + REG_PRCTL =3D 0x40, /* Control */ > >>> > > > > + REG_RDKEY =3D 0x60, /* Read Key */ > >>> > > > > +}; > >>> > > > > + > >>> > > > > +/* SID register flags */ > >>> > > > > +enum { > >>> > > > > + REG_PRCTL_WRITE =3D 0x0002, /* Unknown write flag */ > >>> > > > > + REG_PRCTL_OP_LOCK =3D 0xAC00, /* Lock operation */ > >>> > > > > +}; > >>> > > > > + > >>> > > > > +static uint64_t allwinner_sid_read(void *opaque, hwaddr > offset, > >>> > > > > + unsigned size) > >>> > > > > +{ > >>> > > > > + const AwSidState *s =3D AW_SID(opaque); > >>> > > > > + uint64_t val =3D 0; > >>> > > > > + > >>> > > > > + switch (offset) { > >>> > > > > + case REG_PRCTL: /* Control */ > >>> > > > > + val =3D s->control; > >>> > > > > + break; > >>> > > > > + case REG_RDKEY: /* Read Key */ > >>> > > > > + val =3D s->rdkey; > >>> > > > > + break; > >>> > > > > + default: > >>> > > > > + qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds > offset > >>> > > 0x%04x\n", > >>> > > > > + __func__, (uint32_t)offset); > >>> > > > > + return 0; > >>> > > > > + } > >>> > > > > + > >>> > > > > + trace_allwinner_sid_read(offset, val, size); > >>> > > > > + > >>> > > > > + return val; > >>> > > > > +} > >>> > > > > + > >>> > > > > +static void allwinner_sid_write(void *opaque, hwaddr offset, > >>> > > > > + uint64_t val, unsigned size) > >>> > > > > +{ > >>> > > > > + AwSidState *s =3D AW_SID(opaque); > >>> > > > > + > >>> > > > > + trace_allwinner_sid_write(offset, val, size); > >>> > > > > + > >>> > > > > + switch (offset) { > >>> > > > > + case REG_PRCTL: /* Control */ > >>> > > > > + s->control =3D val; > >>> > > > > + > >>> > > > > + if ((s->control & REG_PRCTL_OP_LOCK) && > >>> > > > > + (s->control & REG_PRCTL_WRITE)) { > >>> > > > > + uint32_t id =3D s->control >> 16; > >>> > > > > + > >>> > > > > + if (id < sizeof(QemuUUID)) { > >>> > > > > + s->rdkey =3D (s->identifier.data[id]) | > >>> > > > > + (s->identifier.data[id + 1] << 8)= | > >>> > > > > + (s->identifier.data[id + 2] << 16= ) > | > >>> > > > > + (s->identifier.data[id + 3] << 24= ); > > Maybe you want: > > s->rdkey =3D ldl_le_p(s->identifier.data); > Thanks Philippe, I'll use this function to set s->rdkey. Regards, Niek > > >>> > > > > + } > >>> > > > > + } > >>> > > > > + s->control &=3D ~REG_PRCTL_WRITE; > >>> > > > > + break; > >>> > > > > + case REG_RDKEY: /* Read Key */ > >>> > > > > + break; > >>> > > > > + default: > >>> > > > > + qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds > offset > >>> > > 0x%04x\n", > >>> > > > > + __func__, (uint32_t)offset); > >>> > > > > + break; > >>> > > > > + } > >>> > > > > +} > > > > > > +} > [...] > > --=20 Niek Linnenbank --00000000000049dab1059ecaa516 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Wed, Feb 12, 2020 at 11:48 PM Phil= ippe Mathieu-Daud=C3=A9 <philmd@red= hat.com> wrote:
)-.On Wed, Feb 12, 2020 at 10:31 PM Niek Linnenbank
<nieklinne= nbank@gmail.com> wrote:
>
> Hi Corey,
>
> On Thu, Feb 6, 2020 at 10:09 PM Niek Linnenbank <nieklinnenbank@gmail.com>= ; wrote:
>>
>> Hi Corey,
>>
>> On Mon, Feb 3, 2020 at 2:10 PM Corey Minyard <cminyard@mvista.com> wrote:<= br> >>>
>>> On Sun, Feb 02, 2020 at 10:27:49PM +0100, Niek Linnenbank wrot= e:
>>> > Hi Corey,
>>> >
>>> > Thanks for reviewing!
>>> >
>>> > On Mon, Jan 20, 2020 at 6:59 PM Corey Minyard <cminyard@mvista.com&g= t; wrote:
>>> >
>>> > > On Sat, Jan 18, 2020 at 04:25:08PM +0100, Philippe M= athieu-Daud=C3=A9 wrote:
>>> > > > Cc'ing Corey/David for good advices about u= sing UUID.
>>> > >
>>> > > Is there any reason you didn't use the built-in = qemu UUID for this?=C2=A0 It
>>> > > would simplify things in general.
>>> > >
>>> >
>>> > Currently the Allwinner SID device is using the QemuUUID = type from
>>> > include/qemu/uuid.h.
>>> > Is that the build-in UUID you are referring to or should = I use something
>>> > else?
>>>
>>> You are using the QemuUUID type, which is of course what you s= hould do,
>>> but you aren't using the UUID generated by qemu (at least = that I can find).
>>> That in include/sysemu/sysemu.h and is named qemu_uuid.=C2=A0 = Whether you
>>> should use that or not depends on your needs.=C2=A0 If you jus= t need some
>>> uuid, then that's what you should probably use.=C2=A0 If y= ou need something
>>> the user can individually control for this device, for instanc= e, then
>>> that probably won't do.
>>
>>
>> Ah I did not know about the qemu_uuid variable, thanks for pointin= g that out.
>> Basically the SID identifier is a number that is unique for each b= oard that comes
>> out of the factory. It is currently used by U-Boot to as input to = generate a MAC address.
>>
>> If I understand correctly, qemu_uuid is optional and by default ze= ro.
>> However the SID value should not be zero, as otherwise U-Boot can&= #39;t pick a MAC address
>> resulting in a non-working ethernet device.
>>
>> Currently the hw/arm/orangepi.c machine specifies a fixed SID to b= e used for the emulated board,
>> also containing a prefix (8100c002) that indicates the H3 chipset.= One thing that I am strugling with is that

Suggestion while reading this, you might display a warning if the user
provided UUID doesn't start with 8100c002.

Yeah sure, I can add a warning for it.
=C2=A0

>> I'm not able to override the property using '-global',= if hw/arm/orangepi.c initializes the property with qdev_prop_set_string: >>
>> $ qemu-system-arm -M orangepi-pc -kernel u-boot -nographic -nic us= er \
>> -global allwinner-sid.identifier=3D8100c002-0001-0002-0003-0000445= 56688
>>
>> If I don't set the property in hw/arm/orangepi.c, I can set it= with '-global'. Do you perhaps have a
>> recommendation how to improve that? Basically what is needed is th= at the machine sets the default
>> property including the chip prefix, and that the user can override= it. Although it is not required for a
>> working emulated board, it would be a nice-to-have that the user c= an set it.
>
>
> FYI and possibly others who have a similar usecase, I figured out how = to do this. In the machine init function,
> after creating the new SoC object, simply check if the identifier has = a value:
>
> +=C2=A0 =C2=A0 if (qemu_uuid_is_null(&s->h3->sid.identifier)= ) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 qdev_prop_set_string(DEVICE(s->h3), &q= uot;identifier",
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0"8100c002-0001-0002-0003-0000445566= 77");

Similarly, display a warning "No UUID provided, using default one...&q= uot;
(or generate one 8100c002-XXX)?

If its = allright with you, I would prefer not to display a warning for the default = behavior.
The other boards are also not displaying such warnings = and it keeps the qemu output clean.
=C2=A0

> +=C2=A0 =C2=A0 }
>
> That way, if the user passed -global to override it, the machine will = not overrule the user's value
> and by default the machine sets an identifier containing the H3 specif= ic chip prefix.
>
[...]
>>> > > > > --- /dev/null
>>> > > > > +++ b/hw/misc/allwinner-sid.c
>>> > > > > @@ -0,0 +1,170 @@
>>> > > > > +/*
>>> > > > > + * Allwinner Security ID emulation
>>> > > > > + *
>>> > > > > + * Copyright (C) 2019 Niek Linnenbank <= ;nieklinnenba= nk@gmail.com>
>>> > > > > + *
>>> > > > > + * This program is free software: you can= redistribute it and/or
>>> > > modify
>>> > > > > + * it under the terms of the GNU General = Public License as published
>>> > > by
>>> > > > > + * the Free Software Foundation, either v= ersion 2 of the License, or
>>> > > > > + * (at your option) any later version. >>> > > > > + *
>>> > > > > + * This program is distributed in the hop= e that it will be useful,
>>> > > > > + * but WITHOUT ANY WARRANTY; without even= the implied warranty of
>>> > > > > + * MERCHANTABILITY or FITNESS FOR A PARTI= CULAR PURPOSE.=C2=A0 See the
>>> > > > > + * GNU General Public License for more de= tails.
>>> > > > > + *
>>> > > > > + * You should have received a copy of the= GNU General Public License
>>> > > > > + * along with this program.=C2=A0 If not,= see <
>>> > > http://www.gnu.org/licenses/>.
>>> > > > > + */
>>> > > > > +
>>> > > > > +#include "qemu/osdep.h"
>>> > > > > +#include "qemu/units.h"
>>> > > > > +#include "hw/sysbus.h"
>>> > > > > +#include "migration/vmstate.h"<= br> >>> > > > > +#include "qemu/log.h"
>>> > > > > +#include "qemu/module.h"
>>> > > > > +#include "qemu/guest-random.h"<= br> >>> > > > > +#include "qapi/error.h"
>>> > > > > +#include "hw/qdev-properties.h"=
>>> > > > > +#include "hw/misc/allwinner-sid.h&qu= ot;
>>> > > > > +#include "trace.h"
>>> > > > > +
>>> > > > > +/* SID register offsets */
>>> > > > > +enum {
>>> > > > > +=C2=A0 =C2=A0 REG_PRCTL =3D 0x40,=C2=A0 = =C2=A0/* Control */
>>> > > > > +=C2=A0 =C2=A0 REG_RDKEY =3D 0x60,=C2=A0 = =C2=A0/* Read Key */
>>> > > > > +};
>>> > > > > +
>>> > > > > +/* SID register flags */
>>> > > > > +enum {
>>> > > > > +=C2=A0 =C2=A0 REG_PRCTL_WRITE=C2=A0 =C2= =A0=3D 0x0002, /* Unknown write flag */
>>> > > > > +=C2=A0 =C2=A0 REG_PRCTL_OP_LOCK =3D 0xAC0= 0, /* Lock operation */
>>> > > > > +};
>>> > > > > +
>>> > > > > +static uint64_t allwinner_sid_read(void *= opaque, hwaddr offset,
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0unsigned size)
>>> > > > > +{
>>> > > > > +=C2=A0 =C2=A0 const AwSidState *s =3D AW_= SID(opaque);
>>> > > > > +=C2=A0 =C2=A0 uint64_t val =3D 0;
>>> > > > > +
>>> > > > > +=C2=A0 =C2=A0 switch (offset) {
>>> > > > > +=C2=A0 =C2=A0 case REG_PRCTL:=C2=A0 =C2= =A0 /* Control */
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 val =3D s->= ;control;
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
>>> > > > > +=C2=A0 =C2=A0 case REG_RDKEY:=C2=A0 =C2= =A0 /* Read Key */
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 val =3D s->= ;rdkey;
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
>>> > > > > +=C2=A0 =C2=A0 default:
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_log_mask= (LOG_GUEST_ERROR, "%s: out-of-bounds offset
>>> > > 0x%04x\n",
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 __func__, (uint32_t)offset);
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return 0;
>>> > > > > +=C2=A0 =C2=A0 }
>>> > > > > +
>>> > > > > +=C2=A0 =C2=A0 trace_allwinner_sid_read(of= fset, val, size);
>>> > > > > +
>>> > > > > +=C2=A0 =C2=A0 return val;
>>> > > > > +}
>>> > > > > +
>>> > > > > +static void allwinner_sid_write(void *opa= que, hwaddr offset,
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 uint= 64_t val, unsigned size)
>>> > > > > +{
>>> > > > > +=C2=A0 =C2=A0 AwSidState *s =3D AW_SID(op= aque);
>>> > > > > +
>>> > > > > +=C2=A0 =C2=A0 trace_allwinner_sid_write(o= ffset, val, size);
>>> > > > > +
>>> > > > > +=C2=A0 =C2=A0 switch (offset) {
>>> > > > > +=C2=A0 =C2=A0 case REG_PRCTL:=C2=A0 =C2= =A0 /* Control */
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 s->control= =3D val;
>>> > > > > +
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 if ((s->co= ntrol & REG_PRCTL_OP_LOCK) &&
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= (s->control & REG_PRCTL_WRITE)) {
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= uint32_t id =3D s->control >> 16;
>>> > > > > +
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= if (id < sizeof(QemuUUID)) {
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 s->rdkey =3D (s->identifier.data[id]) |
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(s->identifier.d= ata[id + 1] << 8) |
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(s->identifier.d= ata[id + 2] << 16) |
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(s->identifier.d= ata[id + 3] << 24);

Maybe you want:

=C2=A0 s->rdkey =3D ldl_le_p(s->identifier.data);

Thanks Philippe, I'll use this function to set s->r= dkey.

Regards,
Niek
=C2=A0=

>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= }
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 s->control= &=3D ~REG_PRCTL_WRITE;
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
>>> > > > > +=C2=A0 =C2=A0 case REG_RDKEY:=C2=A0 =C2= =A0 /* Read Key */
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
>>> > > > > +=C2=A0 =C2=A0 default:
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_log_mask= (LOG_GUEST_ERROR, "%s: out-of-bounds offset
>>> > > 0x%04x\n",
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 __func__, (uint32_t)offset);
>>> > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
>>> > > > > +=C2=A0 =C2=A0 }
>>> > > > > +}
> > > > > +}
[...]



--
Niek Linnenbank

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