From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=3.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,HTML_MESSAGE,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0427AC35247 for ; Thu, 6 Feb 2020 21:10:45 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A025721775 for ; Thu, 6 Feb 2020 21:10:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="aujLYTWd" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A025721775 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:46070 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1izoQ7-0003wZ-PJ for qemu-devel@archiver.kernel.org; Thu, 06 Feb 2020 16:10:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59696) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1izoP6-0003L0-4f for qemu-devel@nongnu.org; Thu, 06 Feb 2020 16:09:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1izoP1-0002QW-Uk for qemu-devel@nongnu.org; Thu, 06 Feb 2020 16:09:40 -0500 Received: from mail-il1-x144.google.com ([2607:f8b0:4864:20::144]:36426) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1izoP1-0002EF-Hu; Thu, 06 Feb 2020 16:09:35 -0500 Received: by mail-il1-x144.google.com with SMTP id b15so6451073iln.3; Thu, 06 Feb 2020 13:09:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=hSlwnim92rBeFqaO80cYqjTQ+wpc0Eemz6eGqLuIGhk=; b=aujLYTWdc+yZ9ac8uQ2o1Lf4oeBYlYzig92Inv1gbHY/+MNs2ZFKDtECs1NQTFXjcH 6KmYx18AxGebLV0n5FP3FdvO9t2UC0asiQ+sZe280iBNtc9BDSEE/Rrd4djPwQtRNGCK afdFWlRvFCXCFgExodBnlNU2ZuBFj+fEhNrdRdE80bGyDMDrwXbCbFg6sG6D6SukszUk xxyGXbTmfTMB4OfV8yNYt4V/Umi2CBFPwfh3B59QRYiqALTviCsXjfkoVuj+ZQigZIAn QzL+2ROVc2s6GzhVsAg9ZuaeehXHew8ZjWFMRLf+L4cKDTnNoeGtVQF1bZh3BterMzni xB+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=hSlwnim92rBeFqaO80cYqjTQ+wpc0Eemz6eGqLuIGhk=; b=TGwJUKzxQYrs4f4BnP1Jh2EcBrYhx28NhxIiYe2srigtovmfKRzo1uI1bDjp5m4fRN LhAHG5AvCWEkAX9hADbQHI6cqmS+HMr7wRJzwfGegwnIXgi6V8AyxWldrpPFDyYnzqW9 pAxT2iWal17+eS18rGaujpEso6oxUBXJYhZ5tWHV64avJ0C77gb69Rmjrzwet3nDj4Wp kxiCS9m9qgi9+DLduIL7dc8vUIG97fX3BpVJ/N7N+qojSq0+kK9J/QHu795bPiIonBJr x2iXS5Zcb3io3uSWrEX70WRd21vGX+vZ5CqSRu7XnoU2e+vBczAc0pPETIRj3mdXA2d5 7RcA== X-Gm-Message-State: APjAAAUQsQ4/zhMqeXYQ13zEHvE1B1PviBLliyvsBhbC0l/XKnBECaXU /tKSR++bJNd9waTPShtUAG8NOLSHy14km/WI7G0= X-Google-Smtp-Source: APXvYqzkRncTsUzBsGj9SVNY/D01zXwYyV0p2OZ8twNhooEEhfNbo2pEBQmeVynWw/Itd0571Jz3UpnZ1tBfGRDMXrI= X-Received: by 2002:a92:5f45:: with SMTP id t66mr6059189ilb.28.1581023374333; Thu, 06 Feb 2020 13:09:34 -0800 (PST) MIME-Version: 1.0 References: <20200108200020.4745-1-nieklinnenbank@gmail.com> <20200108200020.4745-8-nieklinnenbank@gmail.com> <8be03fbb-74f2-e688-76b1-ab504f25f8e4@redhat.com> <20200120175918.GA2949@minyard.net> <20200203131017.GE2626@minyard.net> In-Reply-To: <20200203131017.GE2626@minyard.net> From: Niek Linnenbank Date: Thu, 6 Feb 2020 22:09:22 +0100 Message-ID: Subject: Re: [PATCH v3 07/17] hw/arm/allwinner: add Security Identifier device To: Corey Minyard Content-Type: multipart/alternative; boundary="0000000000009bdd44059deeb005" X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::144 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , QEMU Developers , "Dr. David Alan Gilbert" , Yury Kotov , qemu-arm , =?UTF-8?Q?Philippe_Mathieu=2DDaud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --0000000000009bdd44059deeb005 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Corey, On Mon, Feb 3, 2020 at 2:10 PM Corey Minyard wrote: > On Sun, Feb 02, 2020 at 10:27:49PM +0100, Niek Linnenbank wrote: > > Hi Corey, > > > > Thanks for reviewing! > > > > On Mon, Jan 20, 2020 at 6:59 PM Corey Minyard > wrote: > > > > > On Sat, Jan 18, 2020 at 04:25:08PM +0100, Philippe Mathieu-Daud=C3=A9= wrote: > > > > Cc'ing Corey/David for good advices about using UUID. > > > > > > Is there any reason you didn't use the built-in qemu UUID for this? = It > > > would simplify things in general. > > > > > > > Currently the Allwinner SID device is using the QemuUUID type from > > include/qemu/uuid.h. > > Is that the build-in UUID you are referring to or should I use somethin= g > > else? > > You are using the QemuUUID type, which is of course what you should do, > but you aren't using the UUID generated by qemu (at least that I can find= ). > That in include/sysemu/sysemu.h and is named qemu_uuid. Whether you > should use that or not depends on your needs. If you just need some > uuid, then that's what you should probably use. If you need something > the user can individually control for this device, for instance, then > that probably won't do. > Ah I did not know about the qemu_uuid variable, thanks for pointing that out. Basically the SID identifier is a number that is unique for each board that comes out of the factory. It is currently used by U-Boot to as input to generate a MAC address. If I understand correctly, qemu_uuid is optional and by default zero. However the SID value should not be zero, as otherwise U-Boot can't pick a MAC address resulting in a non-working ethernet device. Currently the hw/arm/orangepi.c machine specifies a fixed SID to be used for the emulated board, also containing a prefix (8100c002) that indicates the H3 chipset. One thing that I am strugling with is that I'm not able to override the property using '-global', if hw/arm/orangepi.c initializes the property with qdev_prop_set_string: $ qemu-system-arm -M orangepi-pc -kernel u-boot -nographic -nic user \ -global allwinner-sid.identifier=3D8100c002-0001-0002-0003-000044556688 If I don't set the property in hw/arm/orangepi.c, I can set it with '-global'. Do you perhaps have a recommendation how to improve that? Basically what is needed is that the machine sets the default property including the chip prefix, and that the user can override it. Although it is not required for a working emulated board, it would be a nice-to-have that the user can set it= . > > > > > > > Also, in case no one else say, you have tabs in your code that you ne= ed > > > to get rid of. > > > > > > > > If there are any tabs in the code, it was not intended. I re-checked th= is > > patch and others > > again but found no tabs in the code. > > Could you please point out where you found the extra tabs? > > My apologies, I saw 1-character misalignments, and that usually means > that there's a tab. But it looks like it has something to do with the > way it was forwarded. I didn't get the original email. > > Ah yes that is possible indeed. I'll add you to the CC list for the next version of this patch series. Regards, Niek > -corey > > > > > Regards, > > Niek > > > > > > > -corey > > > > > > > > > > > On 1/8/20 9:00 PM, Niek Linnenbank wrote: > > > > > The Security Identifier device found in various Allwinner System = on > > > Chip > > > > > designs gives applications a per-board unique identifier. This > commit > > > > > adds support for the Allwinner Security Identifier using a 128-bi= t > > > > > UUID value as input. > > > > > > > > > > Signed-off-by: Niek Linnenbank > > > > > --- > > > > > include/hw/arm/allwinner-h3.h | 3 + > > > > > include/hw/misc/allwinner-sid.h | 61 ++++++++++++ > > > > > hw/arm/allwinner-h3.c | 11 ++- > > > > > hw/arm/orangepi.c | 4 + > > > > > hw/misc/allwinner-sid.c | 170 > > > ++++++++++++++++++++++++++++++++ > > > > > hw/misc/Makefile.objs | 1 + > > > > > hw/misc/trace-events | 4 + > > > > > 7 files changed, 253 insertions(+), 1 deletion(-) > > > > > create mode 100644 include/hw/misc/allwinner-sid.h > > > > > create mode 100644 hw/misc/allwinner-sid.c > > > > > > > > > > diff --git a/include/hw/arm/allwinner-h3.h > > > b/include/hw/arm/allwinner-h3.h > > > > > index 5a25a92eae..9ed365507c 100644 > > > > > --- a/include/hw/arm/allwinner-h3.h > > > > > +++ b/include/hw/arm/allwinner-h3.h > > > > > @@ -46,6 +46,7 @@ > > > > > #include "hw/misc/allwinner-h3-ccu.h" > > > > > #include "hw/misc/allwinner-cpucfg.h" > > > > > #include "hw/misc/allwinner-h3-sysctrl.h" > > > > > +#include "hw/misc/allwinner-sid.h" > > > > > #include "target/arm/cpu.h" > > > > > /** > > > > > @@ -63,6 +64,7 @@ enum { > > > > > AW_H3_SRAM_A2, > > > > > AW_H3_SRAM_C, > > > > > AW_H3_SYSCTRL, > > > > > + AW_H3_SID, > > > > > AW_H3_EHCI0, > > > > > AW_H3_OHCI0, > > > > > AW_H3_EHCI1, > > > > > @@ -115,6 +117,7 @@ typedef struct AwH3State { > > > > > AwH3ClockCtlState ccu; > > > > > AwCpuCfgState cpucfg; > > > > > AwH3SysCtrlState sysctrl; > > > > > + AwSidState sid; > > > > > GICState gic; > > > > > MemoryRegion sram_a1; > > > > > MemoryRegion sram_a2; > > > > > diff --git a/include/hw/misc/allwinner-sid.h > > > b/include/hw/misc/allwinner-sid.h > > > > > new file mode 100644 > > > > > index 0000000000..41189967e2 > > > > > --- /dev/null > > > > > +++ b/include/hw/misc/allwinner-sid.h > > > > > @@ -0,0 +1,61 @@ > > > > > +/* > > > > > + * Allwinner Security ID emulation > > > > > + * > > > > > + * Copyright (C) 2019 Niek Linnenbank > > > > > + * > > > > > + * This program is free software: you can redistribute it and/or > > > modify > > > > > + * it under the terms of the GNU General Public License as > published > > > by > > > > > + * the Free Software Foundation, either version 2 of the License= , > or > > > > > + * (at your option) any later version. > > > > > + * > > > > > + * This program is distributed in the hope that it will be usefu= l, > > > > > + * but WITHOUT ANY WARRANTY; without even the implied warranty o= f > > > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > > > > + * GNU General Public License for more details. > > > > > + * > > > > > + * You should have received a copy of the GNU General Public > License > > > > > + * along with this program. If not, see < > > > http://www.gnu.org/licenses/>. > > > > > + */ > > > > > + > > > > > +#ifndef HW_MISC_ALLWINNER_SID_H > > > > > +#define HW_MISC_ALLWINNER_SID_H > > > > > + > > > > > +#include "qemu/osdep.h" > > > > > +#include "qom/object.h" > > > > > +#include "hw/sysbus.h" > > > > > +#include "qemu/uuid.h" > > > > > + > > > > > +/** > > > > > + * Object model > > > > > + * @{ > > > > > + */ > > > > > + > > > > > +#define TYPE_AW_SID "allwinner-sid" > > > > > +#define AW_SID(obj) \ > > > > > + OBJECT_CHECK(AwSidState, (obj), TYPE_AW_SID) > > > > > + > > > > > +/** @} */ > > > > > + > > > > > +/** > > > > > + * Allwinner Security ID object instance state > > > > > + */ > > > > > +typedef struct AwSidState { > > > > > + /*< private >*/ > > > > > + SysBusDevice parent_obj; > > > > > + /*< public >*/ > > > > > + > > > > > + /** Maps I/O registers in physical memory */ > > > > > + MemoryRegion iomem; > > > > > + > > > > > + /** Control register defines how and what to read */ > > > > > + uint32_t control; > > > > > + > > > > > + /** RdKey register contains the data retrieved by the device > */ > > > > > + uint32_t rdkey; > > > > > + > > > > > + /** Stores the emulated device identifier */ > > > > > + QemuUUID identifier; > > > > > + > > > > > +} AwSidState; > > > > > + > > > > > +#endif /* HW_MISC_ALLWINNER_SID_H */ > > > > > diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h3.c > > > > > index e9ad6d23df..af7317e86a 100644 > > > > > --- a/hw/arm/allwinner-h3.c > > > > > +++ b/hw/arm/allwinner-h3.c > > > > > @@ -36,6 +36,7 @@ const hwaddr allwinner_h3_memmap[] =3D { > > > > > [AW_H3_SRAM_A2] =3D 0x00044000, > > > > > [AW_H3_SRAM_C] =3D 0x00010000, > > > > > [AW_H3_SYSCTRL] =3D 0x01c00000, > > > > > + [AW_H3_SID] =3D 0x01c14000, > > > > > [AW_H3_EHCI0] =3D 0x01c1a000, > > > > > [AW_H3_OHCI0] =3D 0x01c1a400, > > > > > [AW_H3_EHCI1] =3D 0x01c1b000, > > > > > @@ -76,7 +77,6 @@ struct AwH3Unimplemented { > > > > > { "mmc0", 0x01c0f000, 4 * KiB }, > > > > > { "mmc1", 0x01c10000, 4 * KiB }, > > > > > { "mmc2", 0x01c11000, 4 * KiB }, > > > > > - { "sid", 0x01c14000, 1 * KiB }, > > > > > { "crypto", 0x01c15000, 4 * KiB }, > > > > > { "msgbox", 0x01c17000, 4 * KiB }, > > > > > { "spinlock", 0x01c18000, 4 * KiB }, > > > > > @@ -196,6 +196,11 @@ static void allwinner_h3_init(Object *obj) > > > > > sysbus_init_child_obj(obj, "cpucfg", &s->cpucfg, > > > sizeof(s->cpucfg), > > > > > TYPE_AW_CPUCFG); > > > > > + > > > > > + sysbus_init_child_obj(obj, "sid", &s->sid, sizeof(s->sid), > > > > > + TYPE_AW_SID); > > > > > + object_property_add_alias(obj, "identifier", OBJECT(&s->sid)= , > > > > > + "identifier", &error_abort); > > > > > } > > > > > static void allwinner_h3_realize(DeviceState *dev, Error **errp= ) > > > > > @@ -316,6 +321,10 @@ static void allwinner_h3_realize(DeviceState > > > *dev, Error **errp) > > > > > qdev_init_nofail(DEVICE(&s->cpucfg)); > > > > > sysbus_mmio_map(SYS_BUS_DEVICE(&s->cpucfg), 0, > > > s->memmap[AW_H3_CPUCFG]); > > > > > + /* Security Identifier */ > > > > > + qdev_init_nofail(DEVICE(&s->sid)); > > > > > + sysbus_mmio_map(SYS_BUS_DEVICE(&s->sid), 0, > s->memmap[AW_H3_SID]); > > > > > + > > > > > /* Universal Serial Bus */ > > > > > sysbus_create_simple(TYPE_AW_H3_EHCI, s->memmap[AW_H3_EHCI0= ], > > > > > qdev_get_gpio_in(DEVICE(&s->gic), > > > > > diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c > > > > > index 051184f14f..a7f870c88b 100644 > > > > > --- a/hw/arm/orangepi.c > > > > > +++ b/hw/arm/orangepi.c > > > > > @@ -54,6 +54,10 @@ static void orangepi_init(MachineState *machin= e) > > > > > object_property_set_int(OBJECT(s->h3), 24000000, "clk1-freq= ", > > > > > &error_abort); > > > > > + /* Setup SID properties */ > > > > > + qdev_prop_set_string(DEVICE(s->h3), "identifier", > > > > > + "8100c002-0001-0002-0003-000044556677")= ; > > > > > + > > > > > /* Mark H3 object realized */ > > > > > object_property_set_bool(OBJECT(s->h3), true, "realized", > > > &error_abort); > > > > > diff --git a/hw/misc/allwinner-sid.c b/hw/misc/allwinner-sid.c > > > > > new file mode 100644 > > > > > index 0000000000..954de935bc > > > > > --- /dev/null > > > > > +++ b/hw/misc/allwinner-sid.c > > > > > @@ -0,0 +1,170 @@ > > > > > +/* > > > > > + * Allwinner Security ID emulation > > > > > + * > > > > > + * Copyright (C) 2019 Niek Linnenbank > > > > > + * > > > > > + * This program is free software: you can redistribute it and/or > > > modify > > > > > + * it under the terms of the GNU General Public License as > published > > > by > > > > > + * the Free Software Foundation, either version 2 of the License= , > or > > > > > + * (at your option) any later version. > > > > > + * > > > > > + * This program is distributed in the hope that it will be usefu= l, > > > > > + * but WITHOUT ANY WARRANTY; without even the implied warranty o= f > > > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > > > > > + * GNU General Public License for more details. > > > > > + * > > > > > + * You should have received a copy of the GNU General Public > License > > > > > + * along with this program. If not, see < > > > http://www.gnu.org/licenses/>. > > > > > + */ > > > > > + > > > > > +#include "qemu/osdep.h" > > > > > +#include "qemu/units.h" > > > > > +#include "hw/sysbus.h" > > > > > +#include "migration/vmstate.h" > > > > > +#include "qemu/log.h" > > > > > +#include "qemu/module.h" > > > > > +#include "qemu/guest-random.h" > > > > > +#include "qapi/error.h" > > > > > +#include "hw/qdev-properties.h" > > > > > +#include "hw/misc/allwinner-sid.h" > > > > > +#include "trace.h" > > > > > + > > > > > +/* SID register offsets */ > > > > > +enum { > > > > > + REG_PRCTL =3D 0x40, /* Control */ > > > > > + REG_RDKEY =3D 0x60, /* Read Key */ > > > > > +}; > > > > > + > > > > > +/* SID register flags */ > > > > > +enum { > > > > > + REG_PRCTL_WRITE =3D 0x0002, /* Unknown write flag */ > > > > > + REG_PRCTL_OP_LOCK =3D 0xAC00, /* Lock operation */ > > > > > +}; > > > > > + > > > > > +static uint64_t allwinner_sid_read(void *opaque, hwaddr offset, > > > > > + unsigned size) > > > > > +{ > > > > > + const AwSidState *s =3D AW_SID(opaque); > > > > > + uint64_t val =3D 0; > > > > > + > > > > > + switch (offset) { > > > > > + case REG_PRCTL: /* Control */ > > > > > + val =3D s->control; > > > > > + break; > > > > > + case REG_RDKEY: /* Read Key */ > > > > > + val =3D s->rdkey; > > > > > + break; > > > > > + default: > > > > > + qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds offset > > > 0x%04x\n", > > > > > + __func__, (uint32_t)offset); > > > > > + return 0; > > > > > + } > > > > > + > > > > > + trace_allwinner_sid_read(offset, val, size); > > > > > + > > > > > + return val; > > > > > +} > > > > > + > > > > > +static void allwinner_sid_write(void *opaque, hwaddr offset, > > > > > + uint64_t val, unsigned size) > > > > > +{ > > > > > + AwSidState *s =3D AW_SID(opaque); > > > > > + > > > > > + trace_allwinner_sid_write(offset, val, size); > > > > > + > > > > > + switch (offset) { > > > > > + case REG_PRCTL: /* Control */ > > > > > + s->control =3D val; > > > > > + > > > > > + if ((s->control & REG_PRCTL_OP_LOCK) && > > > > > + (s->control & REG_PRCTL_WRITE)) { > > > > > + uint32_t id =3D s->control >> 16; > > > > > + > > > > > + if (id < sizeof(QemuUUID)) { > > > > > + s->rdkey =3D (s->identifier.data[id]) | > > > > > + (s->identifier.data[id + 1] << 8) | > > > > > + (s->identifier.data[id + 2] << 16) | > > > > > + (s->identifier.data[id + 3] << 24); > > > > > + } > > > > > + } > > > > > + s->control &=3D ~REG_PRCTL_WRITE; > > > > > + break; > > > > > + case REG_RDKEY: /* Read Key */ > > > > > + break; > > > > > + default: > > > > > + qemu_log_mask(LOG_GUEST_ERROR, "%s: out-of-bounds offset > > > 0x%04x\n", > > > > > + __func__, (uint32_t)offset); > > > > > + break; > > > > > + } > > > > > +} > > > > > + > > > > > +static const MemoryRegionOps allwinner_sid_ops =3D { > > > > > + .read =3D allwinner_sid_read, > > > > > + .write =3D allwinner_sid_write, > > > > > + .endianness =3D DEVICE_NATIVE_ENDIAN, > > > > > + .valid =3D { > > > > > + .min_access_size =3D 4, > > > > > + .max_access_size =3D 4, > > > > > + }, > > > > > + .impl.min_access_size =3D 4, > > > > > +}; > > > > > + > > > > > +static void allwinner_sid_reset(DeviceState *dev) > > > > > +{ > > > > > + AwSidState *s =3D AW_SID(dev); > > > > > + > > > > > + /* Set default values for registers */ > > > > > + s->control =3D 0; > > > > > + s->rdkey =3D 0; > > > > > +} > > > > > + > > > > > +static void allwinner_sid_init(Object *obj) > > > > > +{ > > > > > + SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); > > > > > + AwSidState *s =3D AW_SID(obj); > > > > > + > > > > > + /* Memory mapping */ > > > > > + memory_region_init_io(&s->iomem, OBJECT(s), > &allwinner_sid_ops, s, > > > > > + TYPE_AW_SID, 1 * KiB); > > > > > + sysbus_init_mmio(sbd, &s->iomem); > > > > > +} > > > > > + > > > > > +static Property allwinner_sid_properties[] =3D { > > > > > + DEFINE_PROP_UUID_NODEFAULT("identifier", AwSidState, > identifier), > > > > > + DEFINE_PROP_END_OF_LIST() > > > > > +}; > > > > > + > > > > > +static const VMStateDescription allwinner_sid_vmstate =3D { > > > > > + .name =3D "allwinner-sid", > > > > > + .version_id =3D 1, > > > > > + .minimum_version_id =3D 1, > > > > > + .fields =3D (VMStateField[]) { > > > > > + VMSTATE_UINT32(control, AwSidState), > > > > > + VMSTATE_UINT32(rdkey, AwSidState), > > > > > + VMSTATE_END_OF_LIST() > > > > > + } > > > > > +}; > > > > > + > > > > > +static void allwinner_sid_class_init(ObjectClass *klass, void > *data) > > > > > +{ > > > > > + DeviceClass *dc =3D DEVICE_CLASS(klass); > > > > > + > > > > > + dc->reset =3D allwinner_sid_reset; > > > > > + dc->vmsd =3D &allwinner_sid_vmstate; > > > > > + dc->props =3D allwinner_sid_properties; > > > > > +} > > > > > + > > > > > +static const TypeInfo allwinner_sid_info =3D { > > > > > + .name =3D TYPE_AW_SID, > > > > > + .parent =3D TYPE_SYS_BUS_DEVICE, > > > > > + .instance_init =3D allwinner_sid_init, > > > > > + .instance_size =3D sizeof(AwSidState), > > > > > + .class_init =3D allwinner_sid_class_init, > > > > > +}; > > > > > + > > > > > +static void allwinner_sid_register(void) > > > > > +{ > > > > > + type_register_static(&allwinner_sid_info); > > > > > +} > > > > > + > > > > > +type_init(allwinner_sid_register) > > > > > diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs > > > > > index 12c2c306b5..59500d5681 100644 > > > > > --- a/hw/misc/Makefile.objs > > > > > +++ b/hw/misc/Makefile.objs > > > > > @@ -31,6 +31,7 @@ common-obj-$(CONFIG_IVSHMEM_DEVICE) +=3D ivshme= m.o > > > > > common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-ccu.o > > > > > obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-cpucfg.o > > > > > common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-h3-sysctrl.o > > > > > +common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-sid.o > > > > > common-obj-$(CONFIG_REALVIEW) +=3D arm_sysctl.o > > > > > common-obj-$(CONFIG_NSERIES) +=3D cbus.o > > > > > common-obj-$(CONFIG_ECCMEMCTL) +=3D eccmemctl.o > > > > > diff --git a/hw/misc/trace-events b/hw/misc/trace-events > > > > > index d3e0952429..67d8bf493c 100644 > > > > > --- a/hw/misc/trace-events > > > > > +++ b/hw/misc/trace-events > > > > > @@ -5,6 +5,10 @@ allwinner_cpucfg_cpu_reset(uint8_t cpu_id, > uint32_t > > > reset_addr) "id %u, reset_ad > > > > > allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned > size) > > > "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 > > > > > allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned > > > size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 > > > > > +# allwinner-sid.c > > > > > +allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size= ) > > > "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 > > > > > +allwinner_sid_write(uint64_t offset, uint64_t data, unsigned siz= e) > > > "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 > > > > > + > > > > > # eccmemctl.c > > > > > ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x" > > > > > ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x" > > > > > > > > > > > > > > > > > > -- > > Niek Linnenbank > --=20 Niek Linnenbank --0000000000009bdd44059deeb005 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Corey,

On Mon, Feb 3, 2020 at 2:10 PM Corey Min= yard <cminyard@mvista.com>= wrote:
On Sun, = Feb 02, 2020 at 10:27:49PM +0100, Niek Linnenbank wrote:
> Hi Corey,
>
> Thanks for reviewing!
>
> On Mon, Jan 20, 2020 at 6:59 PM Corey Minyard <cminyard@mvista.com> wrote:
>
> > On Sat, Jan 18, 2020 at 04:25:08PM +0100, Philippe Mathieu-Daud= =C3=A9 wrote:
> > > Cc'ing Corey/David for good advices about using UUID. > >
> > Is there any reason you didn't use the built-in qemu UUID for= this?=C2=A0 It
> > would simplify things in general.
> >
>
> Currently the Allwinner SID device is using the QemuUUID type from
> include/qemu/uuid.h.
> Is that the build-in UUID you are referring to or should I use somethi= ng
> else?

You are using the QemuUUID type, which is of course what you should do,
but you aren't using the UUID generated by qemu (at least that I can fi= nd).
That in include/sysemu/sysemu.h and is named qemu_uuid.=C2=A0 Whether you should use that or not depends on your needs.=C2=A0 If you just need some uuid, then that's what you should probably use.=C2=A0 If you need somet= hing
the user can individually control for this device, for instance, then
that probably won't do.

Ah I did no= t know about the qemu_uuid variable, thanks for pointing that out.
Basically the SID identifier is a number that is unique for each board th= at comes
out of the factory. It is currently used by U-Boot to as= input to generate a MAC address.

If I understand = correctly, qemu_uuid is optional and by default zero.
However th= e SID value should not be zero, as otherwise U-Boot can't pick a MAC ad= dress
resulting in a non-working ethernet device.
<= br>
Currently the hw/arm/orangepi.c machine specifies a fixed SID= to be used for the emulated board,
also containing a prefix (810= 0c002) that indicates the H3 chipset. One thing that I am strugling with is= that
I'm not able to override the property using '-globa= l', if hw/arm/orangepi.c initializes the property with qdev_prop_set_st= ring:

$ qemu-system-arm -M orangepi-pc -kernel= u-boot -nographic -nic user \
-global allwinner-sid.identifi= er=3D8100c002-0001-0002-0003-000044556688
=C2=A0
If I d= on't set the property in hw/arm/orangepi.c, I can set it with '-glo= bal'. Do you perhaps have a
recommendation how to improve tha= t? Basically what is needed is that the machine sets the default
= property including the chip prefix, and that the user can override it. Alth= ough it is not required for a
working emulated board, it would be= a nice-to-have that the user can set it.


>
>
> > Also, in case no one else say, you have tabs in your code that yo= u need
> > to get rid of.
> >
> >
> If there are any tabs in the code, it was not intended. I re-checked t= his
> patch and others
> again but found no tabs in the code.
> Could you please point out where you found the extra tabs?

My apologies, I saw 1-character misalignments, and that usually means
that there's a tab.=C2=A0 But it looks like it has something to do with= the
way it was forwarded.=C2=A0 I didn't get the original email.

Ah yes that is possible indeed. I'll add you to t= he CC list for the next version of this patch series.

<= div>Regards,
Niek
=C2=A0
-corey

>
> Regards,
> Niek
>
>
> > -corey
> >
> > >
> > > On 1/8/20 9:00 PM, Niek Linnenbank wrote:
> > > > The Security Identifier device found in various Allwinn= er System on
> > Chip
> > > > designs gives applications a per-board unique identifie= r. This commit
> > > > adds support for the Allwinner Security Identifier usin= g a 128-bit
> > > > UUID value as input.
> > > >
> > > > Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com><= br> > > > > ---
> > > >=C2=A0 =C2=A0include/hw/arm/allwinner-h3.h=C2=A0 =C2=A0|= =C2=A0 =C2=A03 +
> > > >=C2=A0 =C2=A0include/hw/misc/allwinner-sid.h |=C2=A0 61 = ++++++++++++
> > > >=C2=A0 =C2=A0hw/arm/allwinner-h3.c=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0|=C2=A0 11 ++-
> > > >=C2=A0 =C2=A0hw/arm/orangepi.c=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0|=C2=A0 =C2=A04 +
> > > >=C2=A0 =C2=A0hw/misc/allwinner-sid.c=C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0| 170
> > ++++++++++++++++++++++++++++++++
> > > >=C2=A0 =C2=A0hw/misc/Makefile.objs=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0|=C2=A0 =C2=A01 +
> > > >=C2=A0 =C2=A0hw/misc/trace-events=C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 |=C2=A0 =C2=A04 +
> > > >=C2=A0 =C2=A07 files changed, 253 insertions(+), 1 delet= ion(-)
> > > >=C2=A0 =C2=A0create mode 100644 include/hw/misc/allwinne= r-sid.h
> > > >=C2=A0 =C2=A0create mode 100644 hw/misc/allwinner-sid.c<= br> > > > >
> > > > diff --git a/include/hw/arm/allwinner-h3.h
> > b/include/hw/arm/allwinner-h3.h
> > > > index 5a25a92eae..9ed365507c 100644
> > > > --- a/include/hw/arm/allwinner-h3.h
> > > > +++ b/include/hw/arm/allwinner-h3.h
> > > > @@ -46,6 +46,7 @@
> > > >=C2=A0 =C2=A0#include "hw/misc/allwinner-h3-ccu.h&q= uot;
> > > >=C2=A0 =C2=A0#include "hw/misc/allwinner-cpucfg.h&q= uot;
> > > >=C2=A0 =C2=A0#include "hw/misc/allwinner-h3-sysctrl= .h"
> > > > +#include "hw/misc/allwinner-sid.h"
> > > >=C2=A0 =C2=A0#include "target/arm/cpu.h"
> > > >=C2=A0 =C2=A0/**
> > > > @@ -63,6 +64,7 @@ enum {
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_SRAM_A2,
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_SRAM_C,
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_SYSCTRL,
> > > > +=C2=A0 =C2=A0 AW_H3_SID,
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_EHCI0,
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_OHCI0,
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0AW_H3_EHCI1,
> > > > @@ -115,6 +117,7 @@ typedef struct AwH3State {
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0AwH3ClockCtlState ccu;
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0AwCpuCfgState cpucfg;
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0AwH3SysCtrlState sysctrl;
> > > > +=C2=A0 =C2=A0 AwSidState sid;
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0GICState gic;
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0MemoryRegion sram_a1;
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0MemoryRegion sram_a2;
> > > > diff --git a/include/hw/misc/allwinner-sid.h
> > b/include/hw/misc/allwinner-sid.h
> > > > new file mode 100644
> > > > index 0000000000..41189967e2
> > > > --- /dev/null
> > > > +++ b/include/hw/misc/allwinner-sid.h
> > > > @@ -0,0 +1,61 @@
> > > > +/*
> > > > + * Allwinner Security ID emulation
> > > > + *
> > > > + * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com<= /a>>
> > > > + *
> > > > + * This program is free software: you can redistribute= it and/or
> > modify
> > > > + * it under the terms of the GNU General Public Licens= e as published
> > by
> > > > + * the Free Software Foundation, either version 2 of t= he License, or
> > > > + * (at your option) any later version.
> > > > + *
> > > > + * This program is distributed in the hope that it wil= l be useful,
> > > > + * but WITHOUT ANY WARRANTY; without even the implied = warranty of
> > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE= .=C2=A0 See the
> > > > + * GNU General Public License for more details.
> > > > + *
> > > > + * You should have received a copy of the GNU General = Public License
> > > > + * along with this program.=C2=A0 If not, see <
> > http://www.gnu.org/licenses/>.
> > > > + */
> > > > +
> > > > +#ifndef HW_MISC_ALLWINNER_SID_H
> > > > +#define HW_MISC_ALLWINNER_SID_H
> > > > +
> > > > +#include "qemu/osdep.h"
> > > > +#include "qom/object.h"
> > > > +#include "hw/sysbus.h"
> > > > +#include "qemu/uuid.h"
> > > > +
> > > > +/**
> > > > + * Object model
> > > > + * @{
> > > > + */
> > > > +
> > > > +#define TYPE_AW_SID=C2=A0 =C2=A0 "allwinner-sid&q= uot;
> > > > +#define AW_SID(obj) \
> > > > +=C2=A0 =C2=A0 OBJECT_CHECK(AwSidState, (obj), TYPE_AW_= SID)
> > > > +
> > > > +/** @} */
> > > > +
> > > > +/**
> > > > + * Allwinner Security ID object instance state
> > > > + */
> > > > +typedef struct AwSidState {
> > > > +=C2=A0 =C2=A0 /*< private >*/
> > > > +=C2=A0 =C2=A0 SysBusDevice parent_obj;
> > > > +=C2=A0 =C2=A0 /*< public >*/
> > > > +
> > > > +=C2=A0 =C2=A0 /** Maps I/O registers in physical memor= y */
> > > > +=C2=A0 =C2=A0 MemoryRegion iomem;
> > > > +
> > > > +=C2=A0 =C2=A0 /** Control register defines how and wha= t to read */
> > > > +=C2=A0 =C2=A0 uint32_t control;
> > > > +
> > > > +=C2=A0 =C2=A0 /** RdKey register contains the data ret= rieved by the device */
> > > > +=C2=A0 =C2=A0 uint32_t rdkey;
> > > > +
> > > > +=C2=A0 =C2=A0 /** Stores the emulated device identifie= r */
> > > > +=C2=A0 =C2=A0 QemuUUID identifier;
> > > > +
> > > > +} AwSidState;
> > > > +
> > > > +#endif /* HW_MISC_ALLWINNER_SID_H */
> > > > diff --git a/hw/arm/allwinner-h3.c b/hw/arm/allwinner-h= 3.c
> > > > index e9ad6d23df..af7317e86a 100644
> > > > --- a/hw/arm/allwinner-h3.c
> > > > +++ b/hw/arm/allwinner-h3.c
> > > > @@ -36,6 +36,7 @@ const hwaddr allwinner_h3_memmap[] = =3D {
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_SRAM_A2]=C2=A0 =C2=A0 = =3D 0x00044000,
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_SRAM_C]=C2=A0 =C2=A0 = =C2=A0=3D 0x00010000,
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_SYSCTRL]=C2=A0 =C2=A0 = =3D 0x01c00000,
> > > > +=C2=A0 =C2=A0 [AW_H3_SID]=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =3D 0x01c14000,
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_EHCI0]=C2=A0 =C2=A0 = =C2=A0 =3D 0x01c1a000,
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_OHCI0]=C2=A0 =C2=A0 = =C2=A0 =3D 0x01c1a400,
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0[AW_H3_EHCI1]=C2=A0 =C2=A0 = =C2=A0 =3D 0x01c1b000,
> > > > @@ -76,7 +77,6 @@ struct AwH3Unimplemented {
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "mmc0",=C2=A0 =C2= =A0 =C2=A0 0x01c0f000, 4 * KiB },
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "mmc1",=C2=A0 =C2= =A0 =C2=A0 0x01c10000, 4 * KiB },
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "mmc2",=C2=A0 =C2= =A0 =C2=A0 0x01c11000, 4 * KiB },
> > > > -=C2=A0 =C2=A0 { "sid",=C2=A0 =C2=A0 =C2=A0 = =C2=A00x01c14000, 1 * KiB },
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "crypto",=C2=A0 = =C2=A0 0x01c15000, 4 * KiB },
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "msgbox",=C2=A0 = =C2=A0 0x01c17000, 4 * KiB },
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0{ "spinlock",=C2=A0= 0x01c18000, 4 * KiB },
> > > > @@ -196,6 +196,11 @@ static void allwinner_h3_init(Obje= ct *obj)
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0sysbus_init_child_obj(obj, &q= uot;cpucfg", &s->cpucfg,
> > sizeof(s->cpucfg),
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0TYPE_AW_CPUCFG);
> > > > +
> > > > +=C2=A0 =C2=A0 sysbus_init_child_obj(obj, "sid&quo= t;, &s->sid, sizeof(s->sid),
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 TYPE_AW_SID);
> > > > +=C2=A0 =C2=A0 object_property_add_alias(obj, "ide= ntifier", OBJECT(&s->sid),
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 "identifier"= , &error_abort);
> > > >=C2=A0 =C2=A0}
> > > >=C2=A0 =C2=A0static void allwinner_h3_realize(DeviceStat= e *dev, Error **errp)
> > > > @@ -316,6 +321,10 @@ static void allwinner_h3_realize(D= eviceState
> > *dev, Error **errp)
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0qdev_init_nofail(DEVICE(&= s->cpucfg));
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0sysbus_mmio_map(SYS_BUS_DEVIC= E(&s->cpucfg), 0,
> > s->memmap[AW_H3_CPUCFG]);
> > > > +=C2=A0 =C2=A0 /* Security Identifier */
> > > > +=C2=A0 =C2=A0 qdev_init_nofail(DEVICE(&s->sid))= ;
> > > > +=C2=A0 =C2=A0 sysbus_mmio_map(SYS_BUS_DEVICE(&s-&g= t;sid), 0, s->memmap[AW_H3_SID]);
> > > > +
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0/* Universal Serial Bus */ > > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0sysbus_create_simple(TYPE_AW_= H3_EHCI, s->memmap[AW_H3_EHCI0],
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 qdev_get_gpio_in(DEVICE(&s-&g= t;gic),
> > > > diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c
> > > > index 051184f14f..a7f870c88b 100644
> > > > --- a/hw/arm/orangepi.c
> > > > +++ b/hw/arm/orangepi.c
> > > > @@ -54,6 +54,10 @@ static void orangepi_init(MachineSta= te *machine)
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0object_property_set_int(OBJEC= T(s->h3), 24000000, "clk1-freq",
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0&error_abort); > > > > +=C2=A0 =C2=A0 /* Setup SID properties */
> > > > +=C2=A0 =C2=A0 qdev_prop_set_string(DEVICE(s->h3), &= quot;identifier",
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0"8100c002-0001-0002-0003-0000445= 56677");
> > > > +
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0/* Mark H3 object realized */=
> > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0object_property_set_bool(OBJE= CT(s->h3), true, "realized",
> > &error_abort);
> > > > diff --git a/hw/misc/allwinner-sid.c b/hw/misc/allwinne= r-sid.c
> > > > new file mode 100644
> > > > index 0000000000..954de935bc
> > > > --- /dev/null
> > > > +++ b/hw/misc/allwinner-sid.c
> > > > @@ -0,0 +1,170 @@
> > > > +/*
> > > > + * Allwinner Security ID emulation
> > > > + *
> > > > + * Copyright (C) 2019 Niek Linnenbank <nieklinnenbank@gmail.com<= /a>>
> > > > + *
> > > > + * This program is free software: you can redistribute= it and/or
> > modify
> > > > + * it under the terms of the GNU General Public Licens= e as published
> > by
> > > > + * the Free Software Foundation, either version 2 of t= he License, or
> > > > + * (at your option) any later version.
> > > > + *
> > > > + * This program is distributed in the hope that it wil= l be useful,
> > > > + * but WITHOUT ANY WARRANTY; without even the implied = warranty of
> > > > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE= .=C2=A0 See the
> > > > + * GNU General Public License for more details.
> > > > + *
> > > > + * You should have received a copy of the GNU General = Public License
> > > > + * along with this program.=C2=A0 If not, see <
> > http://www.gnu.org/licenses/>.
> > > > + */
> > > > +
> > > > +#include "qemu/osdep.h"
> > > > +#include "qemu/units.h"
> > > > +#include "hw/sysbus.h"
> > > > +#include "migration/vmstate.h"
> > > > +#include "qemu/log.h"
> > > > +#include "qemu/module.h"
> > > > +#include "qemu/guest-random.h"
> > > > +#include "qapi/error.h"
> > > > +#include "hw/qdev-properties.h"
> > > > +#include "hw/misc/allwinner-sid.h"
> > > > +#include "trace.h"
> > > > +
> > > > +/* SID register offsets */
> > > > +enum {
> > > > +=C2=A0 =C2=A0 REG_PRCTL =3D 0x40,=C2=A0 =C2=A0/* Contr= ol */
> > > > +=C2=A0 =C2=A0 REG_RDKEY =3D 0x60,=C2=A0 =C2=A0/* Read = Key */
> > > > +};
> > > > +
> > > > +/* SID register flags */
> > > > +enum {
> > > > +=C2=A0 =C2=A0 REG_PRCTL_WRITE=C2=A0 =C2=A0=3D 0x0002, = /* Unknown write flag */
> > > > +=C2=A0 =C2=A0 REG_PRCTL_OP_LOCK =3D 0xAC00, /* Lock op= eration */
> > > > +};
> > > > +
> > > > +static uint64_t allwinner_sid_read(void *opaque, hwadd= r offset,
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0un= signed size)
> > > > +{
> > > > +=C2=A0 =C2=A0 const AwSidState *s =3D AW_SID(opaque);<= br> > > > > +=C2=A0 =C2=A0 uint64_t val =3D 0;
> > > > +
> > > > +=C2=A0 =C2=A0 switch (offset) {
> > > > +=C2=A0 =C2=A0 case REG_PRCTL:=C2=A0 =C2=A0 /* Control = */
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 val =3D s->control;
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
> > > > +=C2=A0 =C2=A0 case REG_RDKEY:=C2=A0 =C2=A0 /* Read Key= */
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 val =3D s->rdkey;
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
> > > > +=C2=A0 =C2=A0 default:
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_log_mask(LOG_GUEST_ER= ROR, "%s: out-of-bounds offset
> > 0x%04x\n",
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 __func__, (uint32_t)offset);
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return 0;
> > > > +=C2=A0 =C2=A0 }
> > > > +
> > > > +=C2=A0 =C2=A0 trace_allwinner_sid_read(offset, val, si= ze);
> > > > +
> > > > +=C2=A0 =C2=A0 return val;
> > > > +}
> > > > +
> > > > +static void allwinner_sid_write(void *opaque, hwaddr o= ffset,
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 uint64_t val, u= nsigned size)
> > > > +{
> > > > +=C2=A0 =C2=A0 AwSidState *s =3D AW_SID(opaque);
> > > > +
> > > > +=C2=A0 =C2=A0 trace_allwinner_sid_write(offset, val, s= ize);
> > > > +
> > > > +=C2=A0 =C2=A0 switch (offset) {
> > > > +=C2=A0 =C2=A0 case REG_PRCTL:=C2=A0 =C2=A0 /* Control = */
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 s->control =3D val;
> > > > +
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 if ((s->control & R= EG_PRCTL_OP_LOCK) &&
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 (s->contr= ol & REG_PRCTL_WRITE)) {
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 uint32_t id = =3D s->control >> 16;
> > > > +
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (id < = sizeof(QemuUUID)) {
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 s->rdkey =3D (s->identifier.data[id]) |
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(s->identifier.data[id + 1]= << 8) |
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(s->identifier.data[id + 2]= << 16) |
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0(s->identifier.data[id + 3]= << 24);
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 s->control &=3D ~RE= G_PRCTL_WRITE;
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
> > > > +=C2=A0 =C2=A0 case REG_RDKEY:=C2=A0 =C2=A0 /* Read Key= */
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
> > > > +=C2=A0 =C2=A0 default:
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 qemu_log_mask(LOG_GUEST_ER= ROR, "%s: out-of-bounds offset
> > 0x%04x\n",
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 __func__, (uint32_t)offset);
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 break;
> > > > +=C2=A0 =C2=A0 }
> > > > +}
> > > > +
> > > > +static const MemoryRegionOps allwinner_sid_ops =3D { > > > > +=C2=A0 =C2=A0 .read =3D allwinner_sid_read,
> > > > +=C2=A0 =C2=A0 .write =3D allwinner_sid_write,
> > > > +=C2=A0 =C2=A0 .endianness =3D DEVICE_NATIVE_ENDIAN, > > > > +=C2=A0 =C2=A0 .valid =3D {
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 .min_access_size =3D 4, > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 .max_access_size =3D 4, > > > > +=C2=A0 =C2=A0 },
> > > > +=C2=A0 =C2=A0 .impl.min_access_size =3D 4,
> > > > +};
> > > > +
> > > > +static void allwinner_sid_reset(DeviceState *dev)
> > > > +{
> > > > +=C2=A0 =C2=A0 AwSidState *s =3D AW_SID(dev);
> > > > +
> > > > +=C2=A0 =C2=A0 /* Set default values for registers */ > > > > +=C2=A0 =C2=A0 s->control =3D 0;
> > > > +=C2=A0 =C2=A0 s->rdkey =3D 0;
> > > > +}
> > > > +
> > > > +static void allwinner_sid_init(Object *obj)
> > > > +{
> > > > +=C2=A0 =C2=A0 SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj= );
> > > > +=C2=A0 =C2=A0 AwSidState *s =3D AW_SID(obj);
> > > > +
> > > > +=C2=A0 =C2=A0 /* Memory mapping */
> > > > +=C2=A0 =C2=A0 memory_region_init_io(&s->iomem, = OBJECT(s), &allwinner_sid_ops, s,
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0TYPE_AW_SID, 1 * KiB);
> > > > +=C2=A0 =C2=A0 sysbus_init_mmio(sbd, &s->iomem);=
> > > > +}
> > > > +
> > > > +static Property allwinner_sid_properties[] =3D {
> > > > +=C2=A0 =C2=A0 DEFINE_PROP_UUID_NODEFAULT("identif= ier", AwSidState, identifier),
> > > > +=C2=A0 =C2=A0 DEFINE_PROP_END_OF_LIST()
> > > > +};
> > > > +
> > > > +static const VMStateDescription allwinner_sid_vmstate = =3D {
> > > > +=C2=A0 =C2=A0 .name =3D "allwinner-sid",
> > > > +=C2=A0 =C2=A0 .version_id =3D 1,
> > > > +=C2=A0 =C2=A0 .minimum_version_id =3D 1,
> > > > +=C2=A0 =C2=A0 .fields =3D (VMStateField[]) {
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 VMSTATE_UINT32(control, Aw= SidState),
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 VMSTATE_UINT32(rdkey, AwSi= dState),
> > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 VMSTATE_END_OF_LIST()
> > > > +=C2=A0 =C2=A0 }
> > > > +};
> > > > +
> > > > +static void allwinner_sid_class_init(ObjectClass *klas= s, void *data)
> > > > +{
> > > > +=C2=A0 =C2=A0 DeviceClass *dc =3D DEVICE_CLASS(klass);=
> > > > +
> > > > +=C2=A0 =C2=A0 dc->reset =3D allwinner_sid_reset; > > > > +=C2=A0 =C2=A0 dc->vmsd =3D &allwinner_sid_vmsta= te;
> > > > +=C2=A0 =C2=A0 dc->props =3D allwinner_sid_propertie= s;
> > > > +}
> > > > +
> > > > +static const TypeInfo allwinner_sid_info =3D {
> > > > +=C2=A0 =C2=A0 .name=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =3D TYPE_AW_SID,
> > > > +=C2=A0 =C2=A0 .parent=C2=A0 =C2=A0 =C2=A0 =C2=A0 =3D T= YPE_SYS_BUS_DEVICE,
> > > > +=C2=A0 =C2=A0 .instance_init =3D allwinner_sid_init, > > > > +=C2=A0 =C2=A0 .instance_size =3D sizeof(AwSidState), > > > > +=C2=A0 =C2=A0 .class_init=C2=A0 =C2=A0 =3D allwinner_s= id_class_init,
> > > > +};
> > > > +
> > > > +static void allwinner_sid_register(void)
> > > > +{
> > > > +=C2=A0 =C2=A0 type_register_static(&allwinner_sid_= info);
> > > > +}
> > > > +
> > > > +type_init(allwinner_sid_register)
> > > > diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.o= bjs
> > > > index 12c2c306b5..59500d5681 100644
> > > > --- a/hw/misc/Makefile.objs
> > > > +++ b/hw/misc/Makefile.objs
> > > > @@ -31,6 +31,7 @@ common-obj-$(CONFIG_IVSHMEM_DEVICE) += =3D ivshmem.o
> > > >=C2=A0 =C2=A0common-obj-$(CONFIG_ALLWINNER_H3) +=3D allw= inner-h3-ccu.o
> > > >=C2=A0 =C2=A0obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-c= pucfg.o
> > > >=C2=A0 =C2=A0common-obj-$(CONFIG_ALLWINNER_H3) +=3D allw= inner-h3-sysctrl.o
> > > > +common-obj-$(CONFIG_ALLWINNER_H3) +=3D allwinner-sid.o=
> > > >=C2=A0 =C2=A0common-obj-$(CONFIG_REALVIEW) +=3D arm_sysc= tl.o
> > > >=C2=A0 =C2=A0common-obj-$(CONFIG_NSERIES) +=3D cbus.o > > > >=C2=A0 =C2=A0common-obj-$(CONFIG_ECCMEMCTL) +=3D eccmemc= tl.o
> > > > diff --git a/hw/misc/trace-events b/hw/misc/trace-event= s
> > > > index d3e0952429..67d8bf493c 100644
> > > > --- a/hw/misc/trace-events
> > > > +++ b/hw/misc/trace-events
> > > > @@ -5,6 +5,10 @@ allwinner_cpucfg_cpu_reset(uint8_t cpu= _id, uint32_t
> > reset_addr) "id %u, reset_ad
> > > >=C2=A0 =C2=A0allwinner_cpucfg_read(uint64_t offset, uint= 64_t data, unsigned size)
> > "offset 0x%" PRIx64 " data 0x%" PRIx64 "= size %" PRIu32
> > > >=C2=A0 =C2=A0allwinner_cpucfg_write(uint64_t offset, uin= t64_t data, unsigned
> > size) "offset 0x%" PRIx64 " data 0x%" PRIx64 = " size %" PRIu32
> > > > +# allwinner-sid.c
> > > > +allwinner_sid_read(uint64_t offset, uint64_t data, uns= igned size)
> > "offset 0x%" PRIx64 " data 0x%" PRIx64 "= size %" PRIu32
> > > > +allwinner_sid_write(uint64_t offset, uint64_t data, un= signed size)
> > "offset 0x%" PRIx64 " data 0x%" PRIx64 "= size %" PRIu32
> > > > +
> > > >=C2=A0 =C2=A0# eccmemctl.c
> > > >=C2=A0 =C2=A0ecc_mem_writel_mer(uint32_t val) "Writ= e memory enable 0x%08x"
> > > >=C2=A0 =C2=A0ecc_mem_writel_mdr(uint32_t val) "Writ= e memory delay 0x%08x"
> > > >
> > >
> >
>
>
> --
> Niek Linnenbank


--
Niek Linnenbank

--0000000000009bdd44059deeb005--