From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F37EC47082 for ; Tue, 8 Jun 2021 23:15:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1A03561182 for ; Tue, 8 Jun 2021 23:15:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235460AbhFHXRW (ORCPT ); Tue, 8 Jun 2021 19:17:22 -0400 Received: from mail-pg1-f174.google.com ([209.85.215.174]:36495 "EHLO mail-pg1-f174.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231830AbhFHXRM (ORCPT ); Tue, 8 Jun 2021 19:17:12 -0400 Received: by mail-pg1-f174.google.com with SMTP id 27so17831659pgy.3 for ; Tue, 08 Jun 2021 16:15:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=intel-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=jXUtjhMOh+0tg+IRns9ha7x4hEaYHHewg4eF1b76BTA=; b=Z1MP8S1pfzMA8xMDMkJ5kzsJH1/PDvSAB4/58RPh3nnbT52KqmXdh/x+q5YOrNJHnd sUTLuttECdbp+qbwuq3A4rykvwg3aHm69p9kgjVcD5UPQ/gNbgBdgpcEfQMsWHo0aH8f MiGCrD8ztrLVo6jb9Ixckjpy9aeXUXP71FyjJKJYlNBi8Lv/HDYww2/SWSXlv9geO1lQ DbLrH4Q4Pw/nMpo97TYzirpvXODI/xmq802IwLJZC0XpJm7sW+53Wiv/LQz3MdTx9uY5 FkIfOV2djjIathafSAPdud4/bG6Vouhl7k++3ZYljElu+GZZ39SYL1Fw8N/YehBuUTIy iEMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=jXUtjhMOh+0tg+IRns9ha7x4hEaYHHewg4eF1b76BTA=; b=kDampliyz+Gsgj6wuZjOxgIctlafCcVpVZizPz1AaKd3EooVOS/LIIRa1GOGe9Zr09 lgyG38BnY2TPEXSU0lsnbQiCDyh/W40ZtgkCRQeXR/5h6rS2oZibnFXeKFaO6fuvKQOC 99zLPKoaGXzbvlgpEHIyd+aF2JNsTz/cZHyLCDaQ/b/PIWYsZE7L8LYC9X4Y1O0NXdAm GyW9NEp0efdERLGchWOOrFggh1CSYo7FgGQfz8SSAuzF5s4FmFMIjKRET7AYAdArQSpj NoLNXk6e5P4LHUzB3Ht+GcNKgy2k53mN4UjHHvKQH8ScVxZq1YuWOVGEfYqQyQEeB1iV GtLw== X-Gm-Message-State: AOAM532aQWHEAiuJve2VpjroDdvsXducVP361tQvDiFHQfoPD6sRxPmo DdmJj/mnlEI9dxHZqxh2S5X6yjbUdIZD6+ZxGNB6EQ== X-Google-Smtp-Source: ABdhPJzIFMsqky9VUawt+T04QUpjzybOyiLohId2ziaPmX/FsIKltRrhCKmFwTy69/FkjApW3I4TA0TCkecLtHB82tE= X-Received: by 2002:a63:5c4a:: with SMTP id n10mr640993pgm.279.1623194059104; Tue, 08 Jun 2021 16:14:19 -0700 (PDT) MIME-Version: 1.0 References: <20210524232735.801740-1-sathyanarayanan.kuppuswamy@linux.intel.com> <20210527212502.1061857-1-sathyanarayanan.kuppuswamy@linux.intel.com> In-Reply-To: <20210527212502.1061857-1-sathyanarayanan.kuppuswamy@linux.intel.com> From: Dan Williams Date: Tue, 8 Jun 2021 16:14:08 -0700 Message-ID: Subject: Re: [RFC v2-fix-v4 1/1] x86/boot: Avoid #VE during boot for TDX platforms To: Kuppuswamy Sathyanarayanan Cc: Peter Zijlstra , Andy Lutomirski , Dave Hansen , Tony Luck , Andi Kleen , Kirill Shutemov , Kuppuswamy Sathyanarayanan , Raj Ashok , Sean Christopherson , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, May 27, 2021 at 2:25 PM Kuppuswamy Sathyanarayanan wrote: > > From: Sean Christopherson > > There are a few MSRs and control register bits which the kernel > normally needs to modify during boot. But, TDX disallows > modification of these registers to help provide consistent > security guarantees. Fortunately, TDX ensures that these are all > in the correct state before the kernel loads, which means the > kernel has no need to modify them. > > The conditions to avoid are: > > * Any writes to the EFER MSR > * Clearing CR0.NE > * Clearing CR3.MCE > > This theoretically makes guest boot more fragile. If, for > instance, EFER was set up incorrectly and a WRMSR was performed, > it will trigger early exception panic or a triple fault, if it's > before early exceptions are set up. However, this is likely to > trip up the guest BIOS long before control reaches the kernel. In > any case, these kinds of problems are unlikely to occur in > production environments, and developers have good debug > tools to fix them quickly. > > Signed-off-by: Sean Christopherson > Reviewed-by: Andi Kleen > Signed-off-by: Kuppuswamy Sathyanarayanan Looks good to me: Reviewed-by: Dan Williams