From: Dan Williams <dan.j.williams@intel.com> To: "Alastair D'Silva" <alastair@d-silva.org> Cc: "Aneesh Kumar K . V" <aneesh.kumar@linux.ibm.com>, "Benjamin Herrenschmidt" <benh@kernel.crashing.org>, "Paul Mackerras" <paulus@samba.org>, "Michael Ellerman" <mpe@ellerman.id.au>, "Frederic Barrat" <fbarrat@linux.ibm.com>, "Andrew Donnellan" <ajd@linux.ibm.com>, "Arnd Bergmann" <arnd@arndb.de>, "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>, "Andrew Morton" <akpm@linux-foundation.org>, "Mauro Carvalho Chehab" <mchehab+samsung@kernel.org>, "David S. Miller" <davem@davemloft.net>, "Rob Herring" <robh@kernel.org>, "Anton Blanchard" <anton@ozlabs.org>, "Krzysztof Kozlowski" <krzk@kernel.org>, "Mahesh Salgaonkar" <mahesh@linux.vnet.ibm.com>, "Madhavan Srinivasan" <maddy@linux.vnet.ibm.com>, "Cédric Le Goater" <clg@kaod.org>, "Anju T Sudhakar" <anju@linux.vnet.ibm.com>, "Hari Bathini" <hbathini@linux.ibm.com>, "Thomas Gleixner" <tglx@linutronix.de>, "Greg Kurz" <groug@kaod.org>, "Nicholas Piggin" <npiggin@gmail.com>, "Masahiro Yamada" <yamada.masahiro@socionext.com>, "Alexey Kardashevskiy" <aik@ozlabs.ru>, "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>, linuxppc-dev <linuxppc-dev@lists.ozlabs.org>, linux-nvdimm <linux-nvdimm@lists.01.org>, "Linux MM" <linux-mm@kvack.org> Subject: Re: [PATCH v4 13/25] nvdimm/ocxl: Read the capability registers & wait for device ready Date: Wed, 1 Apr 2020 17:20:25 -0700 [thread overview] Message-ID: <CAPcyv4jO_U-EOhdErFw9A+h0iai69jq8ni5w_8wUX-B4vS8JDA@mail.gmail.com> (raw) In-Reply-To: <20200327071202.2159885-14-alastair@d-silva.org> On Sun, Mar 29, 2020 at 10:23 PM Alastair D'Silva <alastair@d-silva.org> wrote: > > This patch reads timeouts & firmware version from the controller, and > uses those timeouts to wait for the controller to report that it is ready > before handing the memory over to libnvdimm. > > Signed-off-by: Alastair D'Silva <alastair@d-silva.org> > --- > drivers/nvdimm/ocxl/Makefile | 2 +- > drivers/nvdimm/ocxl/main.c | 85 +++++++++++++++++++++++++ > drivers/nvdimm/ocxl/ocxlpmem.h | 29 +++++++++ > drivers/nvdimm/ocxl/ocxlpmem_internal.c | 19 ++++++ > 4 files changed, 134 insertions(+), 1 deletion(-) > create mode 100644 drivers/nvdimm/ocxl/ocxlpmem_internal.c > > diff --git a/drivers/nvdimm/ocxl/Makefile b/drivers/nvdimm/ocxl/Makefile > index e0e8ade1987a..bab97082e062 100644 > --- a/drivers/nvdimm/ocxl/Makefile > +++ b/drivers/nvdimm/ocxl/Makefile > @@ -4,4 +4,4 @@ ccflags-$(CONFIG_PPC_WERROR) += -Werror > > obj-$(CONFIG_OCXL_PMEM) += ocxlpmem.o > > -ocxlpmem-y := main.o > \ No newline at end of file > +ocxlpmem-y := main.o ocxlpmem_internal.o > diff --git a/drivers/nvdimm/ocxl/main.c b/drivers/nvdimm/ocxl/main.c > index c0066fedf9cc..be76acd33d74 100644 > --- a/drivers/nvdimm/ocxl/main.c > +++ b/drivers/nvdimm/ocxl/main.c > @@ -8,6 +8,7 @@ > > #include <linux/module.h> > #include <misc/ocxl.h> > +#include <linux/delay.h> > #include <linux/ndctl.h> > #include <linux/mm_types.h> > #include <linux/memory_hotplug.h> > @@ -327,6 +328,50 @@ static void remove(struct pci_dev *pdev) > } > } > > +/** > + * read_device_metadata() - Retrieve config information from the AFU and save it for future use > + * @ocxlpmem: the device metadata > + * Return: 0 on success, negative on failure > + */ > +static int read_device_metadata(struct ocxlpmem *ocxlpmem) > +{ > + u64 val; > + int rc; > + > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CCAP0, > + OCXL_LITTLE_ENDIAN, &val); This calling convention would seem to defeat the ability of sparse to validate endian correctness. That's independent of this series, but I wonder how does someone review why this argument is sometimes OCXL_LITTLE_ENDIAN and sometimes OCXL_HOST_ENDIAN? > + if (rc) > + return rc; > + > + ocxlpmem->scm_revision = val & 0xFFFF; > + ocxlpmem->read_latency = (val >> 32) & 0xFFFF; > + ocxlpmem->readiness_timeout = (val >> 48) & 0x0F; > + ocxlpmem->memory_available_timeout = val >> 52; Maybe some macros to parse out these register fields? > + > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CCAP1, > + OCXL_LITTLE_ENDIAN, &val); > + if (rc) > + return rc; > + > + ocxlpmem->max_controller_dump_size = val & 0xFFFFFFFF; > + > + // Extract firmware version text > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_FWVER, > + OCXL_HOST_ENDIAN, > + (u64 *)ocxlpmem->fw_version); > + if (rc) > + return rc; > + > + ocxlpmem->fw_version[8] = '\0'; > + > + dev_info(&ocxlpmem->dev, > + "Firmware version '%s' SCM revision %d:%d\n", > + ocxlpmem->fw_version, ocxlpmem->scm_revision >> 4, > + ocxlpmem->scm_revision & 0x0F); Does the driver need to be chatty here. If this data is relevant should it appear in sysfs by default? > + > + return 0; > +} > + > /** > * probe_function0() - Set up function 0 for an OpenCAPI persistent memory device > * This is important as it enables templates higher than 0 across all other > @@ -359,6 +404,9 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) > { > struct ocxlpmem *ocxlpmem; > int rc; > + u64 chi; > + u16 elapsed, timeout; > + bool ready = false; > > if (PCI_FUNC(pdev->devfn) == 0) > return probe_function0(pdev); > @@ -413,6 +461,43 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) > goto err; > } > > + rc = read_device_metadata(ocxlpmem); > + if (rc) { > + dev_err(&pdev->dev, "Could not read metadata\n"); > + goto err; > + } > + > + elapsed = 0; > + timeout = ocxlpmem->readiness_timeout + > + ocxlpmem->memory_available_timeout; > + > + while (true) { > + rc = ocxlpmem_chi(ocxlpmem, &chi); > + ready = (chi & (GLOBAL_MMIO_CHI_CRDY | GLOBAL_MMIO_CHI_MA)) == > + (GLOBAL_MMIO_CHI_CRDY | GLOBAL_MMIO_CHI_MA); > + > + if (ready) > + break; > + > + if (elapsed++ > timeout) { > + dev_err(&ocxlpmem->dev, > + "OpenCAPI Persistent Memory ready timeout.\n"); > + > + if (!(chi & GLOBAL_MMIO_CHI_CRDY)) > + dev_err(&ocxlpmem->dev, > + "controller is not ready.\n"); > + > + if (!(chi & GLOBAL_MMIO_CHI_MA)) > + dev_err(&ocxlpmem->dev, > + "controller does not have memory available.\n"); > + > + rc = -ENXIO; > + goto err; > + } > + > + msleep(1000); At platform boot this is going to serialize / delay other pci hardware init. Do you need this determination to be synchronous with the call to ->probe()? If not, let's move it out of line. For example nvdimm device registration is asynchronous by default with options to flush if userspace needs to know that the kernel has finished loading drivers. > + } > + > rc = register_lpc_mem(ocxlpmem); > if (rc) { > dev_err(&pdev->dev, > diff --git a/drivers/nvdimm/ocxl/ocxlpmem.h b/drivers/nvdimm/ocxl/ocxlpmem.h > index 322387873b4b..3eadbe19f6d0 100644 > --- a/drivers/nvdimm/ocxl/ocxlpmem.h > +++ b/drivers/nvdimm/ocxl/ocxlpmem.h > @@ -93,4 +93,33 @@ struct ocxlpmem { > void *metadata_addr; > struct resource pmem_res; > struct nd_region *nd_region; > + char fw_version[8 + 1]; > + > + u32 max_controller_dump_size; > + u16 scm_revision; // major/minor > + u8 readiness_timeout; /* The worst case time (in seconds) that the host > + * shall wait for the controller to become > + * operational following a reset (CHI.CRDY). > + */ > + u8 memory_available_timeout; /* The worst case time (in seconds) that > + * the host shall wait for memory to > + * become available following a reset > + * (CHI.MA). > + */ > + > + u16 read_latency; /* The nominal measure of latency (in nanoseconds) > + * associated with an unassisted read of a memory > + * block. > + * This represents the capability of the raw media > + * technology without assistance > + */ > }; > + > +/** > + * ocxlpmem_chi() - Get the value of the CHI register > + * @ocxlpmem: the device metadata > + * @chi: returns the CHI value > + * > + * Returns 0 on success, negative on error > + */ > +int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi); > diff --git a/drivers/nvdimm/ocxl/ocxlpmem_internal.c b/drivers/nvdimm/ocxl/ocxlpmem_internal.c > new file mode 100644 > index 000000000000..5578169b7515 > --- /dev/null > +++ b/drivers/nvdimm/ocxl/ocxlpmem_internal.c > @@ -0,0 +1,19 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +// Copyright 2020 IBM Corp. > + > +#include <misc/ocxl.h> > +#include <linux/delay.h> > +#include "ocxlpmem.h" > + > +int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi) > +{ > + u64 val; > + int rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHI, > + OCXL_LITTLE_ENDIAN, &val); > + if (rc) > + return rc; > + > + *chi = val; > + > + return 0; > +} > -- > 2.24.1 > _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org
WARNING: multiple messages have this Message-ID
From: Dan Williams <dan.j.williams@intel.com> To: "Alastair D'Silva" <alastair@d-silva.org> Cc: "Aneesh Kumar K . V" <aneesh.kumar@linux.ibm.com>, "Oliver O'Halloran" <oohall@gmail.com>, "Benjamin Herrenschmidt" <benh@kernel.crashing.org>, "Paul Mackerras" <paulus@samba.org>, "Michael Ellerman" <mpe@ellerman.id.au>, "Frederic Barrat" <fbarrat@linux.ibm.com>, "Andrew Donnellan" <ajd@linux.ibm.com>, "Arnd Bergmann" <arnd@arndb.de>, "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>, "Vishal Verma" <vishal.l.verma@intel.com>, "Dave Jiang" <dave.jiang@intel.com>, "Ira Weiny" <ira.weiny@intel.com>, "Andrew Morton" <akpm@linux-foundation.org>, "Mauro Carvalho Chehab" <mchehab+samsung@kernel.org>, "David S. Miller" <davem@davemloft.net>, "Rob Herring" <robh@kernel.org>, "Anton Blanchard" <anton@ozlabs.org>, "Krzysztof Kozlowski" <krzk@kernel.org>, "Mahesh Salgaonkar" <mahesh@linux.vnet.ibm.com>, "Madhavan Srinivasan" <maddy@linux.vnet.ibm.com>, "Cédric Le Goater" <clg@kaod.org>, "Anju T Sudhakar" <anju@linux.vnet.ibm.com>, "Hari Bathini" <hbathini@linux.ibm.com>, "Thomas Gleixner" <tglx@linutronix.de>, "Greg Kurz" <groug@kaod.org>, "Nicholas Piggin" <npiggin@gmail.com>, "Masahiro Yamada" <yamada.masahiro@socionext.com>, "Alexey Kardashevskiy" <aik@ozlabs.ru>, "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>, linuxppc-dev <linuxppc-dev@lists.ozlabs.org>, linux-nvdimm <linux-nvdimm@lists.01.org>, "Linux MM" <linux-mm@kvack.org> Subject: Re: [PATCH v4 13/25] nvdimm/ocxl: Read the capability registers & wait for device ready Date: Wed, 1 Apr 2020 17:20:25 -0700 [thread overview] Message-ID: <CAPcyv4jO_U-EOhdErFw9A+h0iai69jq8ni5w_8wUX-B4vS8JDA@mail.gmail.com> (raw) In-Reply-To: <20200327071202.2159885-14-alastair@d-silva.org> On Sun, Mar 29, 2020 at 10:23 PM Alastair D'Silva <alastair@d-silva.org> wrote: > > This patch reads timeouts & firmware version from the controller, and > uses those timeouts to wait for the controller to report that it is ready > before handing the memory over to libnvdimm. > > Signed-off-by: Alastair D'Silva <alastair@d-silva.org> > --- > drivers/nvdimm/ocxl/Makefile | 2 +- > drivers/nvdimm/ocxl/main.c | 85 +++++++++++++++++++++++++ > drivers/nvdimm/ocxl/ocxlpmem.h | 29 +++++++++ > drivers/nvdimm/ocxl/ocxlpmem_internal.c | 19 ++++++ > 4 files changed, 134 insertions(+), 1 deletion(-) > create mode 100644 drivers/nvdimm/ocxl/ocxlpmem_internal.c > > diff --git a/drivers/nvdimm/ocxl/Makefile b/drivers/nvdimm/ocxl/Makefile > index e0e8ade1987a..bab97082e062 100644 > --- a/drivers/nvdimm/ocxl/Makefile > +++ b/drivers/nvdimm/ocxl/Makefile > @@ -4,4 +4,4 @@ ccflags-$(CONFIG_PPC_WERROR) += -Werror > > obj-$(CONFIG_OCXL_PMEM) += ocxlpmem.o > > -ocxlpmem-y := main.o > \ No newline at end of file > +ocxlpmem-y := main.o ocxlpmem_internal.o > diff --git a/drivers/nvdimm/ocxl/main.c b/drivers/nvdimm/ocxl/main.c > index c0066fedf9cc..be76acd33d74 100644 > --- a/drivers/nvdimm/ocxl/main.c > +++ b/drivers/nvdimm/ocxl/main.c > @@ -8,6 +8,7 @@ > > #include <linux/module.h> > #include <misc/ocxl.h> > +#include <linux/delay.h> > #include <linux/ndctl.h> > #include <linux/mm_types.h> > #include <linux/memory_hotplug.h> > @@ -327,6 +328,50 @@ static void remove(struct pci_dev *pdev) > } > } > > +/** > + * read_device_metadata() - Retrieve config information from the AFU and save it for future use > + * @ocxlpmem: the device metadata > + * Return: 0 on success, negative on failure > + */ > +static int read_device_metadata(struct ocxlpmem *ocxlpmem) > +{ > + u64 val; > + int rc; > + > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CCAP0, > + OCXL_LITTLE_ENDIAN, &val); This calling convention would seem to defeat the ability of sparse to validate endian correctness. That's independent of this series, but I wonder how does someone review why this argument is sometimes OCXL_LITTLE_ENDIAN and sometimes OCXL_HOST_ENDIAN? > + if (rc) > + return rc; > + > + ocxlpmem->scm_revision = val & 0xFFFF; > + ocxlpmem->read_latency = (val >> 32) & 0xFFFF; > + ocxlpmem->readiness_timeout = (val >> 48) & 0x0F; > + ocxlpmem->memory_available_timeout = val >> 52; Maybe some macros to parse out these register fields? > + > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CCAP1, > + OCXL_LITTLE_ENDIAN, &val); > + if (rc) > + return rc; > + > + ocxlpmem->max_controller_dump_size = val & 0xFFFFFFFF; > + > + // Extract firmware version text > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_FWVER, > + OCXL_HOST_ENDIAN, > + (u64 *)ocxlpmem->fw_version); > + if (rc) > + return rc; > + > + ocxlpmem->fw_version[8] = '\0'; > + > + dev_info(&ocxlpmem->dev, > + "Firmware version '%s' SCM revision %d:%d\n", > + ocxlpmem->fw_version, ocxlpmem->scm_revision >> 4, > + ocxlpmem->scm_revision & 0x0F); Does the driver need to be chatty here. If this data is relevant should it appear in sysfs by default? > + > + return 0; > +} > + > /** > * probe_function0() - Set up function 0 for an OpenCAPI persistent memory device > * This is important as it enables templates higher than 0 across all other > @@ -359,6 +404,9 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) > { > struct ocxlpmem *ocxlpmem; > int rc; > + u64 chi; > + u16 elapsed, timeout; > + bool ready = false; > > if (PCI_FUNC(pdev->devfn) == 0) > return probe_function0(pdev); > @@ -413,6 +461,43 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) > goto err; > } > > + rc = read_device_metadata(ocxlpmem); > + if (rc) { > + dev_err(&pdev->dev, "Could not read metadata\n"); > + goto err; > + } > + > + elapsed = 0; > + timeout = ocxlpmem->readiness_timeout + > + ocxlpmem->memory_available_timeout; > + > + while (true) { > + rc = ocxlpmem_chi(ocxlpmem, &chi); > + ready = (chi & (GLOBAL_MMIO_CHI_CRDY | GLOBAL_MMIO_CHI_MA)) == > + (GLOBAL_MMIO_CHI_CRDY | GLOBAL_MMIO_CHI_MA); > + > + if (ready) > + break; > + > + if (elapsed++ > timeout) { > + dev_err(&ocxlpmem->dev, > + "OpenCAPI Persistent Memory ready timeout.\n"); > + > + if (!(chi & GLOBAL_MMIO_CHI_CRDY)) > + dev_err(&ocxlpmem->dev, > + "controller is not ready.\n"); > + > + if (!(chi & GLOBAL_MMIO_CHI_MA)) > + dev_err(&ocxlpmem->dev, > + "controller does not have memory available.\n"); > + > + rc = -ENXIO; > + goto err; > + } > + > + msleep(1000); At platform boot this is going to serialize / delay other pci hardware init. Do you need this determination to be synchronous with the call to ->probe()? If not, let's move it out of line. For example nvdimm device registration is asynchronous by default with options to flush if userspace needs to know that the kernel has finished loading drivers. > + } > + > rc = register_lpc_mem(ocxlpmem); > if (rc) { > dev_err(&pdev->dev, > diff --git a/drivers/nvdimm/ocxl/ocxlpmem.h b/drivers/nvdimm/ocxl/ocxlpmem.h > index 322387873b4b..3eadbe19f6d0 100644 > --- a/drivers/nvdimm/ocxl/ocxlpmem.h > +++ b/drivers/nvdimm/ocxl/ocxlpmem.h > @@ -93,4 +93,33 @@ struct ocxlpmem { > void *metadata_addr; > struct resource pmem_res; > struct nd_region *nd_region; > + char fw_version[8 + 1]; > + > + u32 max_controller_dump_size; > + u16 scm_revision; // major/minor > + u8 readiness_timeout; /* The worst case time (in seconds) that the host > + * shall wait for the controller to become > + * operational following a reset (CHI.CRDY). > + */ > + u8 memory_available_timeout; /* The worst case time (in seconds) that > + * the host shall wait for memory to > + * become available following a reset > + * (CHI.MA). > + */ > + > + u16 read_latency; /* The nominal measure of latency (in nanoseconds) > + * associated with an unassisted read of a memory > + * block. > + * This represents the capability of the raw media > + * technology without assistance > + */ > }; > + > +/** > + * ocxlpmem_chi() - Get the value of the CHI register > + * @ocxlpmem: the device metadata > + * @chi: returns the CHI value > + * > + * Returns 0 on success, negative on error > + */ > +int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi); > diff --git a/drivers/nvdimm/ocxl/ocxlpmem_internal.c b/drivers/nvdimm/ocxl/ocxlpmem_internal.c > new file mode 100644 > index 000000000000..5578169b7515 > --- /dev/null > +++ b/drivers/nvdimm/ocxl/ocxlpmem_internal.c > @@ -0,0 +1,19 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +// Copyright 2020 IBM Corp. > + > +#include <misc/ocxl.h> > +#include <linux/delay.h> > +#include "ocxlpmem.h" > + > +int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi) > +{ > + u64 val; > + int rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHI, > + OCXL_LITTLE_ENDIAN, &val); > + if (rc) > + return rc; > + > + *chi = val; > + > + return 0; > +} > -- > 2.24.1 >
WARNING: multiple messages have this Message-ID
From: Dan Williams <dan.j.williams@intel.com> To: "Alastair D'Silva" <alastair@d-silva.org> Cc: "Madhavan Srinivasan" <maddy@linux.vnet.ibm.com>, "Alexey Kardashevskiy" <aik@ozlabs.ru>, "Masahiro Yamada" <yamada.masahiro@socionext.com>, "Oliver O'Halloran" <oohall@gmail.com>, "Mauro Carvalho Chehab" <mchehab+samsung@kernel.org>, "Ira Weiny" <ira.weiny@intel.com>, "Rob Herring" <robh@kernel.org>, "Dave Jiang" <dave.jiang@intel.com>, linux-nvdimm <linux-nvdimm@lists.01.org>, "Aneesh Kumar K . V" <aneesh.kumar@linux.ibm.com>, "Krzysztof Kozlowski" <krzk@kernel.org>, "Anju T Sudhakar" <anju@linux.vnet.ibm.com>, "Mahesh Salgaonkar" <mahesh@linux.vnet.ibm.com>, "Andrew Donnellan" <ajd@linux.ibm.com>, "Arnd Bergmann" <arnd@arndb.de>, "Greg Kurz" <groug@kaod.org>, "Nicholas Piggin" <npiggin@gmail.com>, "Cédric Le Goater" <clg@kaod.org>, "Thomas Gleixner" <tglx@linutronix.de>, "Hari Bathini" <hbathini@linux.ibm.com>, "Linux MM" <linux-mm@kvack.org>, "Greg Kroah-Hartman" <gregkh@linuxfoundation.org>, "Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>, "Vishal Verma" <vishal.l.verma@intel.com>, "Frederic Barrat" <fbarrat@linux.ibm.com>, "Paul Mackerras" <paulus@samba.org>, "Andrew Morton" <akpm@linux-foundation.org>, linuxppc-dev <linuxppc-dev@lists.ozlabs.org>, "David S. Miller" <davem@davemloft.net> Subject: Re: [PATCH v4 13/25] nvdimm/ocxl: Read the capability registers & wait for device ready Date: Wed, 1 Apr 2020 17:20:25 -0700 [thread overview] Message-ID: <CAPcyv4jO_U-EOhdErFw9A+h0iai69jq8ni5w_8wUX-B4vS8JDA@mail.gmail.com> (raw) In-Reply-To: <20200327071202.2159885-14-alastair@d-silva.org> On Sun, Mar 29, 2020 at 10:23 PM Alastair D'Silva <alastair@d-silva.org> wrote: > > This patch reads timeouts & firmware version from the controller, and > uses those timeouts to wait for the controller to report that it is ready > before handing the memory over to libnvdimm. > > Signed-off-by: Alastair D'Silva <alastair@d-silva.org> > --- > drivers/nvdimm/ocxl/Makefile | 2 +- > drivers/nvdimm/ocxl/main.c | 85 +++++++++++++++++++++++++ > drivers/nvdimm/ocxl/ocxlpmem.h | 29 +++++++++ > drivers/nvdimm/ocxl/ocxlpmem_internal.c | 19 ++++++ > 4 files changed, 134 insertions(+), 1 deletion(-) > create mode 100644 drivers/nvdimm/ocxl/ocxlpmem_internal.c > > diff --git a/drivers/nvdimm/ocxl/Makefile b/drivers/nvdimm/ocxl/Makefile > index e0e8ade1987a..bab97082e062 100644 > --- a/drivers/nvdimm/ocxl/Makefile > +++ b/drivers/nvdimm/ocxl/Makefile > @@ -4,4 +4,4 @@ ccflags-$(CONFIG_PPC_WERROR) += -Werror > > obj-$(CONFIG_OCXL_PMEM) += ocxlpmem.o > > -ocxlpmem-y := main.o > \ No newline at end of file > +ocxlpmem-y := main.o ocxlpmem_internal.o > diff --git a/drivers/nvdimm/ocxl/main.c b/drivers/nvdimm/ocxl/main.c > index c0066fedf9cc..be76acd33d74 100644 > --- a/drivers/nvdimm/ocxl/main.c > +++ b/drivers/nvdimm/ocxl/main.c > @@ -8,6 +8,7 @@ > > #include <linux/module.h> > #include <misc/ocxl.h> > +#include <linux/delay.h> > #include <linux/ndctl.h> > #include <linux/mm_types.h> > #include <linux/memory_hotplug.h> > @@ -327,6 +328,50 @@ static void remove(struct pci_dev *pdev) > } > } > > +/** > + * read_device_metadata() - Retrieve config information from the AFU and save it for future use > + * @ocxlpmem: the device metadata > + * Return: 0 on success, negative on failure > + */ > +static int read_device_metadata(struct ocxlpmem *ocxlpmem) > +{ > + u64 val; > + int rc; > + > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CCAP0, > + OCXL_LITTLE_ENDIAN, &val); This calling convention would seem to defeat the ability of sparse to validate endian correctness. That's independent of this series, but I wonder how does someone review why this argument is sometimes OCXL_LITTLE_ENDIAN and sometimes OCXL_HOST_ENDIAN? > + if (rc) > + return rc; > + > + ocxlpmem->scm_revision = val & 0xFFFF; > + ocxlpmem->read_latency = (val >> 32) & 0xFFFF; > + ocxlpmem->readiness_timeout = (val >> 48) & 0x0F; > + ocxlpmem->memory_available_timeout = val >> 52; Maybe some macros to parse out these register fields? > + > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CCAP1, > + OCXL_LITTLE_ENDIAN, &val); > + if (rc) > + return rc; > + > + ocxlpmem->max_controller_dump_size = val & 0xFFFFFFFF; > + > + // Extract firmware version text > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_FWVER, > + OCXL_HOST_ENDIAN, > + (u64 *)ocxlpmem->fw_version); > + if (rc) > + return rc; > + > + ocxlpmem->fw_version[8] = '\0'; > + > + dev_info(&ocxlpmem->dev, > + "Firmware version '%s' SCM revision %d:%d\n", > + ocxlpmem->fw_version, ocxlpmem->scm_revision >> 4, > + ocxlpmem->scm_revision & 0x0F); Does the driver need to be chatty here. If this data is relevant should it appear in sysfs by default? > + > + return 0; > +} > + > /** > * probe_function0() - Set up function 0 for an OpenCAPI persistent memory device > * This is important as it enables templates higher than 0 across all other > @@ -359,6 +404,9 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) > { > struct ocxlpmem *ocxlpmem; > int rc; > + u64 chi; > + u16 elapsed, timeout; > + bool ready = false; > > if (PCI_FUNC(pdev->devfn) == 0) > return probe_function0(pdev); > @@ -413,6 +461,43 @@ static int probe(struct pci_dev *pdev, const struct pci_device_id *ent) > goto err; > } > > + rc = read_device_metadata(ocxlpmem); > + if (rc) { > + dev_err(&pdev->dev, "Could not read metadata\n"); > + goto err; > + } > + > + elapsed = 0; > + timeout = ocxlpmem->readiness_timeout + > + ocxlpmem->memory_available_timeout; > + > + while (true) { > + rc = ocxlpmem_chi(ocxlpmem, &chi); > + ready = (chi & (GLOBAL_MMIO_CHI_CRDY | GLOBAL_MMIO_CHI_MA)) == > + (GLOBAL_MMIO_CHI_CRDY | GLOBAL_MMIO_CHI_MA); > + > + if (ready) > + break; > + > + if (elapsed++ > timeout) { > + dev_err(&ocxlpmem->dev, > + "OpenCAPI Persistent Memory ready timeout.\n"); > + > + if (!(chi & GLOBAL_MMIO_CHI_CRDY)) > + dev_err(&ocxlpmem->dev, > + "controller is not ready.\n"); > + > + if (!(chi & GLOBAL_MMIO_CHI_MA)) > + dev_err(&ocxlpmem->dev, > + "controller does not have memory available.\n"); > + > + rc = -ENXIO; > + goto err; > + } > + > + msleep(1000); At platform boot this is going to serialize / delay other pci hardware init. Do you need this determination to be synchronous with the call to ->probe()? If not, let's move it out of line. For example nvdimm device registration is asynchronous by default with options to flush if userspace needs to know that the kernel has finished loading drivers. > + } > + > rc = register_lpc_mem(ocxlpmem); > if (rc) { > dev_err(&pdev->dev, > diff --git a/drivers/nvdimm/ocxl/ocxlpmem.h b/drivers/nvdimm/ocxl/ocxlpmem.h > index 322387873b4b..3eadbe19f6d0 100644 > --- a/drivers/nvdimm/ocxl/ocxlpmem.h > +++ b/drivers/nvdimm/ocxl/ocxlpmem.h > @@ -93,4 +93,33 @@ struct ocxlpmem { > void *metadata_addr; > struct resource pmem_res; > struct nd_region *nd_region; > + char fw_version[8 + 1]; > + > + u32 max_controller_dump_size; > + u16 scm_revision; // major/minor > + u8 readiness_timeout; /* The worst case time (in seconds) that the host > + * shall wait for the controller to become > + * operational following a reset (CHI.CRDY). > + */ > + u8 memory_available_timeout; /* The worst case time (in seconds) that > + * the host shall wait for memory to > + * become available following a reset > + * (CHI.MA). > + */ > + > + u16 read_latency; /* The nominal measure of latency (in nanoseconds) > + * associated with an unassisted read of a memory > + * block. > + * This represents the capability of the raw media > + * technology without assistance > + */ > }; > + > +/** > + * ocxlpmem_chi() - Get the value of the CHI register > + * @ocxlpmem: the device metadata > + * @chi: returns the CHI value > + * > + * Returns 0 on success, negative on error > + */ > +int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi); > diff --git a/drivers/nvdimm/ocxl/ocxlpmem_internal.c b/drivers/nvdimm/ocxl/ocxlpmem_internal.c > new file mode 100644 > index 000000000000..5578169b7515 > --- /dev/null > +++ b/drivers/nvdimm/ocxl/ocxlpmem_internal.c > @@ -0,0 +1,19 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +// Copyright 2020 IBM Corp. > + > +#include <misc/ocxl.h> > +#include <linux/delay.h> > +#include "ocxlpmem.h" > + > +int ocxlpmem_chi(const struct ocxlpmem *ocxlpmem, u64 *chi) > +{ > + u64 val; > + int rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu, GLOBAL_MMIO_CHI, > + OCXL_LITTLE_ENDIAN, &val); > + if (rc) > + return rc; > + > + *chi = val; > + > + return 0; > +} > -- > 2.24.1 >
next prev parent reply other threads:[~2020-04-02 0:20 UTC|newest] Thread overview: 179+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-03-27 7:11 [PATCH v4 00/25] Add support for OpenCAPI Persistent Memory devices Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` [PATCH v4 01/25] powerpc/powernv: Add OPAL calls for LPC memory alloc/release Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-01 8:48 ` Dan Williams 2020-04-01 8:48 ` Dan Williams 2020-04-01 8:48 ` Dan Williams 2020-04-01 22:51 ` Alastair D'Silva 2020-04-01 22:51 ` Alastair D'Silva 2020-04-01 22:51 ` Alastair D'Silva 2020-03-27 7:11 ` [PATCH v4 02/25] mm/memory_hotplug: Allow check_hotplug_memory_addressable to be called from drivers Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-01 8:48 ` Dan Williams 2020-04-01 8:48 ` Dan Williams 2020-04-01 8:48 ` Dan Williams 2020-04-02 4:33 ` Alastair D'Silva 2020-04-02 4:33 ` Alastair D'Silva 2020-04-02 4:33 ` Alastair D'Silva 2020-03-27 7:11 ` [PATCH v4 03/25] powerpc/powernv: Map & release OpenCAPI LPC memory Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-01 8:48 ` Dan Williams 2020-04-01 8:48 ` Dan Williams 2020-04-01 8:48 ` Dan Williams 2020-04-02 4:36 ` Alastair D'Silva 2020-04-02 4:36 ` Alastair D'Silva 2020-04-02 4:36 ` Alastair D'Silva 2020-04-02 10:41 ` Benjamin Herrenschmidt 2020-04-02 10:41 ` Benjamin Herrenschmidt 2020-04-03 4:27 ` Michael Ellerman 2020-04-03 4:27 ` Michael Ellerman 2020-04-03 4:27 ` Michael Ellerman 2020-03-27 7:11 ` [PATCH v4 04/25] ocxl: Remove unnecessary externs Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-01 8:48 ` Dan Williams 2020-04-01 8:48 ` Dan Williams 2020-04-01 8:48 ` Dan Williams 2020-03-27 7:11 ` [PATCH v4 05/25] ocxl: Address kernel doc errors & warnings Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-01 8:49 ` Dan Williams 2020-04-01 8:49 ` Dan Williams 2020-04-01 8:49 ` Dan Williams 2020-03-27 7:11 ` [PATCH v4 06/25] ocxl: Tally up the LPC memory on a link & allow it to be mapped Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-01 8:48 ` Dan Williams 2020-04-01 8:48 ` Dan Williams 2020-04-01 8:48 ` Dan Williams 2020-04-02 6:21 ` Andrew Donnellan 2020-04-02 6:21 ` Andrew Donnellan 2020-04-02 6:21 ` Andrew Donnellan 2020-03-27 7:11 ` [PATCH v4 07/25] ocxl: Add functions to map/unmap LPC memory Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-01 8:49 ` Dan Williams 2020-04-01 8:49 ` Dan Williams 2020-04-01 8:49 ` Dan Williams 2020-04-03 3:50 ` Alastair D'Silva 2020-04-03 3:50 ` Alastair D'Silva 2020-04-03 3:50 ` Alastair D'Silva 2020-03-27 7:11 ` [PATCH v4 08/25] ocxl: Emit a log message showing how much LPC memory was detected Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-01 8:49 ` Dan Williams 2020-04-01 8:49 ` Dan Williams 2020-04-01 8:49 ` Dan Williams 2020-04-02 1:29 ` Joe Perches 2020-04-02 1:29 ` Joe Perches 2020-04-02 1:29 ` Joe Perches 2020-04-03 3:52 ` Alastair D'Silva 2020-04-03 3:52 ` Alastair D'Silva 2020-04-03 3:52 ` Alastair D'Silva 2020-03-27 7:11 ` [PATCH v4 09/25] ocxl: Save the device serial number in ocxl_fn Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` [PATCH v4 10/25] nvdimm: Add driver for OpenCAPI Persistent Memory Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-29 2:56 ` Matthew Wilcox 2020-03-29 2:56 ` Matthew Wilcox 2020-03-29 2:56 ` Matthew Wilcox 2020-03-29 2:59 ` Matthew Wilcox 2020-03-29 2:59 ` Matthew Wilcox 2020-03-29 2:59 ` Matthew Wilcox 2020-04-01 8:49 ` Dan Williams 2020-04-01 8:49 ` Dan Williams 2020-04-01 8:49 ` Dan Williams 2020-04-01 19:35 ` Dan Williams 2020-04-01 19:35 ` Dan Williams 2020-04-01 19:35 ` Dan Williams 2020-03-27 7:11 ` [PATCH v4 11/25] powerpc: Enable the OpenCAPI Persistent Memory driver for powernv_defconfig Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-01 20:26 ` Dan Williams 2020-04-01 20:26 ` Dan Williams 2020-04-01 20:26 ` Dan Williams 2020-03-27 7:11 ` [PATCH v4 12/25] nvdimm/ocxl: Add register addresses & status values to the header Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-01 20:27 ` Dan Williams 2020-04-01 20:27 ` Dan Williams 2020-04-01 20:27 ` Dan Williams 2020-03-27 7:11 ` [PATCH v4 13/25] nvdimm/ocxl: Read the capability registers & wait for device ready Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-02 0:20 ` Dan Williams [this message] 2020-04-02 0:20 ` Dan Williams 2020-04-02 0:20 ` Dan Williams 2020-03-27 7:11 ` [PATCH v4 14/25] nvdimm/ocxl: Add support for Admin commands Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-02 6:41 ` Dan Williams 2020-04-02 6:41 ` Dan Williams 2020-04-02 6:41 ` Dan Williams 2020-03-27 7:11 ` [PATCH v4 15/25] nvdimm/ocxl: Register a character device for userspace to interact with Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-02 0:27 ` Dan Williams 2020-04-02 0:27 ` Dan Williams 2020-04-02 0:27 ` Dan Williams 2020-03-27 7:11 ` [PATCH v4 16/25] nvdimm/ocxl: Implement the Read Error Log command Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-03 0:54 ` Dan Williams 2020-04-03 0:54 ` Dan Williams 2020-04-03 0:54 ` Dan Williams 2020-03-27 7:11 ` [PATCH v4 17/25] nvdimm/ocxl: Add controller dump IOCTLs Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` [PATCH v4 18/25] nvdimm/ocxl: Add an IOCTL to report controller statistics Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` [PATCH v4 19/25] nvdimm/ocxl: Forward events to userspace Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-04-02 2:08 ` Dan Williams 2020-04-02 2:08 ` Dan Williams 2020-04-02 2:08 ` Dan Williams 2020-03-27 7:11 ` [PATCH v4 20/25] nvdimm/ocxl: Add an IOCTL to request controller health & perf data Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` [PATCH v4 21/25] nvdimm/ocxl: Implement the heartbeat command Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` [PATCH v4 22/25] nvdimm/ocxl: Add debug IOCTLs Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:11 ` Alastair D'Silva 2020-03-27 7:12 ` [PATCH v4 23/25] nvdimm/ocxl: Expose SMART data via ndctl Alastair D'Silva 2020-03-27 7:12 ` Alastair D'Silva 2020-03-27 7:12 ` Alastair D'Silva 2020-03-27 7:12 ` [PATCH v4 24/25] nvdimm/ocxl: Expose the serial number & firmware version in sysfs Alastair D'Silva 2020-03-27 7:12 ` Alastair D'Silva 2020-03-27 7:12 ` Alastair D'Silva 2020-03-27 7:12 ` [PATCH v4 25/25] MAINTAINERS: Add myself & nvdimm/ocxl to ocxl Alastair D'Silva 2020-03-27 7:12 ` Alastair D'Silva 2020-03-27 7:12 ` Alastair D'Silva 2020-04-01 8:47 ` [PATCH v4 00/25] Add support for OpenCAPI Persistent Memory devices Dan Williams 2020-04-01 8:47 ` Dan Williams 2020-04-01 8:47 ` Dan Williams 2020-04-01 22:44 ` Alastair D'Silva 2020-04-01 22:44 ` Alastair D'Silva 2020-04-01 22:44 ` Alastair D'Silva 2020-04-02 3:42 ` Michael Ellerman 2020-04-02 3:42 ` Michael Ellerman 2020-04-02 3:42 ` Michael Ellerman 2020-04-02 3:50 ` Oliver O'Halloran 2020-04-02 3:50 ` Oliver O'Halloran 2020-04-02 3:50 ` Oliver O'Halloran 2020-04-02 10:06 ` Michael Ellerman 2020-04-02 10:06 ` Michael Ellerman 2020-04-02 10:06 ` Michael Ellerman 2020-04-02 11:10 ` Greg Kurz 2020-04-02 11:10 ` Greg Kurz 2020-04-02 11:10 ` Greg Kurz
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