From mboxrd@z Thu Jan  1 00:00:00 1970
From: Simon Glass <sjg@chromium.org>
Date: Fri, 1 Jul 2016 08:15:02 -0700
Subject: [U-Boot] [PATCH 2/4] usb: dwc2-otg: redefine fifo-size for
	rk3288
In-Reply-To: <577606EB.8050406@rock-chips.com>
References: <1467271321-17605-1-git-send-email-xzy.xu@rock-chips.com>
 <1467271321-17605-3-git-send-email-xzy.xu@rock-chips.com>
 <CAPnjgZ2Xnm6bHLbpqJTbs+oHw-6NjjpYF3UwnH5iAfVB3r8cnA@mail.gmail.com>
 <577606EB.8050406@rock-chips.com>
Message-ID: <CAPnjgZ0JJCHCv-ni+GJ0udmQy0wknz76N=LqwQZmPpNbk-m6_w@mail.gmail.com>
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To: u-boot@lists.denx.de

Hi,

On 30 June 2016 at 23:00, Ziyuan Xu <xzy.xu@rock-chips.com> wrote:
>
> Hi Simon,
>
> On 2016?06?30? 23:23, Simon Glass wrote:
>>
>> Hi Ziyuan,
>>
>> On 30 June 2016 at 00:21, Ziyuan Xu <xzy.xu@rock-chips.com> wrote:
>>>
>>> Redefine RX FIFO size & TX FIFO size for rk3288.
>>>
>>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
>>> ---
>>>
>>>   drivers/usb/gadget/dwc2_udc_otg_regs.h | 6 ++++++
>>>   1 file changed, 6 insertions(+)
>>>
>>> diff --git a/drivers/usb/gadget/dwc2_udc_otg_regs.h b/drivers/usb/gadget/dwc2_udc_otg_regs.h
>>> index 78ec90e..a0617c8 100644
>>> --- a/drivers/usb/gadget/dwc2_udc_otg_regs.h
>>> +++ b/drivers/usb/gadget/dwc2_udc_otg_regs.h
>>> @@ -130,8 +130,14 @@ struct dwc2_usbotg_reg {
>>>   #define HIGH_SPEED_CONTROL_PKT_SIZE    64
>>>   #define HIGH_SPEED_BULK_PKT_SIZE       512
>>>
>>> +#ifdef CONFIG_ROCKCHIP_RK3288
>>> +#define RX_FIFO_SIZE                   (275*4)
>>> +#define NPTX_FIFO_SIZE                 (16*4)
>>> +#else
>>>   #define RX_FIFO_SIZE                   (1024*4)
>>>   #define NPTX_FIFO_SIZE                 (1024*4)
>>> +#endif
>>
>> I cannot see where this is used. Can you explain? Also can you add a
>> reason for the change in your commit message?
>
> The total FIFO size of dwc2 on Rockchip SoCs is shorter than the existent, so redefined
> them to fit Rockchip SoCs.

$ git grep RX_FIFO_SIZE
drivers/i2c/kona_i2c.c:#define MAX_RX_FIFO_SIZE           64U     /* bytes */
drivers/i2c/kona_i2c.c:   unsigned int bytes_to_read = MAX_RX_FIFO_SIZE;
drivers/i2c/kona_i2c.c:           if (msg->len - bytes_read <=
MAX_RX_FIFO_SIZE) {
drivers/usb/gadget/dwc2_udc_otg.c:        writel(RX_FIFO_SIZE >> 2,
&reg->grxfsiz);
drivers/usb/gadget/dwc2_udc_otg.c:        writel((NPTX_FIFO_SIZE >> 2)
<< 16 | ((RX_FIFO_SIZE >> 2)) << 0,
drivers/usb/gadget/dwc2_udc_otg.c:
((RX_FIFO_SIZE + NPTX_FIFO_SIZE +
drivers/usb/gadget/dwc2_udc_otg_regs.h:#define RX_FIFO_SIZE
           (1024*4)
drivers/usb/host/dwc2.c:
writel(CONFIG_DWC2_HOST_RX_FIFO_SIZE, &regs->grxfsiz);
drivers/usb/host/dwc2.c:          nptxfifosize |=
CONFIG_DWC2_HOST_RX_FIFO_SIZE <<
drivers/usb/host/dwc2.c:          ptxfifosize |=
(CONFIG_DWC2_HOST_RX_FIFO_SIZE +
drivers/usb/host/dwc2.h:#define CONFIG_DWC2_HOST_RX_FIFO_SIZE
   (516 + CONFIG_DWC2_MAX_CHANNELS)

If we need a Rockchip-specific value for this then it should go in
Kconfig or device tree.

>
>>> +
>>>   #define PTX_FIFO_SIZE                  (1536*1)
>>>
>>>   #define DEPCTL_TXFNUM_0                (0x0<<22)
>>> --
>>> 1.9.1

Regards,
Simon