From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Glass Date: Wed, 11 Jul 2012 07:01:59 +0200 Subject: [U-Boot] [PATCH v2 12/19] arm: Add control over cachability of memory regions In-Reply-To: <4FDA7878.1090700@wwwdotorg.org> References: <1339604395-6621-1-git-send-email-sjg@chromium.org> <1339604395-6621-13-git-send-email-sjg@chromium.org> <4FDA7878.1090700@wwwdotorg.org> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Stephen, On Fri, Jun 15, 2012 at 1:49 AM, Stephen Warren wrote: > On 06/13/2012 10:19 AM, Simon Glass wrote: > > Add support for adjusting the cachability of an L1 section by updating > > the MMU. The mmu_set_region_dcache() function allows drivers to make > > these changes after the MMU is set up. > > > > It is implemented only for ARMv7 at present. > > > > This is needed for LCD support, where we want to make the LCD frame > buffer > > write-through (or off) rather than write-back. > > Wouldn't performance be significantly better if the region was fully > cached, but flushed after each display surface update? > That is the setting used on Tegra, yes. This function permits selection of the three options. Regards, Simon