* [PATCH] RFC: Example schema files written in Python
@ 2019-04-29 22:41 Simon Glass
2019-05-08 19:20 ` Rob Herring
0 siblings, 1 reply; 3+ messages in thread
From: Simon Glass @ 2019-04-29 22:41 UTC (permalink / raw)
To: LKML
Cc: devicetree, Rob Herring, Grant Likely, Frank Rowand,
David Gibson, Pantelis Antoniou, Simon Glass
Most of these are hand-written, but xilinx-xadc.py is auto-generated by
binding_to_py.py as an example of the use of that tool.
This is part of a proof-of-concept device-tree validator. See the patch
on the dtc mailing list for details:
RFC: Python-based device-tree validation
Signed-off-by: Simon Glass <sjg@chromium.org>
---
Documentation/__init__.py | 0
Documentation/devicetree/__init__.py | 0
Documentation/devicetree/bindings/__init__.py | 0
.../devicetree/bindings/arm/__init__.py | 0
Documentation/devicetree/bindings/arm/cpus.py | 125 ++++++++++++++++++
Documentation/devicetree/bindings/arm/pmu.py | 38 ++++++
.../devicetree/bindings/arm/rockchip.py | 16 +++
.../devicetree/bindings/arm/xilinx.py | 24 ++++
Documentation/devicetree/bindings/base.py | 14 ++
Documentation/devicetree/bindings/chosen.py | 15 +++
.../devicetree/bindings/cpufreq/cpufreq-dt.py | 15 +++
.../devicetree/bindings/fpga/fpga-region.py | 15 +++
.../bindings/iio/adc/xilinx-xadc.py | 61 +++++++++
.../bindings/iio/adc/xilinx-xadc.txt | 34 ++---
Documentation/devicetree/bindings/memory.py | 15 +++
Documentation/devicetree/bindings/opp/opp.py | 15 +++
.../bindings/regulator/fixed-regulator.py | 14 ++
.../bindings/regulator/regulator.py | 19 +++
.../reserved-memory/reserved-memory.py | 14 ++
.../devicetree/bindings/thermal/thermal.py | 15 +++
.../devicetree/bindings/usb/usb-nop-xceiv.py | 16 +++
21 files changed, 449 insertions(+), 16 deletions(-)
create mode 100644 Documentation/__init__.py
create mode 100644 Documentation/devicetree/__init__.py
create mode 100644 Documentation/devicetree/bindings/__init__.py
create mode 100644 Documentation/devicetree/bindings/arm/__init__.py
create mode 100644 Documentation/devicetree/bindings/arm/cpus.py
create mode 100644 Documentation/devicetree/bindings/arm/pmu.py
create mode 100644 Documentation/devicetree/bindings/arm/rockchip.py
create mode 100644 Documentation/devicetree/bindings/arm/xilinx.py
create mode 100644 Documentation/devicetree/bindings/base.py
create mode 100644 Documentation/devicetree/bindings/chosen.py
create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-dt.py
create mode 100644 Documentation/devicetree/bindings/fpga/fpga-region.py
create mode 100644 Documentation/devicetree/bindings/iio/adc/xilinx-xadc.py
create mode 100644 Documentation/devicetree/bindings/memory.py
create mode 100644 Documentation/devicetree/bindings/opp/opp.py
create mode 100644 Documentation/devicetree/bindings/regulator/fixed-regulator.py
create mode 100644 Documentation/devicetree/bindings/regulator/regulator.py
create mode 100644 Documentation/devicetree/bindings/reserved-memory/reserved-memory.py
create mode 100644 Documentation/devicetree/bindings/thermal/thermal.py
create mode 100644 Documentation/devicetree/bindings/usb/usb-nop-xceiv.py
diff --git a/Documentation/__init__.py b/Documentation/__init__.py
new file mode 100644
index 0000000000000..e69de29bb2d1d
diff --git a/Documentation/devicetree/__init__.py b/Documentation/devicetree/__init__.py
new file mode 100644
index 0000000000000..e69de29bb2d1d
diff --git a/Documentation/devicetree/bindings/__init__.py b/Documentation/devicetree/bindings/__init__.py
new file mode 100644
index 0000000000000..e69de29bb2d1d
diff --git a/Documentation/devicetree/bindings/arm/__init__.py b/Documentation/devicetree/bindings/arm/__init__.py
new file mode 100644
index 0000000000000..e69de29bb2d1d
diff --git a/Documentation/devicetree/bindings/arm/cpus.py b/Documentation/devicetree/bindings/arm/cpus.py
new file mode 100644
index 0000000000000..6a2e94903d438
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/cpus.py
@@ -0,0 +1,125 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# /cpu bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeCpu, NodeCpus
+from kschema import PropClocks, PropPhandle, PropReg, PropString, PropSupply
+
+enable_methods = [
+ 'actions,s500-smp',
+ 'allwinner,sun6i-a31',
+ 'allwinner,sun8i-a23',
+ 'allwinner,sun9i-a80-smp',
+ 'amlogic,meson8-smp',
+ 'amlogic,meson8b-smp',
+ 'arm,realview-smp',
+ 'brcm,bcm11351-cpu-method',
+ 'brcm,bcm23550',
+ 'brcm,bcm2836-smp',
+ 'brcm,bcm-nsp-smp',
+ 'brcm,brahma-b15',
+ 'marvell,armada-375-smp',
+ 'marvell,armada-380-smp',
+ 'marvell,armada-390-smp',
+ 'marvell,armada-xp-smp',
+ 'marvell,98dx3236-smp',
+ 'mediatek,mt6589-smp',
+ 'mediatek,mt81xx-tz-smp',
+ 'qcom,gcc-msm8660',
+ 'qcom,kpss-acc-v1',
+ 'qcom,kpss-acc-v2',
+ 'renesas,apmu',
+ 'renesas,r9a06g032-smp',
+ 'rockchip,rk3036-smp',
+ 'rockchip,rk3066-smp',
+ 'ste,dbx500-smp',
+]
+
+schema = [
+ NodeCpus(),
+ NodeCpu(['arm,arm710t',
+ 'arm,arm720t',
+ 'arm,arm740t',
+ 'arm,arm7ej-s',
+ 'arm,arm7tdmi',
+ 'arm,arm7tdmi-s',
+ 'arm,arm9es',
+ 'arm,arm9ej-s',
+ 'arm,arm920t',
+ 'arm,arm922t',
+ 'arm,arm925',
+ 'arm,arm926e-s',
+ 'arm,arm926ej-s',
+ 'arm,arm940t',
+ 'arm,arm946e-s',
+ 'arm,arm966e-s',
+ 'arm,arm968e-s',
+ 'arm,arm9tdmi',
+ 'arm,arm1020e',
+ 'arm,arm1020t',
+ 'arm,arm1022e',
+ 'arm,arm1026ej-s',
+ 'arm,arm1136j-s',
+ 'arm,arm1136jf-s',
+ 'arm,arm1156t2-s',
+ 'arm,arm1156t2f-s',
+ 'arm,arm1176jzf',
+ 'arm,arm1176jz-s',
+ 'arm,arm1176jzf-s',
+ 'arm,arm11mpcore',
+ 'arm,armv8', # Only for s/w models
+ 'arm,cortex-a5',
+ 'arm,cortex-a7',
+ 'arm,cortex-a8',
+ 'arm,cortex-a9',
+ 'arm,cortex-a12',
+ 'arm,cortex-a15',
+ 'arm,cortex-a17',
+ 'arm,cortex-a53',
+ 'arm,cortex-a57',
+ 'arm,cortex-a72',
+ 'arm,cortex-a73',
+ 'arm,cortex-m0',
+ 'arm,cortex-m0+',
+ 'arm,cortex-m1',
+ 'arm,cortex-m3',
+ 'arm,cortex-m4',
+ 'arm,cortex-r4',
+ 'arm,cortex-r5',
+ 'arm,cortex-r7',
+ 'brcm,brahma-b15',
+ 'brcm,brahma-b53',
+ 'brcm,vulcan',
+ 'cavium,thunder',
+ 'cavium,thunder2',
+ 'faraday,fa526',
+ 'intel,sa110',
+ 'intel,sa1100',
+ 'marvell,feroceon',
+ 'marvell,mohawk',
+ 'marvell,pj4a',
+ 'marvell,pj4b',
+ 'marvell,sheeva-v5',
+ 'marvell,sheeva-v7',
+ 'nvidia,tegra132-denver',
+ 'nvidia,tegra186-denver',
+ 'nvidia,tegra194-carmel',
+ 'qcom,krait',
+ 'qcom,kryo',
+ 'qcom,kryo385',
+ 'qcom,scorpion'], [
+ PropString('device_type', True, ''),
+ PropReg(),
+ PropClocks(),
+ PropString('enable-method', True, 'psci|spin-table',
+ {'#arch': 'armv8'}),
+ PropString('enable-method', False, '|'.join(enable_methods),
+ {'#arch': '!armv8'}),
+ PropPhandle('rockchip,pmu', 'rockchip,rk3288-pmu',
+ cond_props={'enable-method': 'rockchip,rk3066-smp'}),
+ PropSupply('cpu'),
+ ]),
+]
diff --git a/Documentation/devicetree/bindings/arm/pmu.py b/Documentation/devicetree/bindings/arm/pmu.py
new file mode 100644
index 0000000000000..aa475b7293eff
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/pmu.py
@@ -0,0 +1,38 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Performance-Monitoring Unit (PMU) bindings
+#
+# not Copyright 2018 Google LLC
+#
+
+from kschema import NodeDesc, PropIntList, PropReg
+
+schema = [
+ NodeDesc('pmu', [
+ 'apm,potenza-pmu',
+ 'arm,armv8-pmuv3',
+ 'arm,cortex-a73-pmu',
+ 'arm,cortex-a72-pmu',
+ 'arm,cortex-a57-pmu',
+ 'arm,cortex-a53-pmu',
+ 'arm,cortex-a35-pmu',
+ 'arm,cortex-a17-pmu',
+ 'arm,cortex-a15-pmu',
+ 'arm,cortex-a12-pmu',
+ 'arm,cortex-a9-pmu',
+ 'arm,cortex-a8-pmu',
+ 'arm,cortex-a7-pmu',
+ 'arm,cortex-a5-pmu',
+ 'arm,arm11mpcore-pmu',
+ 'arm,arm1176-pmu',
+ 'arm,arm1136-pmu',
+ 'brcm,vulcan-pmu',
+ 'cavium,thunder-pmu',
+ 'qcom,scorpion-pmu',
+ 'qcom,scorpion-mp-pmu',
+ 'qcom,krait-pmu',
+ ], False, [
+ PropReg(),
+ PropIntList('interrupts'),
+ ]),
+]
diff --git a/Documentation/devicetree/bindings/arm/rockchip.py b/Documentation/devicetree/bindings/arm/rockchip.py
new file mode 100644
index 0000000000000..991775a63ac52
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/rockchip.py
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Rockchip platforms device tree bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeModel
+
+schema = [
+ NodeModel('Google Jerry',
+ ['google,veyron-jerry-rev7', 'google,veyron-jerry-rev6',
+ 'google,veyron-jerry-rev5', 'google,veyron-jerry-rev4',
+ 'google,veyron-jerry-rev3', 'google,veyron-jerry',
+ 'google,veyron', 'rockchip,rk3288']),
+]
diff --git a/Documentation/devicetree/bindings/arm/xilinx.py b/Documentation/devicetree/bindings/arm/xilinx.py
new file mode 100644
index 0000000000000..8901878cfdf31
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/xilinx.py
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Rockchip platforms device tree bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeModel
+
+schema = [
+ NodeModel('Digilent Zybo board',
+ ['adapteva,parallella',
+ 'digilent,zynq-zybo',
+ 'digilent,zynq-zybo-z7',
+ 'xlnx,zynq-cc108',
+ 'xlnx,zynq-zc702',
+ 'xlnx,zynq-zc706',
+ 'xlnx,zynq-zc770-xm010',
+ 'xlnx,zynq-zc770-xm011',
+ 'xlnx,zynq-zc770-xm012',
+ 'xlnx,zynq-zc770-xm013',
+ 'xlnx,zynq-7000',
+ ]),
+]
diff --git a/Documentation/devicetree/bindings/base.py b/Documentation/devicetree/bindings/base.py
new file mode 100644
index 0000000000000..9b86b30e12ee3
--- /dev/null
+++ b/Documentation/devicetree/bindings/base.py
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# base (built-in) bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeDesc, PropBool
+
+schema = [
+ NodeDesc('simple-bus', ['simple-bus'], False, [
+ PropBool('ranges'),
+ ]),
+]
diff --git a/Documentation/devicetree/bindings/chosen.py b/Documentation/devicetree/bindings/chosen.py
new file mode 100644
index 0000000000000..9df2e6418222a
--- /dev/null
+++ b/Documentation/devicetree/bindings/chosen.py
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# /chosen bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeChosen, PropString
+
+schema = [
+ NodeChosen([
+ PropString('bootargs'),
+ PropString('stdout-path'),
+ ]),
+]
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-dt.py b/Documentation/devicetree/bindings/cpufreq/cpufreq-dt.py
new file mode 100644
index 0000000000000..cb199af8dce5f
--- /dev/null
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-dt.py
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# /cpu bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeCpu
+from kschema import PropInt
+
+schema1 = [
+ NodeCpu(None, [
+ PropInt('clock-latency'),
+ ])
+ ]
diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.py b/Documentation/devicetree/bindings/fpga/fpga-region.py
new file mode 100644
index 0000000000000..908cb8d3260f3
--- /dev/null
+++ b/Documentation/devicetree/bindings/fpga/fpga-region.py
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# fpga-region bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeDesc, PropBool, PropPhandle
+
+schema = [
+ NodeDesc('fpga-region', ['fpga-region'], True, [
+ PropPhandle('fpga-mgr', 'xlnx,zynq-devcfg-1.0'),
+ PropBool('ranges'),
+ ]),
+]
diff --git a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.py b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.py
new file mode 100644
index 0000000000000..9f55f48f7cde7
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.py
@@ -0,0 +1,61 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+# Xilinx XADC device driver
+
+from kschema import NodeDesc, PropBool, PropClocks, PropInt, PropIntList, PropInterrupts, PropReg, PropStringList
+
+schema = [
+ NodeDesc('xilinx-xadc', ['xlnx,zynq-xadc-1.00.a', 'xlnx,axi-xadc-1.00.a'], False, desc=
+ 'This binding document describes the bindings for both of them since the'
+ 'bindings are very similar. The Xilinx XADC is a ADC that can be found in the'
+ 'series 7 FPGAs from Xilinx. The XADC has a DRP interface for communication.'
+ 'Currently two different frontends for the DRP interface exist. One that is only'
+ 'available on the ZYNQ family as a hardmacro in the SoC portion of the ZYNQ. The'
+ 'other one is available on all series 7 platforms and is a softmacro with a AXI'
+ 'interface. This binding document describes the bindings for both of them since'
+ 'the bindings are very similar.', elements=[
+ PropReg(required=True,
+ desc='Address and length of the register set for the device'),
+ PropInterrupts(required=True,
+ desc='Interrupt for the XADC control interface.'),
+ PropClocks(required=True,
+ desc='When using the ZYNQ this must be the ZYNQ PCAP clock,'
+ 'when using the AXI-XADC pcore this must be the clock that provides the'
+ 'clock to the AXI bus interface of the core.'),
+ PropStringList('xlnx,external-mux', str_pattern='none|single|dual',
+ desc=''),
+ PropIntList('xlnx,external-mux-channel', valid_list='0|1|2|3|4|5|6|7|8|9|10|11|12|13|14|16|1|2|3|4|5|6|8',
+ desc='Configures which pair of pins is used to'
+ 'sample data in external mux mode.'
+ 'Valid values for single external multiplexer mode are:'
+ 'Valid values for dual external multiplexer mode are:'
+ ''
+ 'This property needs to be present if the device is configured for'
+ 'external multiplexer mode (either single or dual). If the device is'
+ 'not using external multiplexer mode the property is ignored.'),
+ NodeDesc('xlnx,channels', None, False, desc=
+ 'List of external channels that are connected to the ADC', elements=[
+ PropInt('#address-cells', required=True,
+ desc='Should be 1.'),
+ PropInt('#size-cells', required=True,
+ desc='Should be 0.'),
+ NodeDesc('None', None, False, desc=
+ 'The child nodes of this node represent the external channels which are'
+ 'connected to the ADC. If the property is no present no external'
+ 'channels will be assumed to be connected.', elements=[
+ NodeDesc('None', None, False, desc=
+ 'Each child node represents one channel and has the following'
+ 'properties:', elements=[
+ PropIntList('reg', required=True, valid_list='0|1|2|3|4|5|6|7|8|9|10|11|12|13|14|16',
+ desc='Pair of pins the channel is connected to.'
+ 'Note each channel number should only be used at most'
+ 'once.'),
+ PropBool('xlnx,bipolar',
+ desc='If set the channel is used in bipolar'
+ 'mode.'),
+ ]),
+ ]),
+ ]),
+ ]),
+ ]
diff --git a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
index e0e0755cabd8a..24def33e6d6b8 100644
--- a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
+++ b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
@@ -32,24 +32,26 @@ Optional properties:
- xlnx,external-mux-channel: Configures which pair of pins is used to
sample data in external mux mode.
Valid values for single external multiplexer mode are:
- 0: VP/VN
- 1: VAUXP[0]/VAUXN[0]
- 2: VAUXP[1]/VAUXN[1]
+ * 0: VP/VN
+ * 1: VAUXP[0]/VAUXN[0]
+ * 2: VAUXP[1]/VAUXN[1]
...
- 16: VAUXP[15]/VAUXN[15]
+ * 16: VAUXP[15]/VAUXN[15]
Valid values for dual external multiplexer mode are:
- 1: VAUXP[0]/VAUXN[0] - VAUXP[8]/VAUXN[8]
- 2: VAUXP[1]/VAUXN[1] - VAUXP[9]/VAUXN[9]
+ * 1: VAUXP[0]/VAUXN[0] - VAUXP[8]/VAUXN[8]
+ * 2: VAUXP[1]/VAUXN[1] - VAUXP[9]/VAUXN[9]
...
- 8: VAUXP[7]/VAUXN[7] - VAUXP[15]/VAUXN[15]
+ * 8: VAUXP[7]/VAUXN[7] - VAUXP[15]/VAUXN[15]
This property needs to be present if the device is configured for
external multiplexer mode (either single or dual). If the device is
not using external multiplexer mode the property is ignored.
- - xnlx,channels: List of external channels that are connected to the ADC
+
+Required subnodes:
+ - xlnx,channels: List of external channels that are connected to the ADC
Required properties:
- * #address-cells: Should be 1.
- * #size-cells: Should be 0.
+ - #address-cells: Should be 1.
+ - #size-cells: Should be 0.
The child nodes of this node represent the external channels which are
connected to the ADC. If the property is no present no external
@@ -58,16 +60,16 @@ Optional properties:
Each child node represents one channel and has the following
properties:
Required properties:
- * reg: Pair of pins the channel is connected to.
- 0: VP/VN
- 1: VAUXP[0]/VAUXN[0]
- 2: VAUXP[1]/VAUXN[1]
+ - reg: Pair of pins the channel is connected to.
+ * 0: VP/VN
+ * 1: VAUXP[0]/VAUXN[0]
+ * 2: VAUXP[1]/VAUXN[1]
...
- 16: VAUXP[15]/VAUXN[15]
+ * 16: VAUXP[15]/VAUXN[15]
Note each channel number should only be used at most
once.
Optional properties:
- * xlnx,bipolar: If set the channel is used in bipolar
+ - xlnx,bipolar: If set the channel is used in bipolar
mode.
diff --git a/Documentation/devicetree/bindings/memory.py b/Documentation/devicetree/bindings/memory.py
new file mode 100644
index 0000000000000..5f11c0bb6aa83
--- /dev/null
+++ b/Documentation/devicetree/bindings/memory.py
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# /memory bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeMemory, PropReg, PropString
+
+schema = [
+ NodeMemory([
+ PropString('device_type', True),
+ PropReg(),
+ ]),
+]
diff --git a/Documentation/devicetree/bindings/opp/opp.py b/Documentation/devicetree/bindings/opp/opp.py
new file mode 100644
index 0000000000000..2cede72a3288f
--- /dev/null
+++ b/Documentation/devicetree/bindings/opp/opp.py
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# operating-point bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeCpu
+from kschema import PropIntList
+
+schema1 = [
+ NodeCpu(None, [
+ PropIntList('operating-points'),
+ ])
+ ]
diff --git a/Documentation/devicetree/bindings/regulator/fixed-regulator.py b/Documentation/devicetree/bindings/regulator/fixed-regulator.py
new file mode 100644
index 0000000000000..cc51c1dd8a0fd
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/fixed-regulator.py
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Performance-Monitoring Unit (PMU) bindings
+#
+# not Copyright 2018 Google LLC
+#
+
+from kschema import NodeDesc, PropString
+from regulator import SCHEMA_REGULATOR
+
+schema = [
+ NodeDesc('regulator-fixed', ['regulator-fixed'], False, [
+ ] + SCHEMA_REGULATOR),
+]
diff --git a/Documentation/devicetree/bindings/regulator/regulator.py b/Documentation/devicetree/bindings/regulator/regulator.py
new file mode 100644
index 0000000000000..455af73ac8ea5
--- /dev/null
+++ b/Documentation/devicetree/bindings/regulator/regulator.py
@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Performance-Monitoring Unit (PMU) bindings
+#
+# not Copyright 2018 Google LLC
+#
+
+from kschema import NodeDesc, PropBool, PropInt, PropPhandleTarget, PropString
+
+SCHEMA_REGULATOR = [
+ PropString('regulator-name', True),
+ PropBool('regulator-always-on'),
+ PropBool('regulator-boot-on'),
+ PropInt('regulator-min-microvolt'),
+ PropInt('regulator-max-microvolt'),
+ PropPhandleTarget(),
+ ];
+
+no_schema = True
diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.py b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.py
new file mode 100644
index 0000000000000..0f19fc2b61633
--- /dev/null
+++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.py
@@ -0,0 +1,14 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# /reserved-memory bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeReservedMemory, PropBool
+
+schema = [
+ NodeReservedMemory([
+ PropBool('ranges'),
+ ]),
+]
diff --git a/Documentation/devicetree/bindings/thermal/thermal.py b/Documentation/devicetree/bindings/thermal/thermal.py
new file mode 100644
index 0000000000000..a24801937594d
--- /dev/null
+++ b/Documentation/devicetree/bindings/thermal/thermal.py
@@ -0,0 +1,15 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# /thermal-zone bindings
+#
+# Copyright 2018 Google LLC
+#
+
+from kschema import NodeDesc, NodeThermalZones
+
+schema = [
+ NodeThermalZones([
+ NodeDesc('cpu-thermal', []),
+ NodeDesc('gpu-thermal', []),
+ ]),
+]
diff --git a/Documentation/devicetree/bindings/usb/usb-nop-xceiv.py b/Documentation/devicetree/bindings/usb/usb-nop-xceiv.py
new file mode 100644
index 0000000000000..d71c9f9ba84ad
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/usb-nop-xceiv.py
@@ -0,0 +1,16 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Performance-Monitoring Unit (PMU) bindings
+#
+# not Copyright 2018 Google LLC
+#
+
+from kschema import NodeDesc, PropGpios, PropInt, PropPhandleTarget
+
+schema = [
+ NodeDesc('usb-nop-xceiv', ['usb-nop-xceiv'], False, [
+ PropPhandleTarget(),
+ PropInt('#phy-cells'),
+ PropGpios('reset', 1),
+ ]),
+]
--
2.21.0.593.g511ec345e18-goog
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] RFC: Example schema files written in Python
2019-04-29 22:41 [PATCH] RFC: Example schema files written in Python Simon Glass
@ 2019-05-08 19:20 ` Rob Herring
2019-05-20 20:51 ` Simon Glass
0 siblings, 1 reply; 3+ messages in thread
From: Rob Herring @ 2019-05-08 19:20 UTC (permalink / raw)
To: Simon Glass
Cc: LKML, devicetree, Grant Likely, Frank Rowand, David Gibson,
Pantelis Antoniou
On Mon, Apr 29, 2019 at 5:41 PM Simon Glass <sjg@chromium.org> wrote:
>
> Most of these are hand-written, but xilinx-xadc.py is auto-generated by
> binding_to_py.py as an example of the use of that tool.
>
> This is part of a proof-of-concept device-tree validator. See the patch
> on the dtc mailing list for details:
Honestly, we are pretty far down the path of using json-schema to
consider changing to something else. We've already gone thru plenty of
concepts over the years with different languages for the schema.
While I think there are some cases where being able to do schema with
code is useful or necessary, the vast majority of cases can be handled
just fine with structured data. I'd rather see how we could augment
the data with code. Maybe that's snippets of code within the schema or
making the validation code more modular. I would like to see the dtc
checks infrastructure be extendable without modifying dtc. That could
include supporting checks written in python.
One example where we need more than just schema data is validating
properties that depend on a provider #.*-cells property. We can't
really do that with json-schema. At least the number of cells being
correct is covered by dtc already. So it would really be how do we
validate the cell data itself. OTOH, I think that is pretty far down
the list in priorities of things to validate. There's already
thousands of warnings generated by dtc and the json-schema which are
slow to get fixed (though some are really subjective and more what to
avoid for new users).
>
> RFC: Python-based device-tree validation
>
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
I'll use this one to comment on. Comments are most around goals for
the binding doc format.
> diff --git a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.py b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.py
> new file mode 100644
> index 0000000000000..9f55f48f7cde7
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.py
> @@ -0,0 +1,61 @@
> +# SPDX-License-Identifier: GPL-2.0+
> +#
> +
> +# Xilinx XADC device driver
Having some defined structure at the top-level is beneficial for
extracting data and automating review checks.
> +
> +from kschema import NodeDesc, PropBool, PropClocks, PropInt, PropIntList, PropInterrupts, PropReg, PropStringList
> +
> +schema = [
> + NodeDesc('xilinx-xadc', ['xlnx,zynq-xadc-1.00.a', 'xlnx,axi-xadc-1.00.a'], False, desc=
If one desires to generate a list of all possible compatible strings
(to find undocumented ones), how would you do that?
> + 'This binding document describes the bindings for both of them since the'
> + 'bindings are very similar. The Xilinx XADC is a ADC that can be found in the'
> + 'series 7 FPGAs from Xilinx. The XADC has a DRP interface for communication.'
> + 'Currently two different frontends for the DRP interface exist. One that is only'
> + 'available on the ZYNQ family as a hardmacro in the SoC portion of the ZYNQ. The'
> + 'other one is available on all series 7 platforms and is a softmacro with a AXI'
> + 'interface. This binding document describes the bindings for both of them since'
> + 'the bindings are very similar.', elements=[
One goal with the schema (at least core ones) is to generate
documentation from it. That would need to be a format such as rST so
we can have formatting. And we'd want to be able to parse the
properties and generate tables from them.
If someone really gets an itch, we'll rewrite sections of the DT spec
in schema.
> + PropReg(required=True,
> + desc='Address and length of the register set for the device'),
For any standard property, we'd have to create the class before
bindings can use it.
> + PropInterrupts(required=True,
How would you handle a property being conditionally required?
> + desc='Interrupt for the XADC control interface.'),
> + PropClocks(required=True,
> + desc='When using the ZYNQ this must be the ZYNQ PCAP clock,'
> + 'when using the AXI-XADC pcore this must be the clock that provides the'
> + 'clock to the AXI bus interface of the core.'),
> + PropStringList('xlnx,external-mux', str_pattern='none|single|dual',
> + desc=''),
> + PropIntList('xlnx,external-mux-channel', valid_list='0|1|2|3|4|5|6|7|8|9|10|11|12|13|14|16|1|2|3|4|5|6|8',
> + desc='Configures which pair of pins is used to'
> + 'sample data in external mux mode.'
> + 'Valid values for single external multiplexer mode are:'
> + 'Valid values for dual external multiplexer mode are:'
> + ''
> + 'This property needs to be present if the device is configured for'
> + 'external multiplexer mode (either single or dual). If the device is'
> + 'not using external multiplexer mode the property is ignored.'),
> + NodeDesc('xlnx,channels', None, False, desc=
> + 'List of external channels that are connected to the ADC', elements=[
> + PropInt('#address-cells', required=True,
> + desc='Should be 1.'),
> + PropInt('#size-cells', required=True,
> + desc='Should be 0.'),
> + NodeDesc('None', None, False, desc=
> + 'The child nodes of this node represent the external channels which are'
> + 'connected to the ADC. If the property is no present no external'
> + 'channels will be assumed to be connected.', elements=[
> + NodeDesc('None', None, False, desc=
> + 'Each child node represents one channel and has the following'
> + 'properties:', elements=[
> + PropIntList('reg', required=True, valid_list='0|1|2|3|4|5|6|7|8|9|10|11|12|13|14|16',
We need a different method or arg for every possible way we need to
express constraints? For example, say the value must be a power of 2.
> + desc='Pair of pins the channel is connected to.'
> + 'Note each channel number should only be used at most'
> + 'once.'),
> + PropBool('xlnx,bipolar',
> + desc='If set the channel is used in bipolar'
> + 'mode.'),
> + ]),
> + ]),
> + ]),
> + ]),
> + ]
> diff --git a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
> index e0e0755cabd8a..24def33e6d6b8 100644
> --- a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
> +++ b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
> @@ -32,24 +32,26 @@ Optional properties:
> - xlnx,external-mux-channel: Configures which pair of pins is used to
> sample data in external mux mode.
> Valid values for single external multiplexer mode are:
> - 0: VP/VN
> - 1: VAUXP[0]/VAUXN[0]
> - 2: VAUXP[1]/VAUXN[1]
> + * 0: VP/VN
> + * 1: VAUXP[0]/VAUXN[0]
> + * 2: VAUXP[1]/VAUXN[1]
Not really automatic conversion if you have to tweak the source. Is
your thought we'd make the txt files more structured to do automatic
conversions or we'd commit the python files?
Rob
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] RFC: Example schema files written in Python
2019-05-08 19:20 ` Rob Herring
@ 2019-05-20 20:51 ` Simon Glass
0 siblings, 0 replies; 3+ messages in thread
From: Simon Glass @ 2019-05-20 20:51 UTC (permalink / raw)
To: Rob Herring
Cc: LKML, Devicetree Discuss, Grant Likely, Frank Rowand,
David Gibson, Pantelis Antoniou
Hi Rob,
On Wed, 8 May 2019 at 13:21, Rob Herring <robh@kernel.org> wrote:
>
> On Mon, Apr 29, 2019 at 5:41 PM Simon Glass <sjg@chromium.org> wrote:
> >
> > Most of these are hand-written, but xilinx-xadc.py is auto-generated by
> > binding_to_py.py as an example of the use of that tool.
> >
> > This is part of a proof-of-concept device-tree validator. See the patch
> > on the dtc mailing list for details:
>
> Honestly, we are pretty far down the path of using json-schema to
> consider changing to something else. We've already gone thru plenty of
> concepts over the years with different languages for the schema.
I don't think I saw much of that. I did hear that others has suggested
such options but the yaml/json design is the only one I'm aware of.
Anyway, it sounds like things are pretty set in stone right now. Even
so, I'll reply to this email.
>
> While I think there are some cases where being able to do schema with
> code is useful or necessary, the vast majority of cases can be handled
> just fine with structured data. I'd rather see how we could augment
> the data with code. Maybe that's snippets of code within the schema or
> making the validation code more modular. I would like to see the dtc
> checks infrastructure be extendable without modifying dtc. That could
> include supporting checks written in python.
>
> One example where we need more than just schema data is validating
> properties that depend on a provider #.*-cells property. We can't
> really do that with json-schema. At least the number of cells being
> correct is covered by dtc already. So it would really be how do we
> validate the cell data itself. OTOH, I think that is pretty far down
> the list in priorities of things to validate. There's already
> thousands of warnings generated by dtc and the json-schema which are
> slow to get fixed (though some are really subjective and more what to
> avoid for new users).
>
> >
> > RFC: Python-based device-tree validation
> >
> > Signed-off-by: Simon Glass <sjg@chromium.org>
> > ---
>
> I'll use this one to comment on. Comments are most around goals for
> the binding doc format.
>
> > diff --git a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.py b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.py
> > new file mode 100644
> > index 0000000000000..9f55f48f7cde7
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.py
> > @@ -0,0 +1,61 @@
> > +# SPDX-License-Identifier: GPL-2.0+
> > +#
> > +
> > +# Xilinx XADC device driver
>
> Having some defined structure at the top-level is beneficial for
> extracting data and automating review checks.
What does this refer to?
>
> > +
> > +from kschema import NodeDesc, PropBool, PropClocks, PropInt, PropIntList, PropInterrupts, PropReg, PropStringList
> > +
> > +schema = [
> > + NodeDesc('xilinx-xadc', ['xlnx,zynq-xadc-1.00.a', 'xlnx,axi-xadc-1.00.a'], False, desc=
>
> If one desires to generate a list of all possible compatible strings
> (to find undocumented ones), how would you do that?
Read in all the schema files and then walk through the entire schema
looking for compatible strings.
>
> > + 'This binding document describes the bindings for both of them since the'
> > + 'bindings are very similar. The Xilinx XADC is a ADC that can be found in the'
> > + 'series 7 FPGAs from Xilinx. The XADC has a DRP interface for communication.'
> > + 'Currently two different frontends for the DRP interface exist. One that is only'
> > + 'available on the ZYNQ family as a hardmacro in the SoC portion of the ZYNQ. The'
> > + 'other one is available on all series 7 platforms and is a softmacro with a AXI'
> > + 'interface. This binding document describes the bindings for both of them since'
> > + 'the bindings are very similar.', elements=[
>
> One goal with the schema (at least core ones) is to generate
> documentation from it. That would need to be a format such as rST so
> we can have formatting. And we'd want to be able to parse the
> properties and generate tables from them.
The docs above are taken verbatim from the binding, so there is no
formatting really, except for blank lines.1
>
> If someone really gets an itch, we'll rewrite sections of the DT spec
> in schema.
>
> > + PropReg(required=True,
> > + desc='Address and length of the register set for the device'),
>
> For any standard property, we'd have to create the class before
> bindings can use it.
There is a 'generic' property (PropDesc) which is the base class for
all properties. So most properties would not have their own class.
>
> > + PropInterrupts(required=True,
>
> How would you handle a property being conditionally required?
The cond_props dictionary is attached to each property. See
ElementPresent for the implementation.
>
> > + desc='Interrupt for the XADC control interface.'),
> > + PropClocks(required=True,
> > + desc='When using the ZYNQ this must be the ZYNQ PCAP clock,'
> > + 'when using the AXI-XADC pcore this must be the clock that provides the'
> > + 'clock to the AXI bus interface of the core.'),
> > + PropStringList('xlnx,external-mux', str_pattern='none|single|dual',
> > + desc=''),
> > + PropIntList('xlnx,external-mux-channel', valid_list='0|1|2|3|4|5|6|7|8|9|10|11|12|13|14|16|1|2|3|4|5|6|8',
> > + desc='Configures which pair of pins is used to'
> > + 'sample data in external mux mode.'
> > + 'Valid values for single external multiplexer mode are:'
> > + 'Valid values for dual external multiplexer mode are:'
> > + ''
> > + 'This property needs to be present if the device is configured for'
> > + 'external multiplexer mode (either single or dual). If the device is'
> > + 'not using external multiplexer mode the property is ignored.'),
> > + NodeDesc('xlnx,channels', None, False, desc=
> > + 'List of external channels that are connected to the ADC', elements=[
> > + PropInt('#address-cells', required=True,
> > + desc='Should be 1.'),
> > + PropInt('#size-cells', required=True,
> > + desc='Should be 0.'),
> > + NodeDesc('None', None, False, desc=
> > + 'The child nodes of this node represent the external channels which are'
> > + 'connected to the ADC. If the property is no present no external'
> > + 'channels will be assumed to be connected.', elements=[
> > + NodeDesc('None', None, False, desc=
> > + 'Each child node represents one channel and has the following'
> > + 'properties:', elements=[
> > + PropIntList('reg', required=True, valid_list='0|1|2|3|4|5|6|7|8|9|10|11|12|13|14|16',
>
> We need a different method or arg for every possible way we need to
> express constraints? For example, say the value must be a power of 2.
That's one of the nice things about Python is that it is easy to code
up a custom validator. See the Validate() method in each class.
At some point it might worth putting this sort of thing into its own
validator class. How is this done with yaml?
>
> > + desc='Pair of pins the channel is connected to.'
> > + 'Note each channel number should only be used at most'
> > + 'once.'),
> > + PropBool('xlnx,bipolar',
> > + desc='If set the channel is used in bipolar'
> > + 'mode.'),
> > + ]),
> > + ]),
> > + ]),
> > + ]),
> > + ]
> > diff --git a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
> > index e0e0755cabd8a..24def33e6d6b8 100644
> > --- a/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
> > +++ b/Documentation/devicetree/bindings/iio/adc/xilinx-xadc.txt
> > @@ -32,24 +32,26 @@ Optional properties:
> > - xlnx,external-mux-channel: Configures which pair of pins is used to
> > sample data in external mux mode.
> > Valid values for single external multiplexer mode are:
> > - 0: VP/VN
> > - 1: VAUXP[0]/VAUXN[0]
> > - 2: VAUXP[1]/VAUXN[1]
> > + * 0: VP/VN
> > + * 1: VAUXP[0]/VAUXN[0]
> > + * 2: VAUXP[1]/VAUXN[1]
>
> Not really automatic conversion if you have to tweak the source. Is
> your thought we'd make the txt files more structured to do automatic
> conversions or we'd commit the python files?
I was hoping to fix up the binding files a little, such that automatic
conversion is good enough, make sure that the Python file can emit the
original binding (in whatever format is chosen) then commit the Python
files as the source of truth.
Regards,
Simon
^ permalink raw reply [flat|nested] 3+ messages in thread
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2019-04-29 22:41 [PATCH] RFC: Example schema files written in Python Simon Glass
2019-05-08 19:20 ` Rob Herring
2019-05-20 20:51 ` Simon Glass
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