[PATCH v2] gpio: octeon_gpio: Add GPIO controller driver for Octeon

[Simon Glass <sjg@chromium.org>]

On Tue, 26 May 2020 at 06:19, Stefan Roese <sr@denx.de> wrote:
>
> From: Suneel Garapati <sgarapati@marvell.com>
>
> Add support for GPIO controllers found on Octeon II/III and Octeon TX
> TX2 SoC platforms.
>
> Signed-off-by: Aaron Williams <awilliams@marvell.com>
> Signed-off-by: Suneel Garapati <sgarapati@marvell.com>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Simon Glass <sjg@chromium.org>
> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
> Cc: Aaron Williams <awilliams@marvell.com>
> Cc: Chandrakala Chavva <cchavva@marvell.com>
> ---
> v2 (Stefan):
> - Removed #ifdef's for Octeon vs OcteonTX/TX2 completely
>   The differentiation is now made via driver data / compatible
>   string
>
> RFC -> v1 (Stefan)
> - Separated this patch from the OcteonTX/TX2 RFC patch series into a
>   single patch. This is useful, as the upcoming MIPS Octeon support will
>   use this GPIO driver.
> - Added MIPS Octeon II/III support (big endian). Rename driver and its
>   function names from "octeontx" to "octeon" to better match all Octeon
>   platforms.
> - Moved from union to defines / bitmasks. This makes the driver usage
>   on little- and big-endian platforms much easier.
> - Used clrbits_64() instead of clrbits_le64() and friends to support
>   usage on little- and big-endian systems
> - Removed dev->req_seq assignment
> - Enhanced Kconfig text
> - Rewrote GPIO_BIT macro
> - Dropped many macros to calculate the registers offsets and implemented
>   simple functions for this (easier to read)
> - Used GENMASK_ULL and FIELD_GET helpers
> - Minor cosmetic changes (dropped brackets etc)
> - Reword commit text and subject
>
>  drivers/gpio/Kconfig       |  10 ++
>  drivers/gpio/Makefile      |   1 +
>  drivers/gpio/octeon_gpio.c | 253 +++++++++++++++++++++++++++++++++++++
>  3 files changed, 264 insertions(+)
>  create mode 100644 drivers/gpio/octeon_gpio.c
>

Reviewed-by: Simon Glass <sjg@chromium.org>