From mboxrd@z Thu Jan 1 00:00:00 1970 From: Simon Glass Date: Tue, 18 Oct 2016 10:23:50 -0600 Subject: [U-Boot] [PATCH 1/2] armv8: add hooks for all cache-wide operations In-Reply-To: <20161017213540.5984-1-swarren@wwwdotorg.org> References: <20161017213540.5984-1-swarren@wwwdotorg.org> Message-ID: List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Stephen, On 17 October 2016 at 15:35, Stephen Warren wrote: > From: Stephen Warren > > SoC-specific logic may be required for all forms of cache-wide > operations; invalidate and flush of both dcache and icache (note that > only 3 of the 4 possible combinations make sense, since the icache never > contains dirty lines). This patch adds an optional hook for all > implemented cache-wide operations, and renames the one existing hook to > better represent exactly which operation it is implementing. A dummy > no-op implementation of each hook is provided. These dummy > implementations are moved into C code, since there's no need to > implement them in assembly. > > Signed-off-by: Stephen Warren > --- > arch/arm/cpu/armv8/cache.S | 6 ------ > arch/arm/cpu/armv8/cache_v8.c | 23 ++++++++++++++++++++--- > arch/arm/cpu/armv8/fsl-layerscape/lowlevel.S | 4 ++-- > arch/arm/include/asm/system.h | 5 ++++- > arch/arm/mach-tegra/tegra186/cache.c | 2 +- > 5 files changed, 27 insertions(+), 13 deletions(-) > I think we should have a proper interface for this stuff rather than weak functions. Maybe we need a linker-list approach, or a cache uclass? Regards, Simon