From mboxrd@z Thu Jan  1 00:00:00 1970
From: Simon Glass <sjg@chromium.org>
Date: Thu, 2 May 2019 10:22:30 -0600
Subject: [U-Boot] [PATCH v2 45/50] Revert "pci: Scale MAX_PCI_REGIONS
	based on CONFIG_NR_DRAM_BANKS"
In-Reply-To: <20190502092452.GA30634@ulmo>
References: <20190426035922.20596-1-sjg@chromium.org>
 <20190426035922.20596-46-sjg@chromium.org>
 <CAEUhbmUVcxeTMNZUSgGzxnhSbZwYwN-DP9kBnF4XzbEA2Tdodw@mail.gmail.com>
 <20190502092452.GA30634@ulmo>
Message-ID: <CAPnjgZ3Duqg4Y_xUULYy65M+FfOSYeMLCLxeTgT=YOL_gTPFLQ@mail.gmail.com>
List-Id: <u-boot.lists.denx.de>
MIME-Version: 1.0
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit
To: u-boot@lists.denx.de

Hi Thierry,

On Thu, 2 May 2019 at 03:25, Thierry Reding <treding@nvidia.com> wrote:
>
> On Thu, May 02, 2019 at 12:09:49AM +0800, Bin Meng wrote:
> > +Thierry
> >
> > On Fri, Apr 26, 2019 at 12:00 PM Simon Glass <sjg@chromium.org> wrote:
> > >
> > > This reverts commit aec4298ccb337106fd0115b91d846a022fdf301d.
> > >
> > > Unfortunately this has a dramatic impact on the pre-relocation memory
> > > used on x86 platforms (increasing it by 2KB) since it increases the
> > > overhead for each PCI device from 220 bytes to 412 bytes.
> > >
> > > The offending line is in UCLASS_DRIVER(pci):
> > >
> > >         .per_device_auto_alloc_size = sizeof(struct pci_controller),
> > >
> > > This means that all PCI devices have the controller struct associated
> > > with them. The solution is to move the regions[] member out of the array,
> > > makes its size dynamic, or split UCLASS_PCI into controllers and
> > > non-controllers, as the comment suggests.
> > >
> > > For now, revert the commit to get things running again.
> > >
> > > Signed-off-by: Simon Glass <sjg@chromium.org>
> > > ---
> > >
> > > Changes in v2: None
> > >
> > >  include/pci.h | 6 +-----
> > >  1 file changed, 1 insertion(+), 5 deletions(-)
> > >
> >
> > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
>
> Ugh... so we're trading one regression for another? Can we not live with
> the 2 KiB increase on x86 until this has been properly fixed? Currently
> this will cause Jetson TX2 to crash if it starts using PCI.

Unfortunately this breaks several boards since we are out of memory.

I think this needs a better solution to reduce the memory usage down
to sensible levels. This is something I should have considered when
implementing the PCI uclass, but unfortunately I did not.

Regards,
Simon