From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E751FC433EF for ; Sat, 12 Mar 2022 02:27:24 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id F06E183B23; Sat, 12 Mar 2022 03:26:32 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="F/ABkdU5"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id AE68580F47; Sat, 12 Mar 2022 03:25:35 +0100 (CET) Received: from mail-oo1-xc30.google.com (mail-oo1-xc30.google.com [IPv6:2607:f8b0:4864:20::c30]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 04FFB83B13 for ; Sat, 12 Mar 2022 03:25:06 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sjg@google.com Received: by mail-oo1-xc30.google.com with SMTP id r41-20020a4a966c000000b0031bf85a4124so12787238ooi.0 for ; Fri, 11 Mar 2022 18:25:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=To5JRKdvv6Hxxx8GcZ4jlPTfJ8nixVMDFQwsnaKGx+I=; b=F/ABkdU50wQP6lNJ+kSpWXZ5jx4YRAu+upBsDjxLWiViKnumSbukQY+KHcPfhBUotv W0A5fyF8FWiavvfhfZss3hABtV53J3MNqSvjEHKkefiubGfJ3uxFqc2E95mMfS+NDgaH 7thEqhpYjYPruXYDeKFzOMRqk/MRA5rLRE0mY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=To5JRKdvv6Hxxx8GcZ4jlPTfJ8nixVMDFQwsnaKGx+I=; b=HF/32fWPgSpKu/4CVr3CoCDMyQp74zyn/Kwe1l9O/UFf9vnwMS0qmO81thINzeDWDX pewfO5kleJ+2O8+F2ULyQ+zNoRAXFKus2tYZvlzGn3SB1eBeWEmIBn+Za1HBObpRtOLW o74Xc5HqEDFTZadjCMmGta/z4oEomsCbNl35DAdrOvhTaWpU7VvXUZug/ZncYGdYBCbs shgQCGpVdwY9WRdBxlBfKgTrekqj19kAmcs/L11/oGP6p8Pcex40w5JF09jGyeYDvKQo bibsGisXEhGCDlEtiLr+4RjnHuhljE50ECKnmvd9ILyO/W7mV6cwFhFGBzSynB7e4p37 2saA== X-Gm-Message-State: AOAM5318VltBq1NuJaJ1+Vow9gAAcZdCPvGemnctM3iB3ACwwZ8UEDmi 5Yrn/EpykYEhRMd/nCUd6q9VbkDM2R/yVWhzY20ZrGrf9VAzhg== X-Google-Smtp-Source: ABdhPJwULALvY1zRJneyXtMgP/A3sxgXvfaG3QUZpalwX2LP88t7Ntc2UMrFGmqZMAuwc8spSM1rvqTm1YzwcwQnQ3w= X-Received: by 2002:a05:6870:14cf:b0:d9:a9ce:92a9 with SMTP id l15-20020a05687014cf00b000d9a9ce92a9mr7068326oab.64.1647051905050; Fri, 11 Mar 2022 18:25:05 -0800 (PST) MIME-Version: 1.0 References: <20220222013131.3114990-1-pgwipeout@gmail.com> <20220222013131.3114990-7-pgwipeout@gmail.com> In-Reply-To: <20220222013131.3114990-7-pgwipeout@gmail.com> From: Simon Glass Date: Fri, 11 Mar 2022 19:24:51 -0700 Message-ID: Subject: Re: [PATCH v1 06/11] rockchip: handle bootrom recovery mode in spl To: Peter Geis Cc: Philipp Tomsich , Kever Yang , U-Boot Mailing List Content-Type: text/plain; charset="UTF-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Hi Peter, On Mon, 21 Feb 2022 at 18:31, Peter Geis wrote: > > Fixup the bootrom recovery mode code to function in spl, so we can > handle recovery mode in case u-boot loading is broken. > > Signed-off-by: Peter Geis > --- > arch/arm/mach-rockchip/Makefile | 6 +++--- > arch/arm/mach-rockchip/boot_mode.c | 4 +++- > arch/arm/mach-rockchip/rk3568/rk3568.c | 23 +++++++++++++++++++++++ > 3 files changed, 29 insertions(+), 4 deletions(-) > > diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile > index 00aef0ecee6a..53aff25ce8f6 100644 > --- a/arch/arm/mach-rockchip/Makefile > +++ b/arch/arm/mach-rockchip/Makefile > @@ -15,13 +15,13 @@ obj-tpl-$(CONFIG_ROCKCHIP_PX30) += px30-board-tpl.o > > obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o > > -ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) > - > # Always include boot_mode.o, as we bypass it (i.e. turn it off) > # inside of boot_mode.c when CONFIG_BOOT_MODE_REG is 0. This way, > # we can have the preprocessor correctly recognise both 0x0 and 0 > # meaning "turn it off". > -obj-y += boot_mode.o > +obj-$(CONFIG_ARCH_ROCKCHIP) += boot_mode.o > + > +ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) > obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o > obj-$(CONFIG_MISC_INIT_R) += misc.o > endif > diff --git a/arch/arm/mach-rockchip/boot_mode.c b/arch/arm/mach-rockchip/boot_mode.c > index 1a1a887fc2cd..43cb369465a2 100644 > --- a/arch/arm/mach-rockchip/boot_mode.c > +++ b/arch/arm/mach-rockchip/boot_mode.c > @@ -51,7 +51,7 @@ __weak int rockchip_dnl_key_pressed(void) > ret = -ENODEV; > uclass_foreach_dev(dev, uc) { > if (!strncmp(dev->name, "saradc", 6)) { > - ret = adc_channel_single_shot(dev->name, 1, &val); > + ret = adc_channel_single_shot(dev->name, 0, &val); > break; > } > } > @@ -89,6 +89,7 @@ int setup_boot_mode(void) > boot_mode = readl(reg); > debug("%s: boot mode 0x%08x\n", __func__, boot_mode); > > +#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD) Can you use if() ? > /* Clear boot mode */ > writel(BOOT_NORMAL, reg); > > @@ -102,6 +103,7 @@ int setup_boot_mode(void) > env_set("preboot", "setenv preboot; ums mmc 0"); > break; > } > +#endif > > return 0; > } > diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c b/arch/arm/mach-rockchip/rk3568/rk3568.c > index 22eeb77d41fa..4e23feb9417f 100644 > --- a/arch/arm/mach-rockchip/rk3568/rk3568.c > +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c > @@ -104,3 +104,26 @@ int arch_cpu_init(void) > #endif > return 0; > } > + > +#ifdef CONFIG_SPL_BUILD Do you need that? > + > +void __weak led_setup(void) > +{ > +} > + > +void spl_board_init(void) > +{ > + led_setup(); > + > +#if defined(SPL_DM_REGULATOR) You need a CONFIG_ prefix there. But better: if (CONFIG_IS_ENABLED(DM_REGULATOR)) > + /* > + * Turning the eMMC and SPI back on (if disabled via the Qseven > + * BIOS_ENABLE) signal is done through a always-on regulator). > + */ > + if (regulators_enable_boot_on(false)) > + debug("%s: Cannot enable boot on regulator\n", __func__); > +#endif > + > + setup_boot_mode(); > +} > +#endif > -- > 2.25.1 > Regards, Simon