[U-Boot] inappropriate PCI configuration on arm64 qemu?

From: Simon Glass <sjg@chromium.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] inappropriate PCI configuration on arm64 qemu?
Date: Wed, 30 May 2018 13:18:30 -0600	[thread overview]
Message-ID: <CAPnjgZ3Uw+P4+nxNzsjnP33kGbfmr6GWsSCxKSYCycVnyoWS0g@mail.gmail.com> (raw)
In-Reply-To: <20180528075905.GF30789@linaro.org>

+Tuomas

Hi Akashi,

On 28 May 2018 at 01:59, AKASHI Takahiro <takahiro.akashi@linaro.org> wrote:
> When I tried to add a SD card to qemu's virt machine (2.10.0) as,
>         ------
>         -device sdhci-pci \
>         -device sd-card,drive=my_sd \
>         -drive if=none,id=my_sd,format=raw,file=/path/my/sd.img
>         ------
> u-boot doesn't configure a SDHCI controller properly and an attached
> device is never detected.
>
> Digging into the code, I found
> * reading BAR5 in dm_pciauto_setup_device() shows BAR5 is a 32-bit address,
> * pciauto_region_allocate() allocates a 64-bit address (0x80.ABCD.0000)
>   to BAR5 as res->bus_lower is 0x80.0000.0000
> * Upper 32-bit value is not written back to BAR5 because of !found_mem64
>   (BAR5 is the last one and no succeeding BAR anyway.)
>
> On the other hand,
> * Qemu defines two PCI memory regions for MMIO:
>         (from qemu's hw/arm/virt.c)
>         ------
>         [VIRT_PCIE_MMIO] =          { 0x10000000, 0x2eff0000 },
>         [VIRT_PCIE_PIO] =           { 0x3eff0000, 0x00010000 },
>         [VIRT_PCIE_ECAM] =          { 0x3f000000, 0x01000000 },
>         [VIRT_MEM] =                { 0x40000000, RAMLIMIT_BYTES },
>         /* Second PCIe window, 512GB wide at the 512GB boundary */
>         [VIRT_PCIE_MMIO_HIGH] =   { 0x8000000000ULL, 0x8000000000ULL },
>         ------
> * A PCI card is configured in decode_regions() so that
>   'hose' has only one entry per each type of memory regions.
>   This behavior was introduced by Simon's patch:
>         ------
>         commit 9526d83ac5a
>         Author: Simon Glass <sjg@chromium.org>
>         Date:   Thu Nov 19 20:26:58 2015 -0700
>
>             dm: pci: Support decoding ranges with duplicate entries
>         ------
> * As a result, MMIO region (0x1000.0000-0x2eff.0000) is overwritten
>   and MMIO_HIGH is the only one available at runtime.
>
> I believe that this behavior is the root cause of my issue, and
> by reverting the patch mentioned above, everything works fine.
>
> While I understand a concern mentioned in the commit message,
> there should be a better way to manage the case.

There was a series that changed things in this area. Can you take a look?

   PCI: dm: Ignore 64-bit memory regions if CONFIG_SYS_PCI_64BIT not set

Regards,
Simon