From mboxrd@z Thu Jan  1 00:00:00 1970
From: Simon Glass <sjg@chromium.org>
Date: Thu, 14 Jul 2016 21:56:40 -0600
Subject: [U-Boot] [PATCH v4 1/4] usb: rockchip-phy: implement USB2.0 phy
	control
In-Reply-To: <CAPnjgZ1tPpSqw4w9dx_Uh6fxGu_-Jpbf4HyhptSg3rbNi2+b+w@mail.gmail.com>
References: <1468479155-1796-1-git-send-email-xzy.xu@rock-chips.com>
 <1468479155-1796-2-git-send-email-xzy.xu@rock-chips.com>
 <CAPnjgZ1tPpSqw4w9dx_Uh6fxGu_-Jpbf4HyhptSg3rbNi2+b+w@mail.gmail.com>
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On 14 July 2016 at 21:20, Simon Glass <sjg@chromium.org> wrote:
> On 14 July 2016 at 00:52, Ziyuan Xu <xzy.xu@rock-chips.com> wrote:
>> From: Xu Ziyuan <xzy.xu@rock-chips.com>
>>
>> So far, Rockchip SoCs have two kinds of USB2.0 phy, such as Synopsys and
>> Innosilicon. This patch applys dwc2 usb driver framework to implement
>> phy_init() and phy_off() methods for Synopsys phy on Rockchip platform.
>>
>> Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
>>
>> ---
>>
>> Changes in v4:
>> - Implement a mechanism to be compatible with more Rockchip SoCs
>> - Rename rockchip_usb_syno_phy.c to rockchip_usb2_phy.c
>>
>> Changes in v3:
>> - Make UOC_CON registers to be unfixed which should be got from DT
>>
>> Changes in v2:
>> - Rename rk3288_usb_phy.c to rockchip_usb_syno_phy.c
>> - Rework the behaviour in otg_phy_init() and otg_phy_off()
>>
>>  drivers/usb/phy/Makefile            |   1 +
>>  drivers/usb/phy/rockchip_usb2_phy.c | 107 ++++++++++++++++++++++++++++++++++++
>>  include/usb/dwc2_udc.h              |   2 +
>>  3 files changed, 110 insertions(+)
>>  create mode 100644 drivers/usb/phy/rockchip_usb2_phy.c
>
> Acked-by: Simon Glass <sjg@chromium.org>

Applied to u-boot-rockchip, thanks!