From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: MIME-Version: 1.0 In-Reply-To: <20150506084143.GA22949@pd.tnic> References: <1430884947-16787-1-git-send-email-lho@apm.com> <20150506084143.GA22949@pd.tnic> Date: Wed, 6 May 2015 10:00:45 -0700 Message-ID: Subject: Re: [PATCH v8 0/4] edac: Add APM X-Gene SoC memory controller EDAC driver From: Loc Ho Content-Type: multipart/alternative; boundary=047d7bfcf7a672524e05156cbc27 To: Borislav Petkov Cc: Doug Thompson , Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Ian Campbell , linux-edac@vger.kernel.org, "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , Jon Masters , "patches@apm.com" List-ID: --047d7bfcf7a672524e05156cbc27 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Hi, > This patch adds support for the APM X-Gene SoC memory controller EDAC > driver > > for DT. > > > > v8: > > * Change ASM_EDAC_H to __ASM_EDAC_H in file edac.h > > * Add WARN_ONCE in stub function atomic_scrub > > * Update DTS binding documentation (with only memory controller node) > > * Temporary remove L1/L2, L3, and SoC driver code and update memory > driver > > code accordingly > > What does that mean exactly? They'll get added later? > It is not include in this first patch set. Yes, it will be added later. I will response along with Arnd subsequent email.=E2=80=8B > It is called now xgene_edac_mc.c. Am I to expect more > xgene_edac_.c submissions? =E2=80=8BYes=E2=80=8B > What happened to building > everything around the shared IRQ handler? > =E2=80=8BIt was discussed with Rob already in previous email. As we don't t= ouch the shared status registers besides reading status, it will just register as shared interrupt.=E2=80=8B > > Also, I see this SOB chain in some of the patches: > > Signed-off-by: Feng Kan > Signed-off-by: Loc Ho > > and it is not clear who did what, from looking at the chain. > > If you both authored the patches, you can write > > Originally-by: Feng > [ Loc: did this and that] > Signed-off-by: Loc > > for example. > > See Documentation/SubmittingPatches for more info. > =E2=80=8BOkay... Feng was the originally author. -Loc --047d7bfcf7a672524e05156cbc27 Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable
Hi,

> This patch adds support for= the APM X-Gene SoC memory controller EDAC driver
> for DT.
>
> v8:
> * Change ASM_EDAC_H to __ASM_EDAC_H in file edac.h
> * Add WARN_ONCE in stub function atomic_scrub
> * Update DTS binding documentation (with only memory controller node)<= br> > * Temporary remove L1/L2, L3, and SoC driver code and update memory dr= iver
>=C2=A0 =C2=A0code accordingly

What does that mean exactly? They'll get added later?
<= div>
It is not include in this first patch set. Yes, it wi= ll be added later. I will response along with Arnd subsequent email.=E2=80= =8B

=C2=A0
It is ca= lled now xgene_edac_mc.c. Am I to expect more
xgene_edac_<functional_unit>.c submissions?

=E2=80=8BYes=E2=80=8B

=C2=A0
What happened to building
everything around the shared IRQ handler?

=E2=80=8BIt was discussed with Rob already in previous email. As we d= on't touch the shared status registers besides reading status, it will = just register as shared interrupt.=E2=80=8B

=C2=A0

Also, I see this SOB chain in some of the patches:

Signed-off-by: Feng Kan <fkan@apm.com>
Signed-off-by: Loc Ho <lho@apm.com>= ;

and it is not clear who did what, from looking at the chain.

If you both authored the patches, you can write

Originally-by: Feng
[ Loc: did this and that]
Signed-off-by: Loc

for example.

See Documentation/SubmittingPatches for more info.
=E2=80=8BOkay... Feng was the originally author.
-Loc

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