From mboxrd@z Thu Jan 1 00:00:00 1970 From: Loc Ho Subject: Re: [PATCH v3] ARM64: kernel: implement ACPI parking protocol Date: Tue, 26 Jan 2016 15:13:30 -0800 Message-ID: References: <1453806638-23167-1-git-send-email-lorenzo.pieralisi@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Return-path: Received: from mail-lb0-f177.google.com ([209.85.217.177]:32819 "EHLO mail-lb0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750887AbcAZXNb (ORCPT ); Tue, 26 Jan 2016 18:13:31 -0500 Received: by mail-lb0-f177.google.com with SMTP id x4so101965232lbm.0 for ; Tue, 26 Jan 2016 15:13:30 -0800 (PST) In-Reply-To: <1453806638-23167-1-git-send-email-lorenzo.pieralisi@arm.com> Sender: linux-acpi-owner@vger.kernel.org List-Id: linux-acpi@vger.kernel.org To: Lorenzo Pieralisi Cc: "linux-arm-kernel@lists.infradead.org" , linux-acpi@vger.kernel.org, Will Deacon , Hanjun Guo , Sudeep Holla , Catalin Marinas , Mark Rutland , Mark Salter , Al Stone Hi Lorenzo, On Tue, Jan 26, 2016 at 3:10 AM, Lorenzo Pieralisi wrote: > The SBBR and ACPI specifications allow ACPI based systems that do not > implement PSCI (eg systems with no EL3) to boot through the ACPI parking > protocol specification[1]. > > This patch implements the ACPI parking protocol CPU operations, and adds > code that eases parsing the parking protocol data structures to the > ARM64 SMP initializion carried out at the same time as cpus enumeration. > > To wake-up the CPUs from the parked state, this patch implements a > wakeup IPI for ARM64 (ie arch_send_wakeup_ipi_mask()) that mirrors the > ARM one, so that a specific IPI is sent for wake-up purpose in order > to distinguish it from other IPI sources. > > Given the current ACPI MADT parsing API, the patch implements a glue > layer that helps passing MADT GICC data structure from SMP initialization > code to the parking protocol implementation somewhat overriding the CPU > operations interfaces. This to avoid creating a completely trasparent > DT/ACPI CPU operations layer that would require creating opaque > structure handling for CPUs data (DT represents CPU through DT nodes, ACPI > through static MADT table entries), which seems overkill given that ACPI > on ARM64 mandates only two booting protocols (PSCI and parking protocol), > so there is no need for further protocol additions. > > Based on the original work by Mark Salter > > [1] https://acpica.org/sites/acpica/files/MP%20Startup%20for%20ARM%20platforms.docx > > Signed-off-by: Lorenzo Pieralisi > Cc: Will Deacon > Cc: Hanjun Guo > Cc: Loc Ho > Cc: Sudeep Holla > Cc: Catalin Marinas > Cc: Mark Rutland > Cc: Mark Salter > Cc: Al Stone I had tested this with X-Gene Mustang board. It applies cleanly against 4.5.0-rc1 and detected all CPU's. For those of you want to try this, you need an FW update if you are using APM Tianocore. Otherwise, it will stuck in very early booting stage. Thanks, Loc From mboxrd@z Thu Jan 1 00:00:00 1970 From: lho@apm.com (Loc Ho) Date: Tue, 26 Jan 2016 15:13:30 -0800 Subject: [PATCH v3] ARM64: kernel: implement ACPI parking protocol In-Reply-To: <1453806638-23167-1-git-send-email-lorenzo.pieralisi@arm.com> References: <1453806638-23167-1-git-send-email-lorenzo.pieralisi@arm.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Lorenzo, On Tue, Jan 26, 2016 at 3:10 AM, Lorenzo Pieralisi wrote: > The SBBR and ACPI specifications allow ACPI based systems that do not > implement PSCI (eg systems with no EL3) to boot through the ACPI parking > protocol specification[1]. > > This patch implements the ACPI parking protocol CPU operations, and adds > code that eases parsing the parking protocol data structures to the > ARM64 SMP initializion carried out at the same time as cpus enumeration. > > To wake-up the CPUs from the parked state, this patch implements a > wakeup IPI for ARM64 (ie arch_send_wakeup_ipi_mask()) that mirrors the > ARM one, so that a specific IPI is sent for wake-up purpose in order > to distinguish it from other IPI sources. > > Given the current ACPI MADT parsing API, the patch implements a glue > layer that helps passing MADT GICC data structure from SMP initialization > code to the parking protocol implementation somewhat overriding the CPU > operations interfaces. This to avoid creating a completely trasparent > DT/ACPI CPU operations layer that would require creating opaque > structure handling for CPUs data (DT represents CPU through DT nodes, ACPI > through static MADT table entries), which seems overkill given that ACPI > on ARM64 mandates only two booting protocols (PSCI and parking protocol), > so there is no need for further protocol additions. > > Based on the original work by Mark Salter > > [1] https://acpica.org/sites/acpica/files/MP%20Startup%20for%20ARM%20platforms.docx > > Signed-off-by: Lorenzo Pieralisi > Cc: Will Deacon > Cc: Hanjun Guo > Cc: Loc Ho > Cc: Sudeep Holla > Cc: Catalin Marinas > Cc: Mark Rutland > Cc: Mark Salter > Cc: Al Stone I had tested this with X-Gene Mustang board. It applies cleanly against 4.5.0-rc1 and detected all CPU's. For those of you want to try this, you need an FW update if you are using APM Tianocore. Otherwise, it will stuck in very early booting stage. Thanks, Loc