From mboxrd@z Thu Jan  1 00:00:00 1970
From: Keir Fraser <keir.xen@gmail.com>
Subject: Re: [PATCH] xen: Add GS base to HVM VCPU context
Date: Mon, 23 Apr 2012 22:04:31 +0100
Message-ID: <CBBB826F.31605%keir.xen@gmail.com>
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To: Aravindh Puthiyaparambil <aravindh@virtuata.com>, Jan Beulich <JBeulich@suse.com>
Cc: xen-devel <xen-devel@lists.xen.org>
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On 23/04/2012 20:11, "Aravindh Puthiyaparambil" <aravindh@virtuata.com>
wrote:

>>>>> +#ifdef __x86_64__
>>>>> + =A0 =A0 =A0 =A0if ( ring_0(&c.nat->user_regs) )
>>>>> + =A0 =A0 =A0 =A0 =A0 =A0c.nat->gs_base_kernel =3D sreg.base;
>>>>> + =A0 =A0 =A0 =A0else
>>>>> + =A0 =A0 =A0 =A0 =A0 =A0c.nat->gs_base_user =3D sreg.base;
>>>>> +#endif
>>>> =

>>>> If you do anything like this, do it completely please (i.e. fill all t=
hree
>>>> base address fields instead of just one).
>>>> =

>>> =

>>> Sure. I was not sure if it was ok to add fields to the vcpu context
>>> structure which is why I didn't do it across the board. I will do so and
>>> resubmit.
>> =

>> I don't see what fields you would need to add.
> =

> Don't I need to add ss_base, cs_base, es_base, ds_base to
> vcpu_guest_context? I am assuming both 32-bit and 64-bit cases.

Only the existing (x86_64-only) fs_base, gs_base_kernel, gs_base_user fields
need be filled in. All other base addresses are zero in 64-bit mode, and in
32-bit mode the base addresses are obtained from the GDT/LDT when the
segment register is loaded, and so do not need to be stored in the
vcpu_context.

 -- Keir

> Aravindh
> =

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