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Miller" , Michal Simek , Robert Hancock , "netdev@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Mark Rutland , "devicetree@vger.kernel.org" Subject: RE: [PATCH 14/14] net: axienet: Update devicetree binding documentation Thread-Topic: [PATCH 14/14] net: axienet: Update devicetree binding documentation Thread-Index: AQHVx6zAwkWlmecTYkaoyYejTEfW+Kf1um2AgARdAICABDs/YA== Date: Mon, 27 Jan 2020 09:28:04 +0000 Message-ID: References: <20200110115415.75683-1-andre.przywara@arm.com> <20200110115415.75683-15-andre.przywara@arm.com> <20200121215109.GA26808@bogus> <20200124162903.722468f1@donnerap.cambridge.arm.com> In-Reply-To: <20200124162903.722468f1@donnerap.cambridge.arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=radheys@xilinx.com; x-originating-ip: [149.199.50.133] x-ms-publictraffictype: Email x-ms-office365-filtering-ht: Tenant x-ms-office365-filtering-correlation-id: a226d874-cd50-4198-1cd6-08d7a30b36bc x-ms-traffictypediagnostic: CH2PR02MB6888:|CH2PR02MB6888: x-ms-exchange-transport-forked: True x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:9508; x-forefront-prvs: 02951C14DC x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(4636009)(376002)(396003)(346002)(39860400002)(136003)(366004)(199004)(189003)(76116006)(66946007)(64756008)(66556008)(66476007)(110136005)(15650500001)(86362001)(54906003)(66446008)(33656002)(2906002)(316002)(55016002)(26005)(8676002)(81166006)(81156014)(52536014)(8936002)(6506007)(478600001)(71200400001)(7696005)(4326008)(5660300002)(9686003)(53546011)(186003);DIR:OUT;SFP:1101;SCL:1;SRVR:CH2PR02MB6888;H:CH2PR02MB7000.namprd02.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; received-spf: None (protection.outlook.com: xilinx.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam: BCL:0; x-microsoft-antispam-message-info: y1kW834Ppm4eZJsUuT7VeVn20lidthJk4XBDPJOSMOmgalKw/aZBTs1t0S66YrbC8WtzVhyQLSR02hGytcSPOKYmpHYw2vZZdppE90hQAGIHAXtH1imnkMJC6HC+XmtU1/bChtaTpI5TfrST4NhEgYdyK2LzqLOunOPzFa3/85nO6QNCjMwhmcIJG4YCK24cq8ds1BZSJpAz4i/Aw+xwMw7LcHQeN5iXiNHso25QDRRoWd7vMnwpsjPusb9F8jJBxjZTsJJ0Zpb3ejf4fgOZnPzrB5gdsjAHaksbcQ4f0kPkqmLexv6+EbOttnoR+NnUqdKPQJFxGpV0gqUC4XZ8a58jX/xn3a2IpNQd/2CvL26OP05buXuXTz0ujO2GuFd95mnVYymOCjGOxNGv+1ZEA0ES3L7QxJOZVeIzxiJEVMWsYWxOHjRggjZI/VLnnITR x-ms-exchange-antispam-messagedata: 6uufy3oIJ3fZFUzZrKeoSkd7ksdwb1EE1MeSZUN7qK7lQZm3ksZ7k697GcNS7STW6jq6BJQfQYd0Y0FVinVbtGQdXc21KKTbTv4vdh2ZFdbbtbIru9hWhepGwfNzJat0zknaY2nKO4W3l0KAhWM8gw== Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: xilinx.com X-MS-Exchange-CrossTenant-Network-Message-Id: a226d874-cd50-4198-1cd6-08d7a30b36bc X-MS-Exchange-CrossTenant-originalarrivaltime: 27 Jan 2020 09:28:05.2458 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 657af505-d5df-48d0-8300-c31994686c5c X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: WNM+ilKHCJnhXHHqcco1vaReX9yj0ddrY0eQtHLhh0Jj2vrj6IjxhWDywNe+nNdK0IbNwaFP+/otVYIr/QPZFQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR02MB6888 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Andre Przywara > Sent: Friday, January 24, 2020 9:59 PM > To: Rob Herring > Cc: David S . Miller ; Radhey Shyam Pandey > ; Michal Simek ; Robert Hancock > ; netdev@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Mark Rutland > ; devicetree@vger.kernel.org > Subject: Re: [PATCH 14/14] net: axienet: Update devicetree binding > documentation >=20 > On Tue, 21 Jan 2020 15:51:09 -0600 > Rob Herring wrote: >=20 > Hi Rob, >=20 > thanks for having a look! >=20 > > On Fri, Jan 10, 2020 at 11:54:15AM +0000, Andre Przywara wrote: > > > This adds documentation about the newly introduced, optional > > > "xlnx,addrwidth" property to the binding documentation. > > > > > > While at it, clarify the wording on some properties, replace obsolete > > > .txt file references with their new .yaml counterparts, and add a mor= e > > > modern example, using the axistream-connected property. > > > > > > Cc: Rob Herring > > > Cc: Mark Rutland > > > Cc: devicetree@vger.kernel.org > > > Signed-off-by: Andre Przywara > > > --- > > > .../bindings/net/xilinx_axienet.txt | 57 ++++++++++++++++-= -- > > > 1 file changed, 50 insertions(+), 7 deletions(-) > > > > > > diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt > b/Documentation/devicetree/bindings/net/xilinx_axienet.txt > > > index 7360617cdedb..78c278c5200f 100644 > > > --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt > > > +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt > > > @@ -12,7 +12,8 @@ sent and received through means of an AXI DMA > controller. This driver > > > includes the DMA driver code, so this driver is incompatible with AX= I DMA > > > driver. > > > > > > -For more details about mdio please refer phy.txt file in the same di= rectory. > > > +For more details about mdio please refer to the ethernet-phy.yaml fi= le in > > > +the same directory. > > > > > > Required properties: > > > - compatible : Must be one of "xlnx,axi-ethernet-1.00.a", > > > @@ -27,14 +28,14 @@ Required properties: > > > instead, and only the Ethernet core interrupt is optionally > > > specified here. > > > - phy-handle : Should point to the external phy device. > > > - See ethernet.txt file in the same directory. > > > -- xlnx,rxmem : Set to allocated memory buffer for Rx/Tx in the > hardware > > > + See the ethernet-controller.yaml file in the same directory. > > > +- xlnx,rxmem : Size of the RXMEM buffer in the hardware, in bytes. > > > > > > Optional properties: > > > -- phy-mode : See ethernet.txt > > > +- phy-mode : See ethernet-controller.yaml. > > > - xlnx,phy-type : Deprecated, do not use, but still accepted in > preference > > > to phy-mode. > > > -- xlnx,txcsum : 0 or empty for disabling TX checksum offload, > > > +- xlnx,txcsum : 0 for disabling TX checksum offload (default if > omitted), > > > 1 to enable partial TX checksum offload, > > > 2 to enable full TX checksum offload > > > - xlnx,rxcsum : Same values as xlnx,txcsum but for RX checksum > offload > > > @@ -48,10 +49,20 @@ Optional properties: > > > If this is specified, the DMA-related resources from that > > > device (DMA registers and DMA TX/RX interrupts) rather > > > than this one will be used. > > > - - mdio : Child node for MDIO bus. Must be defined if PHY > access is > > > +- mdio : Child node for MDIO bus. Must be defined if PHY > access is > > > required through the core's MDIO interface (i.e. always, > > > unless the PHY is accessed through a different bus). > > > > > > +Required properties for axistream-connected subnode: > > > +- reg : Address and length of the AXI DMA controller MMIO > space. > > > +- interrupts : A list of 2 interrupts: TX DMA and RX DMA, in that or= der. > > > + > > > +Optional properties for axistream-connected subnode: > > > +- xlnx,addrwidth: Specifies the configured address width of the DMA.= Newer > > > + versions of the IP allow setting this to a value between > > > + 32 and 64. Defaults to 32 bits if not specified. > > > > I think this should be expressed using dma-ranges. This is exactly the > > purpose of dma-ranges and we shouldn't need a device specific property > > for this sort of thing. dma-ranges define the relationship between the physical address spaces of t= he parent and child nodes. In this case, ethernet and dma (parent-child) have the same view of physical address space. Do we mean to use the child-size dma-range field and determine the address width? >=20 > OK, after talking to Robin about it, I think I will indeed drop the whole= usage of > xlnx,addrwidth altogether. > Some thoughts: > - An integrator would choose the addrwidth value in the IP to be big enou= gh for > the whole bus. In our case it's actually 40 bits, because this is the max= address > size the interconnect supports. So any possible physical address the kern= el could > come up with would be valid for the DMA IP. > - Because of this we set the DMA mask to either 64-bit or 32-bit, dependi= ng on > the auto detection of the MSB registers. > - If some integrator screws this up anyway, they can always set dma-range= s in > the parent to limit the address range. IIUC, no further code would be nee= ded in > the Ethernet driver, as this would be handled by some (DMA?) framework? I think the current driver design will be simplified once we switch to the dmaengine framework and use the xilinx dma(drivers/dma/xilinx_dma.c) driver= . The address width parsing is already handled by the dma driver. I am workin= g on an RFC to remove dma code from axiethernet and planning to post patchset= . Hopefully, that should address all concerns. >=20 > Does that make sense? >=20 > Cheers, > Andre From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,URIBL_DBL_ABUSE_MALW autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 296B5C32771 for ; Mon, 27 Jan 2020 09:28:18 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E7CD52071E for ; Mon, 27 Jan 2020 09:28:17 +0000 (UTC) Authentication-Results: mail.kernel.org; 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Miller" , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org > -----Original Message----- > From: Andre Przywara > Sent: Friday, January 24, 2020 9:59 PM > To: Rob Herring > Cc: David S . Miller ; Radhey Shyam Pandey > ; Michal Simek ; Robert Hancock > ; netdev@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; Mark Rutland > ; devicetree@vger.kernel.org > Subject: Re: [PATCH 14/14] net: axienet: Update devicetree binding > documentation > > On Tue, 21 Jan 2020 15:51:09 -0600 > Rob Herring wrote: > > Hi Rob, > > thanks for having a look! > > > On Fri, Jan 10, 2020 at 11:54:15AM +0000, Andre Przywara wrote: > > > This adds documentation about the newly introduced, optional > > > "xlnx,addrwidth" property to the binding documentation. > > > > > > While at it, clarify the wording on some properties, replace obsolete > > > .txt file references with their new .yaml counterparts, and add a more > > > modern example, using the axistream-connected property. > > > > > > Cc: Rob Herring > > > Cc: Mark Rutland > > > Cc: devicetree@vger.kernel.org > > > Signed-off-by: Andre Przywara > > > --- > > > .../bindings/net/xilinx_axienet.txt | 57 ++++++++++++++++--- > > > 1 file changed, 50 insertions(+), 7 deletions(-) > > > > > > diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt > b/Documentation/devicetree/bindings/net/xilinx_axienet.txt > > > index 7360617cdedb..78c278c5200f 100644 > > > --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt > > > +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt > > > @@ -12,7 +12,8 @@ sent and received through means of an AXI DMA > controller. This driver > > > includes the DMA driver code, so this driver is incompatible with AXI DMA > > > driver. > > > > > > -For more details about mdio please refer phy.txt file in the same directory. > > > +For more details about mdio please refer to the ethernet-phy.yaml file in > > > +the same directory. > > > > > > Required properties: > > > - compatible : Must be one of "xlnx,axi-ethernet-1.00.a", > > > @@ -27,14 +28,14 @@ Required properties: > > > instead, and only the Ethernet core interrupt is optionally > > > specified here. > > > - phy-handle : Should point to the external phy device. > > > - See ethernet.txt file in the same directory. > > > -- xlnx,rxmem : Set to allocated memory buffer for Rx/Tx in the > hardware > > > + See the ethernet-controller.yaml file in the same directory. > > > +- xlnx,rxmem : Size of the RXMEM buffer in the hardware, in bytes. > > > > > > Optional properties: > > > -- phy-mode : See ethernet.txt > > > +- phy-mode : See ethernet-controller.yaml. > > > - xlnx,phy-type : Deprecated, do not use, but still accepted in > preference > > > to phy-mode. > > > -- xlnx,txcsum : 0 or empty for disabling TX checksum offload, > > > +- xlnx,txcsum : 0 for disabling TX checksum offload (default if > omitted), > > > 1 to enable partial TX checksum offload, > > > 2 to enable full TX checksum offload > > > - xlnx,rxcsum : Same values as xlnx,txcsum but for RX checksum > offload > > > @@ -48,10 +49,20 @@ Optional properties: > > > If this is specified, the DMA-related resources from that > > > device (DMA registers and DMA TX/RX interrupts) rather > > > than this one will be used. > > > - - mdio : Child node for MDIO bus. Must be defined if PHY > access is > > > +- mdio : Child node for MDIO bus. Must be defined if PHY > access is > > > required through the core's MDIO interface (i.e. always, > > > unless the PHY is accessed through a different bus). > > > > > > +Required properties for axistream-connected subnode: > > > +- reg : Address and length of the AXI DMA controller MMIO > space. > > > +- interrupts : A list of 2 interrupts: TX DMA and RX DMA, in that order. > > > + > > > +Optional properties for axistream-connected subnode: > > > +- xlnx,addrwidth: Specifies the configured address width of the DMA. Newer > > > + versions of the IP allow setting this to a value between > > > + 32 and 64. Defaults to 32 bits if not specified. > > > > I think this should be expressed using dma-ranges. This is exactly the > > purpose of dma-ranges and we shouldn't need a device specific property > > for this sort of thing. dma-ranges define the relationship between the physical address spaces of the parent and child nodes. In this case, ethernet and dma (parent-child) have the same view of physical address space. Do we mean to use the child-size dma-range field and determine the address width? > > OK, after talking to Robin about it, I think I will indeed drop the whole usage of > xlnx,addrwidth altogether. > Some thoughts: > - An integrator would choose the addrwidth value in the IP to be big enough for > the whole bus. In our case it's actually 40 bits, because this is the max address > size the interconnect supports. So any possible physical address the kernel could > come up with would be valid for the DMA IP. > - Because of this we set the DMA mask to either 64-bit or 32-bit, depending on > the auto detection of the MSB registers. > - If some integrator screws this up anyway, they can always set dma-ranges in > the parent to limit the address range. IIUC, no further code would be needed in > the Ethernet driver, as this would be handled by some (DMA?) framework? I think the current driver design will be simplified once we switch to the dmaengine framework and use the xilinx dma(drivers/dma/xilinx_dma.c) driver. The address width parsing is already handled by the dma driver. I am working on an RFC to remove dma code from axiethernet and planning to post patchset. Hopefully, that should address all concerns. > > Does that make sense? > > Cheers, > Andre _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel