From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35395) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZVtvo-0003Ay-Pk for qemu-devel@nongnu.org; Sun, 30 Aug 2015 00:09:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZVtvl-0004az-Fq for qemu-devel@nongnu.org; Sun, 30 Aug 2015 00:09:24 -0400 Received: from col004-omc2s15.hotmail.com ([65.55.34.89]:59468) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZVtvl-0004ao-7K for qemu-devel@nongnu.org; Sun, 30 Aug 2015 00:09:21 -0400 Message-ID: From: Chen Gang Date: Sun, 30 Aug 2015 12:09:20 +0800 In-Reply-To: <55E2822E.4000805@hotmail.com> References: <1440433079-14458-1-git-send-email-rth@twiddle.net>, <55DB96D7.9000105@hotmail.com> , <55E1B1AF.3040407@hotmail.com> , <55E2822E.4000805@hotmail.com> Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [Qemu-devel] [PATCH v14 00/33] TileGX basic instructions List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "rth@twiddle.net" , qemu-devel Cc: "walt@tilera.com" , Chris Metcalf , Peter Maydell =0A= After download and merge the all related patches to my local qemu=2C for=0A= me:=0A= =0A= =A0- The refactor code is really very good to me! :-)=0A= =0A= =A0- It cause "hello world" test program "segment fault".=0A= =0A= Do we need fix all related issues before merge the code?=0A= =0A= =A0- If I need fix them after finish merging the refactor code into qemu=0A= =A0 =A0master=2C please let me know=2C I shall try=2C next.=0A= =0A= =A0- If it is necessary to provide related test programs=2C please let me= =0A= =A0 =A0know=2C I shall provide them to.=0A= =0A= Thanks.=0A= =0A= On 8/29/15 21:19=2C Chen Gang wrote:=0A= >=0A= > Is tilegx patches OK to qemu mater tree?=0A= >=0A= > Or shall I do anything for it? If I should do something for it=2C please= =0A= > let me know=2C I shall try.=0A= >=0A= > I almost finished analyzing one gcc bug (found root cause=2C got correct= =0A= > result with my patch)=2C it was waiting review. If I needn't do anything= =0A= > for tilegx merging=2C I shall continue to analyze tilegx gcc testsuite.= =0A= >=0A= > Thanks.=0A= >=0A= > On 8/25/15 06:12=2C Chen Gang wrote:=0A= >>=0A= >> On 8/25/15 00:17=2C Richard Henderson wrote:=0A= >>> I've flushed out the v13 I posted last Thursday to handle all the=0A= >>> instructions required to execute Hello World. In the process I=0A= >>> found a number of bugs and design flaws in v13=2C and reshaped the=0A= >>> translation a bit to better handle insns with no register outputs.=0A= >>>=0A= >>=0A= >> OK=2C thank you for your work (originally=2C I really did not kown that = it=0A= >> would generate so many patches -- almost 3 times that I supposed).=0A= >>=0A= >>=0A= >>> Please review.=0A= >>>=0A= >>> After this=2C I would hope that Chen Gang will follow up to implement= =0A= >>> the rest of the instructions that he has identified running the=0A= >>> gcc testsuite=2C and then start in on the floating point.=0A= >>>=0A= >>=0A= >> OK=2C thanks=2C I shall continue based on it=2C after it is integrated i= nto=0A= >> qemu master (after Reviewed-by another members).=0A= >>=0A= >> During the next 2-4 days I shall try to fix one gcc bugzilla issue=2C th= en=0A= >> turn back to qemu=2C hope I can succeed. (during these passed days=2C I = sent=0A= >> 3 paches to kernel=2C and 2 of them are applied=2C one is waiting review= ).=0A= >>=0A= >>=0A= >> Thanks.=0A= >>=0A= >>>=0A= >>> r~=0A= >>>=0A= >>>=0A= >>> Chen Gang (9):=0A= >>> linux-user: tilegx: Firstly add architecture related features=0A= >>> linux-user: Support tilegx architecture in linux-user=0A= >>> linux-user: Conditionalize syscalls which are not defined in tilegx=0A= >>> target-tilegx: Add opcode basic implementation from Tilera Corporation= =0A= >>> target-tilegx: Modify opcode_tilegx.h to fit QEMU usage=0A= >>> target-tilegx: Add special register information from Tilera=0A= >>> Corporation=0A= >>> target-tilegx: Add cpu basic features for linux-user=0A= >>> target-tilegx: Add several helpers for instructions translation=0A= >>> target-tilegx: Add TILE-Gx building files=0A= >>>=0A= >>> Richard Henderson (24):=0A= >>> target-tilegx: Modify _SPECIAL_ opcodes=0A= >>> target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1=0A= >>> target-tilegx: Framework for decoding bundles=0A= >>> target-tilegx: Generate SEGV properly=0A= >>> target-tilegx: Handle simple logical operations=0A= >>> target-tilegx: Handle arithmetic instructions=0A= >>> target-tilegx: Handle most bit manipulation instructions=0A= >>> target-tilegx: Handle basic load and store instructions=0A= >>> target-tilegx: Handle post-increment load and store instructions=0A= >>> target-tilegx: Handle unconditional jump instructions=0A= >>> target-tilegx: Handle conditional branch instructions=0A= >>> target-tilegx: Handle comparison instructions=0A= >>> target-tilegx: Implement system and memory management instructions=0A= >>> target-tilegx: Handle bitfield instructions=0A= >>> target-tilegx: Handle shift instructions=0A= >>> target-tilegx: Handle conditional move instructions=0A= >>> target-tilegx: Handle scalar multiply instructions=0A= >>> target-tilegx: Handle mask instructions=0A= >>> target-tilegx: Handle v1cmpeq=2C v1cmpne=0A= >>> target-tilegx: Handle mtspr=2C mfspr=0A= >>> target-tilegx: Handle atomic instructions=0A= >>> target-tilegx: Handle v4int_l/h=0A= >>> target-tilegx: Handle v1shli=2C v1shrui=0A= >>> target-tilegx: Handle v1shl=2C v1shru=2C v1shrs=0A= >>>=0A= >>> configure | 2 +=0A= >>> default-configs/tilegx-linux-user.mak | 1 +=0A= >>> include/elf.h | 2 +=0A= >>> linux-user/elfload.c | 23 +=0A= >>> linux-user/main.c | 298 +++++=0A= >>> linux-user/syscall.c | 50 +-=0A= >>> linux-user/syscall_defs.h | 14 +-=0A= >>> linux-user/tilegx/syscall.h | 40 +=0A= >>> linux-user/tilegx/syscall_nr.h | 324 +++++=0A= >>> linux-user/tilegx/target_cpu.h | 35 +=0A= >>> linux-user/tilegx/target_signal.h | 28 +=0A= >>> linux-user/tilegx/target_structs.h | 46 +=0A= >>> linux-user/tilegx/termbits.h | 274 +++++=0A= >>> target-tilegx/Makefile.objs | 1 +=0A= >>> target-tilegx/cpu.c | 173 +++=0A= >>> target-tilegx/cpu.h | 177 +++=0A= >>> target-tilegx/helper.c | 93 ++=0A= >>> target-tilegx/helper.h | 10 +=0A= >>> target-tilegx/opcode_tilegx.h | 1406 ++++++++++++++++++++++=0A= >>> target-tilegx/simd_helper.c | 63 +=0A= >>> target-tilegx/spr_def_64.h | 216 ++++=0A= >>> target-tilegx/translate.c | 2135 +++++++++++++++++++++++++++++++++=0A= >>> 22 files changed=2C 5405 insertions(+)=2C 6 deletions(-)=0A= >>> create mode 100644 default-configs/tilegx-linux-user.mak=0A= >>> create mode 100644 linux-user/tilegx/syscall.h=0A= >>> create mode 100644 linux-user/tilegx/syscall_nr.h=0A= >>> create mode 100644 linux-user/tilegx/target_cpu.h=0A= >>> create mode 100644 linux-user/tilegx/target_signal.h=0A= >>> create mode 100644 linux-user/tilegx/target_structs.h=0A= >>> create mode 100644 linux-user/tilegx/termbits.h=0A= >>> create mode 100644 target-tilegx/Makefile.objs=0A= >>> create mode 100644 target-tilegx/cpu.c=0A= >>> create mode 100644 target-tilegx/cpu.h=0A= >>> create mode 100644 target-tilegx/helper.c=0A= >>> create mode 100644 target-tilegx/helper.h=0A= >>> create mode 100644 target-tilegx/opcode_tilegx.h=0A= >>> create mode 100644 target-tilegx/simd_helper.c=0A= >>> create mode 100644 target-tilegx/spr_def_64.h=0A= >>> create mode 100644 target-tilegx/translate.c=0A= >>>=0A= >>=0A= >> --=0A= >> Chen Gang=0A= >>=0A= >> Open=2C share=2C and attitude like air=2C water=2C and life which God bl= essed=0A= >>=0A= >>=0A= >=0A= > --=0A= > Chen Gang=0A= >=0A= > Open=2C share=2C and attitude like air=2C water=2C and life which God ble= ssed=0A= >=0A= >=0A= =0A= --=0A= Chen Gang=0A= =0A= Open=2C share=2C and attitude like air=2C water=2C and life which God bless= ed=0A= =