From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Google-Smtp-Source: AG47ELt0fAtT/1fvQHnLj53oNfB79WyYw7GwzBr0pEFsddHcegemNcKS3V+aA+FDdhIdJw+R/M7l ARC-Seal: i=1; a=rsa-sha256; t=1520460238; cv=none; d=google.com; s=arc-20160816; b=FLRe0fAhTE/WHCAZZ4t3UmgfkCUCxLYQapg79ArS7+fAs6+4VWRxJXIvmX0b5vBrTV jy0CB65QsbfRB/ROezwo7Uy3dVxzdBmukBYLiKTiav8wxTC3V1a4uMAT+A2jtsIVquok tzc3q8cgYWPMv3DaIkQkM86seGl2lW4POo7yIFk90R/uAzFKu2l67ZCB2e15fslGnQqv OtFlxIX1gZ/5K/I6OaD60egwMJOx3r9OjEWGq0YlLl2hWtJBPOi7VA1+w+wXJIxfpIjV dZMlJDfPfieLpBRmxOWbUefpfwIeaGhkyY4jvrHg9kY8lPQO1iobMI2wbTdmrGfmfmbY vl1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:content-transfer-encoding:spamdiagnosticmetadata :spamdiagnosticoutput:content-language:accept-language:in-reply-to :references:message-id:date:thread-index:thread-topic:subject:cc:to :from:dkim-signature:arc-authentication-results; bh=wgFv+v0m3yFAereNxwX5EZLdr6G+gEW4EznGGlv/lm0=; b=sa6Flz9ju1/VUo7B/zO9ddUrb3t6j46uQeeH9UJWorjGfdbxIDsiy4xqQ5A6h68fWf XrOHReyvexuVetCjSSHJX1e6z0GDeQne5ebvJUT0Z5h5fn9rzAyuB46L0UwF6zjKRvmP RDV1QIIAkclryDLHT3oc3rf2sgbk9yyBa0Whd1zDPIRxgocttFzp8MLI3jXnXuCUfI60 R3qJITFbZbK0eBbBIh4eAE1tGo9KQXhL+mDWWvRA8DOZ8B/lcgc0jHh56krELggK0tr0 oGm8x8DZ+GoMC2eb7Tn6WtpwGgh088GCYLoy1a0NmG4TH9YxY2EYyHXW+oaLuL8704yc XbEw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@xilinx.onmicrosoft.com header.s=selector1-xilinx-com header.b=uiZiPDoX; spf=pass (google.com: domain of jollys@xilinx.com designates 104.47.37.73 as permitted sender) smtp.mailfrom=JOLLYS@xilinx.com Authentication-Results: mx.google.com; dkim=pass header.i=@xilinx.onmicrosoft.com header.s=selector1-xilinx-com header.b=uiZiPDoX; spf=pass (google.com: domain of jollys@xilinx.com designates 104.47.37.73 as permitted sender) smtp.mailfrom=JOLLYS@xilinx.com From: Jolly Shah To: Sudeep Holla CC: "ard.biesheuvel@linaro.org" , "mingo@kernel.org" , "gregkh@linuxfoundation.org" , "matt@codeblueprint.co.uk" , "hkallweit1@gmail.com" , "keescook@chromium.org" , "dmitry.torokhov@gmail.com" , "michal.simek@xilinx.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , Rajan Vaja , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" Subject: RE: [PATCH v5 3/4] drivers: firmware: xilinx: Add sysfs interface Thread-Topic: [PATCH v5 3/4] drivers: firmware: xilinx: Add sysfs interface Thread-Index: AQHTqoAjKTcTPssCQUKUhEOwggajX6O7goWAgAnhnqA= Date: Wed, 7 Mar 2018 22:03:54 +0000 Message-ID: References: <1519154467-2896-1-git-send-email-jollys@xilinx.com> <1519154467-2896-4-git-send-email-jollys@xilinx.com> <573acd04-85c4-829d-a0d6-36b3958ac1ec@arm.com> In-Reply-To: <573acd04-85c4-829d-a0d6-36b3958ac1ec@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) 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<573acd04-85c4-829d-a0d6-36b3958ac1ec@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <573acd04-85c4-829d-a0d6-36b3958ac1ec@arm.com> Content-Language: en-US List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Sudeep Holla Cc: "mark.rutland@arm.com" , "devicetree@vger.kernel.org" , "keescook@chromium.org" , "ard.biesheuvel@linaro.org" , "matt@codeblueprint.co.uk" , "gregkh@linuxfoundation.org" , "dmitry.torokhov@gmail.com" , "michal.simek@xilinx.com" , "linux-kernel@vger.kernel.org" , Rajan Vaja , "robh+dt@kernel.org" , "mingo@kernel.org" , "linux-arm-kernel@lists.infradead.org" , "hkallweit1@gmail.com" List-Id: devicetree@vger.kernel.org Hi Sudeep, > -----Original Message----- > From: Sudeep Holla [mailto:sudeep.holla@arm.com] > Sent: Thursday, March 01, 2018 6:44 AM > To: Jolly Shah > Cc: ard.biesheuvel@linaro.org; mingo@kernel.org; > gregkh@linuxfoundation.org; matt@codeblueprint.co.uk; > hkallweit1@gmail.com; keescook@chromium.org; > dmitry.torokhov@gmail.com; michal.simek@xilinx.com; robh+dt@kernel.org; > mark.rutland@arm.com; Sudeep Holla ; Rajan Vaja > ; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; devicetree@vger.kernel.org; Jolly Shah > > Subject: Re: [PATCH v5 3/4] drivers: firmware: xilinx: Add sysfs interface > > > > On 20/02/18 19:21, Jolly Shah wrote: > > Add Firmware-ggs sysfs interface which provides read/write interface > > to global storage registers. > > > > Signed-off-by: Jolly Shah > > Signed-off-by: Rajan Vaja > > --- > > .../ABI/stable/sysfs-driver-zynqmp-firmware | 50 ++++ > > drivers/firmware/xilinx/zynqmp/Makefile | 2 +- > > drivers/firmware/xilinx/zynqmp/firmware-ggs.c | 297 > +++++++++++++++++++++ > > drivers/firmware/xilinx/zynqmp/firmware.c | 13 + > > include/linux/firmware/xilinx/zynqmp/firmware.h | 2 + > > 5 files changed, 363 insertions(+), 1 deletion(-) create mode 100644 > > Documentation/ABI/stable/sysfs-driver-zynqmp-firmware > > create mode 100644 drivers/firmware/xilinx/zynqmp/firmware-ggs.c > > > > diff --git a/Documentation/ABI/stable/sysfs-driver-zynqmp-firmware > > b/Documentation/ABI/stable/sysfs-driver-zynqmp-firmware > > new file mode 100644 > > index 0000000..b04727a > > --- /dev/null > > +++ b/Documentation/ABI/stable/sysfs-driver-zynqmp-firmware > > @@ -0,0 +1,50 @@ > > +What: /sys/devices/platform/zynqmp-firmware/ggs> +Date: > January 2018 > > +KernelVersion: 4.15.0 > > +Contact: "Jolly Shah" > > +Description: > > + Read/Write PMU global general storage register value, > > + GLOBAL_GEN_STORAGE{0:3}. > > + Global general storage register that can be used > > + by system to pass information between masters. > > + > > What kind of information ? Is there any semantics for that ? > Why does EEMI lack APIs for that if it's critical, giving access to such information > to userspace may not be good idea. > These are for general use. Information being passed can be application specific. Sysfs call underneath maps to EEMI ioctl call to read/write these registers. > > + The register is reset during system or power-on > > + resets. Three registers are used by the FSBL and > > + other Xilinx software products: GLOBAL_GEN_STORAGE{4:6}. > > + > > FSBL ? > > For what is it used ? There are total 8 such registers. 4 are reserved for customer application. Other 4 are being used by Xilinx sw products like FSBL. FSBL is using it to pass handoff information to other master. > > > + Usage: > > + # cat /sys/.../zynqmp-firmware/ggs0 > > + # echo > /sys/.../zynqmp-firmware/ggs0 > > + > > + Example: > > + # cat /sys/.../zynqmp-firmware/ggs0 > > + # echo 0xFFFFFFFF 0x1234ABCD > /sys/.../zynqmp- > firmware/ggs0 > > + > > +Users: Xilinx > > + > > +What: /sys/devices/platform/zynqmp-firmware/pggs* > > +Date: January 2018 > > +KernelVersion: 4.15.0 > > +Contact: "Jolly Shah" > > +Description: > > + Read/Write PMU persistent global general storage register > > + value, PERS_GLOB_GEN_STORAGE{0:3}. > > + Persistent global general storage register that > > + can be used by system to pass information between > > + masters. > > + > > Ditto > > > + This register is only reset by the power-on reset > > + and maintains its value through a system reset. > > + Four registers are used by the FSBL and other Xilinx > > + software products: PERS_GLOB_GEN_STORAGE{4:7}. > > + Register is reset only by a POR reset. > > + > > Ditto > > -- > Regards, > Sudeep From mboxrd@z Thu Jan 1 00:00:00 1970 From: JOLLYS@xilinx.com (Jolly Shah) Date: Wed, 7 Mar 2018 22:03:54 +0000 Subject: [PATCH v5 3/4] drivers: firmware: xilinx: Add sysfs interface In-Reply-To: <573acd04-85c4-829d-a0d6-36b3958ac1ec@arm.com> References: <1519154467-2896-1-git-send-email-jollys@xilinx.com> <1519154467-2896-4-git-send-email-jollys@xilinx.com> <573acd04-85c4-829d-a0d6-36b3958ac1ec@arm.com> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Sudeep, > -----Original Message----- > From: Sudeep Holla [mailto:sudeep.holla at arm.com] > Sent: Thursday, March 01, 2018 6:44 AM > To: Jolly Shah > Cc: ard.biesheuvel at linaro.org; mingo at kernel.org; > gregkh at linuxfoundation.org; matt at codeblueprint.co.uk; > hkallweit1 at gmail.com; keescook at chromium.org; > dmitry.torokhov at gmail.com; michal.simek at xilinx.com; robh+dt at kernel.org; > mark.rutland at arm.com; Sudeep Holla ; Rajan Vaja > ; linux-arm-kernel at lists.infradead.org; linux- > kernel at vger.kernel.org; devicetree at vger.kernel.org; Jolly Shah > > Subject: Re: [PATCH v5 3/4] drivers: firmware: xilinx: Add sysfs interface > > > > On 20/02/18 19:21, Jolly Shah wrote: > > Add Firmware-ggs sysfs interface which provides read/write interface > > to global storage registers. > > > > Signed-off-by: Jolly Shah > > Signed-off-by: Rajan Vaja > > --- > > .../ABI/stable/sysfs-driver-zynqmp-firmware | 50 ++++ > > drivers/firmware/xilinx/zynqmp/Makefile | 2 +- > > drivers/firmware/xilinx/zynqmp/firmware-ggs.c | 297 > +++++++++++++++++++++ > > drivers/firmware/xilinx/zynqmp/firmware.c | 13 + > > include/linux/firmware/xilinx/zynqmp/firmware.h | 2 + > > 5 files changed, 363 insertions(+), 1 deletion(-) create mode 100644 > > Documentation/ABI/stable/sysfs-driver-zynqmp-firmware > > create mode 100644 drivers/firmware/xilinx/zynqmp/firmware-ggs.c > > > > diff --git a/Documentation/ABI/stable/sysfs-driver-zynqmp-firmware > > b/Documentation/ABI/stable/sysfs-driver-zynqmp-firmware > > new file mode 100644 > > index 0000000..b04727a > > --- /dev/null > > +++ b/Documentation/ABI/stable/sysfs-driver-zynqmp-firmware > > @@ -0,0 +1,50 @@ > > +What: /sys/devices/platform/zynqmp-firmware/ggs> +Date: > January 2018 > > +KernelVersion: 4.15.0 > > +Contact: "Jolly Shah" > > +Description: > > + Read/Write PMU global general storage register value, > > + GLOBAL_GEN_STORAGE{0:3}. > > + Global general storage register that can be used > > + by system to pass information between masters. > > + > > What kind of information ? Is there any semantics for that ? > Why does EEMI lack APIs for that if it's critical, giving access to such information > to userspace may not be good idea. > These are for general use. Information being passed can be application specific. Sysfs call underneath maps to EEMI ioctl call to read/write these registers. > > + The register is reset during system or power-on > > + resets. Three registers are used by the FSBL and > > + other Xilinx software products: GLOBAL_GEN_STORAGE{4:6}. > > + > > FSBL ? > > For what is it used ? There are total 8 such registers. 4 are reserved for customer application. Other 4 are being used by Xilinx sw products like FSBL. FSBL is using it to pass handoff information to other master. > > > + Usage: > > + # cat /sys/.../zynqmp-firmware/ggs0 > > + # echo > /sys/.../zynqmp-firmware/ggs0 > > + > > + Example: > > + # cat /sys/.../zynqmp-firmware/ggs0 > > + # echo 0xFFFFFFFF 0x1234ABCD > /sys/.../zynqmp- > firmware/ggs0 > > + > > +Users: Xilinx > > + > > +What: /sys/devices/platform/zynqmp-firmware/pggs* > > +Date: January 2018 > > +KernelVersion: 4.15.0 > > +Contact: "Jolly Shah" > > +Description: > > + Read/Write PMU persistent global general storage register > > + value, PERS_GLOB_GEN_STORAGE{0:3}. > > + Persistent global general storage register that > > + can be used by system to pass information between > > + masters. > > + > > Ditto > > > + This register is only reset by the power-on reset > > + and maintains its value through a system reset. > > + Four registers are used by the FSBL and other Xilinx > > + software products: PERS_GLOB_GEN_STORAGE{4:7}. > > + Register is reset only by a POR reset. > > + > > Ditto > > -- > Regards, > Sudeep