From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Zhu, Rex" Subject: Re: [PATCH] drm/amdgpu: Fix module unload hang by KIQ on Vega10 Date: Tue, 18 Apr 2017 14:21:07 +0000 Message-ID: References: <1492481623-23177-1-git-send-email-trigger.huang@amd.com>, Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============1511386375==" Return-path: In-Reply-To: Content-Language: en-US List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: "Deucher, Alexander" , "Huang, Trigger" , "amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org" --===============1511386375== Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_CY4PR12MB16873E1CB343FE73B464899DFB190CY4PR12MB1687namp_" --_000_CY4PR12MB16873E1CB343FE73B464899DFB190CY4PR12MB1687namp_ Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable I think no need to check function type. Best Regards Rex ________________________________ From: amd-gfx on behalf of Deucher,= Alexander Sent: Tuesday, April 18, 2017 9:33:58 PM To: Huang, Trigger; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: Huang, Trigger Subject: RE: [PATCH] drm/amdgpu: Fix module unload hang by KIQ on Vega10 > -----Original Message----- > From: amd-gfx [mailto:amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org] On Behalf > Of Trigger Huang > Sent: Monday, April 17, 2017 10:14 PM > To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org > Cc: Huang, Trigger > Subject: [PATCH] drm/amdgpu: Fix module unload hang by KIQ on Vega10 > > Apply commit 4e683cb2644f ("drm/amdgpu: Fix module unload hang by > KIQ IRQ set")to vega10 > > Signed-off-by: Trigger Huang Reviewed-by: Alex Deucher > --- > drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 ++++------ > 1 file changed, 4 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > index f6b2329..b7b2ed8 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c > @@ -631,7 +631,6 @@ static int gfx_v9_0_kiq_init_ring(struct > amdgpu_device *adev, > ring->pipe =3D 1; > } > > - irq->data =3D ring; > ring->queue =3D 0; > ring->eop_gpu_addr =3D kiq->eop_gpu_addr; > sprintf(ring->name, "kiq %d.%d.%d", ring->me, ring->pipe, ring- > >queue); > @@ -647,7 +646,6 @@ static void gfx_v9_0_kiq_free_ring(struct > amdgpu_ring *ring, > { > amdgpu_wb_free(ring->adev, ring->adev->virt.reg_val_offs); > amdgpu_ring_fini(ring); > - irq->data =3D NULL; > } > > /* create MQD for each compute queue */ > @@ -3367,9 +3365,9 @@ static int gfx_v9_0_kiq_set_interrupt_state(struct > amdgpu_device *adev, > enum amdgpu_interrupt_state > state) > { > uint32_t tmp, target; > - struct amdgpu_ring *ring =3D (struct amdgpu_ring *)src->data; > + struct amdgpu_ring *ring =3D &(adev->gfx.kiq.ring); > > - BUG_ON(!ring || (ring->funcs->type !=3D > AMDGPU_RING_TYPE_KIQ)); > + BUG_ON(ring->funcs->type !=3D AMDGPU_RING_TYPE_KIQ); > > if (ring->me =3D=3D 1) > target =3D SOC15_REG_OFFSET(GC, 0, > mmCP_ME1_PIPE0_INT_CNTL); > @@ -3413,9 +3411,9 @@ static int gfx_v9_0_kiq_irq(struct amdgpu_device > *adev, > struct amdgpu_iv_entry *entry) > { > u8 me_id, pipe_id, queue_id; > - struct amdgpu_ring *ring =3D (struct amdgpu_ring *)source->data; > + struct amdgpu_ring *ring =3D &(adev->gfx.kiq.ring); > > - BUG_ON(!ring || (ring->funcs->type !=3D > AMDGPU_RING_TYPE_KIQ)); > + BUG_ON(ring->funcs->type !=3D AMDGPU_RING_TYPE_KIQ); > > me_id =3D (entry->ring_id & 0x0c) >> 2; > pipe_id =3D (entry->ring_id & 0x03) >> 0; > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx --_000_CY4PR12MB16873E1CB343FE73B464899DFB190CY4PR12MB1687namp_ Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable
I think no need to check function type.

Best Regards
Rex
From: amd-gfx <amd-gfx= -bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Deucher, Alexander <Alex= ander.Deucher-5C7GfCeVMHo@public.gmane.org>
Sent: Tuesday, April 18, 2017 9:33:58 PM
To: Huang, Trigger; amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Huang, Trigger
Subject: RE: [PATCH] drm/amdgpu: Fix module unload hang by KIQ on Ve= ga10
 
> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org] On Behalf
> Of Trigger Huang
> Sent: Monday, April 17, 2017 10:14 PM
> To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> Cc: Huang, Trigger
> Subject: [PATCH] drm/amdgpu: Fix module unload hang by KIQ on Vega10 >
> Apply commit 4e683cb2644f ("drm/amdgpu: Fix module unload hang by=
> KIQ IRQ set")to vega10
>
> Signed-off-by: Trigger Huang <trigger.huang-5C7GfCeVMHo@public.gmane.org>

Reviewed-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>

> ---
>  drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 10 ++++-= -----
>  1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> index f6b2329..b7b2ed8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
> @@ -631,7 +631,6 @@ static int gfx_v9_0_kiq_init_ring(struct
> amdgpu_device *adev,
>            = ;    ring->pipe =3D 1;
>        }
>
> -     irq->data =3D ring;
>        ring->queue =3D 0;
>        ring->eop_gpu_addr =3D ki= q->eop_gpu_addr;
>        sprintf(ring->name, "= ;kiq %d.%d.%d", ring->me, ring->pipe, ring-
> >queue);
> @@ -647,7 +646,6 @@ static void gfx_v9_0_kiq_free_ring(struct
> amdgpu_ring *ring,
>  {
>        amdgpu_wb_free(ring->adev= , ring->adev->virt.reg_val_offs);
>        amdgpu_ring_fini(ring);
> -     irq->data =3D NULL;
>  }
>
>  /* create MQD for each compute queue */
> @@ -3367,9 +3365,9 @@ static int gfx_v9_0_kiq_set_interrupt_state(= struct
> amdgpu_device *adev,
>            = ;            &n= bsp;            = ;       enum amdgpu_interrupt_state
> state)
>  {
>        uint32_t tmp, target;
> -     struct amdgpu_ring *ring =3D (struct amdgpu_= ring *)src->data;
> +     struct amdgpu_ring *ring =3D &(adev-= >gfx.kiq.ring);
>
> -     BUG_ON(!ring || (ring->funcs->type != =3D
> AMDGPU_RING_TYPE_KIQ));
> +     BUG_ON(ring->funcs->type !=3D AMDG= PU_RING_TYPE_KIQ);
>
>        if (ring->me =3D=3D 1) >            = ;    target =3D SOC15_REG_OFFSET(GC, 0,
> mmCP_ME1_PIPE0_INT_CNTL);
> @@ -3413,9 +3411,9 @@ static int gfx_v9_0_kiq_irq(struct amdgpu_de= vice
> *adev,
>            = ;            &n= bsp;   struct amdgpu_iv_entry *entry)
>  {
>        u8 me_id, pipe_id, queue_id;=
> -     struct amdgpu_ring *ring =3D (struct amdgpu_= ring *)source->data;
> +     struct amdgpu_ring *ring =3D &(adev-= >gfx.kiq.ring);
>
> -     BUG_ON(!ring || (ring->funcs->type != =3D
> AMDGPU_RING_TYPE_KIQ));
> +     BUG_ON(ring->funcs->type !=3D AMDG= PU_RING_TYPE_KIQ);
>
>        me_id =3D (entry->ring_id= & 0x0c) >> 2;
>        pipe_id =3D (entry->ring_= id & 0x03) >> 0;
> --
> 2.7.4
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> htt= ps://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
https://= lists.freedesktop.org/mailman/listinfo/amd-gfx
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