From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Zhu, Rex" Subject: Re: [PATCH] drm/amdgpu/pm: fix display count in non-DC path Date: Fri, 29 Jun 2018 00:22:27 +0000 Message-ID: References: <20180628183804.9846-1-alexander.deucher@amd.com>, <20180628183804.9846-3-alexander.deucher@amd.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0015833174==" Return-path: In-Reply-To: <20180628183804.9846-3-alexander.deucher-5C7GfCeVMHo@public.gmane.org> Content-Language: en-US List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: Alex Deucher , "amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org" Cc: "Deucher, Alexander" --===============0015833174== Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_CY4PR12MB168762615099B161517A6DE0FB4E0CY4PR12MB1687namp_" --_000_CY4PR12MB168762615099B161517A6DE0FB4E0CY4PR12MB1687namp_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Reviewed-by: Rex Zhu Best Regards Rex ________________________________ From: amd-gfx on behalf of Alex Deu= cher Sent: Friday, June 29, 2018 2:38 AM To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Cc: Deucher, Alexander Subject: [PATCH] drm/amdgpu/pm: fix display count in non-DC path new_active_crtcs is a bitmask, new_active_crtc_count is the actual count. Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/a= mdgpu/amdgpu_pm.c index a003fd881a89..f1404adc3a90 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c @@ -1959,7 +1959,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_device *a= dev) if (!amdgpu_device_has_dc_support(adev)) { mutex_lock(&adev->pm.mutex); amdgpu_dpm_get_active_displays(adev); - adev->pm.pm_display_cfg.num_display =3D adev->pm.dp= m.new_active_crtcs; + adev->pm.pm_display_cfg.num_display =3D adev->pm.dp= m.new_active_crtc_count; adev->pm.pm_display_cfg.vrefresh =3D amdgpu_dpm_ge= t_vrefresh(adev); adev->pm.pm_display_cfg.min_vblank_time =3D amdgpu= _dpm_get_vblank_time(adev); /* we have issues with mclk switching with refresh= rates over 120 hz on the non-DC code. */ -- 2.13.6 _______________________________________________ amd-gfx mailing list amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx amd-gfx Info Page - freedesktop.org lists.freedesktop.org Subscribing to amd-gfx: Subscribe to amd-gfx by filling out the following f= orm. Use of all freedesktop.org lists is subject to our Code of Conduct. --_000_CY4PR12MB168762615099B161517A6DE0FB4E0CY4PR12MB1687namp_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

Reviewed-by: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>

 

Best Regards

Rex




From: amd-gfx <amd-gfx-b= ounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org> on behalf of Alex Deucher <alexdeucher@= gmail.com>
Sent: Friday, June 29, 2018 2:38 AM
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu/pm: fix display count in non-DC path
 
new_active_crtcs is a bitmask, new_active_crtc_cou= nt is the
actual count.

Signed-off-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c b/drivers/gpu/drm/amd/a= mdgpu/amdgpu_pm.c
index a003fd881a89..f1404adc3a90 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
@@ -1959,7 +1959,7 @@ void amdgpu_pm_compute_clocks(struct amdgpu_devic= e *adev)
            &nb= sp;    if (!amdgpu_device_has_dc_support(adev)) {
            &nb= sp;            mutex= _lock(&adev->pm.mutex);
            &nb= sp;            amdgp= u_dpm_get_active_displays(adev);
-            &n= bsp;          adev->pm.pm_d= isplay_cfg.num_display =3D adev->pm.dpm.new_active_crtcs;
+           &nbs= p;           adev->pm.= pm_display_cfg.num_display =3D adev->pm.dpm.new_active_crtc_count;
            &nb= sp;            adev-= >pm.pm_display_cfg.vrefresh =3D amdgpu_dpm_get_vrefresh(adev);
            &nb= sp;            adev-= >pm.pm_display_cfg.min_vblank_time =3D amdgpu_dpm_get_vblank_time(adev);=
            &nb= sp;            /* we= have issues with mclk switching with refresh rates over 120 hz on the non-= DC code. */
--
2.13.6

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