From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Zhu, Rex" Subject: Re: [PATCH 2/5] drm/amd/pp: Fix wrong clock-unit exported to Display Date: Wed, 20 Jun 2018 14:51:24 +0000 Message-ID: References: <20180619211732.10012-1-harry.wentland@amd.com> <20180619211732.10012-3-harry.wentland@amd.com>, Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============2120474081==" Return-path: In-Reply-To: Content-Language: en-US List-Id: Discussion list for AMD gfx List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: amd-gfx-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "amd-gfx" To: Alex Deucher , "Wentland, Harry" Cc: "Laktyushkin, Dmytro" , "Lipski, Mikita" , "Wu, Hersen" , amd-gfx list --===============2120474081== Content-Language: en-US Content-Type: multipart/alternative; boundary="_000_CY4PR12MB1687C87330C2D926DD39BC94FB770CY4PR12MB1687namp_" --_000_CY4PR12MB1687C87330C2D926DD39BC94FB770CY4PR12MB1687namp_ Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Hi Alex, Mikita's patch was still not in drm-next. I reviewed the interfaces between powerplay and display. Most of them were still not implemented. so the services powerplay exported= to dc will not be called. I tried to implement them. and then we can try to test the strutter mode on raven in linux. Best Regards Rex ________________________________ From: Alex Deucher Sent: Wednesday, June 20, 2018 11:47 AM To: Wentland, Harry Cc: amd-gfx list; Wu, Hersen; Lipski, Mikita; Laktyushkin, Dmytro; Zhu, Rex Subject: Re: [PATCH 2/5] drm/amd/pp: Fix wrong clock-unit exported to Displ= ay On Tue, Jun 19, 2018 at 5:17 PM, Harry Wentland wr= ote: > From: Rex Zhu > > Transfer 10KHz (requested by smu) to KHz needed by Display > component. > > This can fix the issue 4k Monitor can't be lit up on Vega/Raven. > > Signed-off-by: Rex Zhu > Acked-by: Alex Deucher Need to make sure we drop Mikita's patch if we apply this one otherwise the clocks will be wrong again. Alex > --- > drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c | 4 ++-- > drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 10 +++++----- > drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 10 +++++----- > 3 files changed, 12 insertions(+), 12 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drivers/= gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c > index d4bc83e81389..c905df42adc5 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c > @@ -993,7 +993,7 @@ static int smu10_get_clock_by_type_with_latency(struc= t pp_hwmgr *hwmgr, > > clocks->num_levels =3D 0; > for (i =3D 0; i < pclk_vol_table->count; i++) { > - clocks->data[i].clocks_in_khz =3D pclk_vol_table->entries= [i].clk; > + clocks->data[i].clocks_in_khz =3D pclk_vol_table->entries= [i].clk * 10; > clocks->data[i].latency_in_us =3D latency_required ? > smu10_get_mem_latency(hwm= gr, > pclk_vol_table->entries[i= ].clk) : > @@ -1044,7 +1044,7 @@ static int smu10_get_clock_by_type_with_voltage(str= uct pp_hwmgr *hwmgr, > > clocks->num_levels =3D 0; > for (i =3D 0; i < pclk_vol_table->count; i++) { > - clocks->data[i].clocks_in_khz =3D pclk_vol_table->entries= [i].clk; > + clocks->data[i].clocks_in_khz =3D pclk_vol_table->entries= [i].clk * 10; > clocks->data[i].voltage_in_mv =3D pclk_vol_table->entries= [i].vol; > clocks->num_levels++; > } > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers= /gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > index 3b8d36df52e9..e9a8b527d481 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > @@ -4067,7 +4067,7 @@ static void vega10_get_sclks(struct pp_hwmgr *hwmgr= , > for (i =3D 0; i < dep_table->count; i++) { > if (dep_table->entries[i].clk) { > clocks->data[clocks->num_levels].clocks_in_khz = =3D > - dep_table->entries[i].clk; > + dep_table->entries[i].clk * 10; > clocks->num_levels++; > } > } > @@ -4104,7 +4104,7 @@ static void vega10_get_memclocks(struct pp_hwmgr *h= wmgr, > clocks->data[clocks->num_levels].clocks_in_khz = =3D > data->mclk_latency_table.entries > [data->mclk_latency_table.count].frequency =3D > - dep_table->entries[i].clk; > + dep_table->entries[i].clk * 10; > clocks->data[clocks->num_levels].latency_in_us = =3D > data->mclk_latency_table.entries > [data->mclk_latency_table.count].latency =3D > @@ -4126,7 +4126,7 @@ static void vega10_get_dcefclocks(struct pp_hwmgr *= hwmgr, > uint32_t i; > > for (i =3D 0; i < dep_table->count; i++) { > - clocks->data[i].clocks_in_khz =3D dep_table->entries[i].c= lk; > + clocks->data[i].clocks_in_khz =3D dep_table->entries[i].c= lk * 10; > clocks->data[i].latency_in_us =3D 0; > clocks->num_levels++; > } > @@ -4142,7 +4142,7 @@ static void vega10_get_socclocks(struct pp_hwmgr *h= wmgr, > uint32_t i; > > for (i =3D 0; i < dep_table->count; i++) { > - clocks->data[i].clocks_in_khz =3D dep_table->entries[i].c= lk; > + clocks->data[i].clocks_in_khz =3D dep_table->entries[i].c= lk * 10; > clocks->data[i].latency_in_us =3D 0; > clocks->num_levels++; > } > @@ -4202,7 +4202,7 @@ static int vega10_get_clock_by_type_with_voltage(st= ruct pp_hwmgr *hwmgr, > } > > for (i =3D 0; i < dep_table->count; i++) { > - clocks->data[i].clocks_in_khz =3D dep_table->entries[i].c= lk; > + clocks->data[i].clocks_in_khz =3D dep_table->entries[i].c= lk * 10; > clocks->data[i].voltage_in_mv =3D (uint32_t)(table_info->= vddc_lookup_table-> > entries[dep_table->entries[i].vddInd].us_= vdd); > clocks->num_levels++; > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/drivers= /gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c > index 782e2098824d..d685ce7f88cc 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c > @@ -1576,7 +1576,7 @@ static int vega12_get_sclks(struct pp_hwmgr *hwmgr, > > for (i =3D 0; i < ucount; i++) { > clocks->data[i].clocks_in_khz =3D > - dpm_table->dpm_levels[i].value * 100; > + dpm_table->dpm_levels[i].value * 1000; > > clocks->data[i].latency_in_us =3D 0; > } > @@ -1608,7 +1608,7 @@ static int vega12_get_memclocks(struct pp_hwmgr *hw= mgr, > > for (i =3D 0; i < ucount; i++) { > clocks->data[i].clocks_in_khz =3D > - dpm_table->dpm_levels[i].value * 100; > + dpm_table->dpm_levels[i].value * 1000; > > clocks->data[i].latency_in_us =3D > data->mclk_latency_table.entries[i].latency =3D > @@ -1638,7 +1638,7 @@ static int vega12_get_dcefclocks(struct pp_hwmgr *h= wmgr, > > for (i =3D 0; i < ucount; i++) { > clocks->data[i].clocks_in_khz =3D > - dpm_table->dpm_levels[i].value * 100; > + dpm_table->dpm_levels[i].value * 1000; > > clocks->data[i].latency_in_us =3D 0; > } > @@ -1666,7 +1666,7 @@ static int vega12_get_socclocks(struct pp_hwmgr *hw= mgr, > > for (i =3D 0; i < ucount; i++) { > clocks->data[i].clocks_in_khz =3D > - dpm_table->dpm_levels[i].value * 100; > + dpm_table->dpm_levels[i].value * 1000; > > clocks->data[i].latency_in_us =3D 0; > } > @@ -1838,7 +1838,7 @@ static int vega12_print_clock_levels(struct pp_hwmg= r *hwmgr, > return -1); > for (i =3D 0; i < clocks.num_levels; i++) > size +=3D sprintf(buf + size, "%d: %uMhz %s\n", > - i, clocks.data[i].clocks_in_khz / 100, > + i, clocks.data[i].clocks_in_khz / 1000, > (clocks.data[i].clocks_in_khz =3D=3D now)= ? "*" : ""); > break; > > -- > 2.17.1 > > _______________________________________________ > amd-gfx mailing list > amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx amd-gfx Info Page - freedesktop.org lists.freedesktop.org Subscribing to amd-gfx: Subscribe to amd-gfx by filling out the following f= orm. Use of all freedesktop.org lists is subject to our Code of Conduct. --_000_CY4PR12MB1687C87330C2D926DD39BC94FB770CY4PR12MB1687namp_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable

Hi Alex,


Mikita's patch was = still not in drm-next.

I reviewed the interfaces between powerplay and display.

Most of them were still not implemented. so the services powerplay exp= orted to dc will not be called. 

I tried to implement them. 

and then we can  try to test  the strutter mode on raven in = linux.


Best Regards

Rex



From: Alex Deucher <alex= deucher-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Sent: Wednesday, June 20, 2018 11:47 AM
To: Wentland, Harry
Cc: amd-gfx list; Wu, Hersen; Lipski, Mikita; Laktyushkin, Dmytro; Z= hu, Rex
Subject: Re: [PATCH 2/5] drm/amd/pp: Fix wrong clock-unit exported t= o Display
 
On Tue, Jun 19, 2018 at 5:17 PM, Harry Wentland &l= t;harry.wentland-5C7GfCeVMHo@public.gmane.org> wrote:
> From: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
>
> Transfer 10KHz (requested by smu) to KHz needed by Display
> component.
>
> This can fix the issue 4k Monitor can't be lit up on Vega/Raven.
>
> Signed-off-by: Rex Zhu <Rex.Zhu-5C7GfCeVMHo@public.gmane.org>
> Acked-by: Alex Deucher <alexander.deucher-5C7GfCeVMHo@public.gmane.org>

Need to make sure we drop Mikita's patch if we apply this one
otherwise the clocks will be wrong again.

Alex

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c  |  = 4 ++--
>  drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 10 += 3;+++-----
>  drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c | 10 += 3;+++-----
>  3 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c b/drive= rs/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> index d4bc83e81389..c905df42adc5 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c > @@ -993,7 +993,7 @@ static int smu10_get_clock_by_type_with_latenc= y(struct pp_hwmgr *hwmgr,
>
>         clocks->num_levels = =3D 0;
>         for (i =3D 0; i < p= clk_vol_table->count; i++) {
> -           &nb= sp;   clocks->data[i].clocks_in_khz =3D pclk_vol_table->ent= ries[i].clk;
> +           = ;    clocks->data[i].clocks_in_khz =3D pclk_vol_table->= ;entries[i].clk * 10;
>            = ;     clocks->data[i].latency_in_us =3D latency_requ= ired ?
>            = ;            &n= bsp;            = ;            smu10_g= et_mem_latency(hwmgr,
>            = ;            &n= bsp;            = ;            pclk_vo= l_table->entries[i].clk) :
> @@ -1044,7 +1044,7 @@ static int smu10_get_clock_by_type_with_volt= age(struct pp_hwmgr *hwmgr,
>
>         clocks->num_levels = =3D 0;
>         for (i =3D 0; i < p= clk_vol_table->count; i++) {
> -           &nb= sp;   clocks->data[i].clocks_in_khz =3D pclk_vol_table->ent= ries[i].clk;
> +           = ;    clocks->data[i].clocks_in_khz =3D pclk_vol_table->= ;entries[i].clk  * 10;
>            = ;     clocks->data[i].voltage_in_mv =3D pclk_vol_tab= le->entries[i].vol;
>            = ;     clocks->num_levels++;
>         }
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/driv= ers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index 3b8d36df52e9..e9a8b527d481 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > @@ -4067,7 +4067,7 @@ static void vega10_get_sclks(struct pp_hwmgr= *hwmgr,
>         for (i =3D 0; i < d= ep_table->count; i++) {
>            = ;     if (dep_table->entries[i].clk) {
>            = ;             c= locks->data[clocks->num_levels].clocks_in_khz =3D
> -           &nb= sp;            =             &nb= sp;  dep_table->entries[i].clk;
> +           = ;            &n= bsp;            = ;   dep_table->entries[i].clk * 10;
>            = ;             c= locks->num_levels++;
>            = ;     }
>         }
> @@ -4104,7 +4104,7 @@ static void vega10_get_memclocks(struct pp_h= wmgr *hwmgr,
>            = ;             c= locks->data[clocks->num_levels].clocks_in_khz =3D
>            = ;             d= ata->mclk_latency_table.entries
>            = ;             [= data->mclk_latency_table.count].frequency =3D
> -           &nb= sp;            =             &nb= sp;  dep_table->entries[i].clk;
> +           = ;            &n= bsp;            = ;   dep_table->entries[i].clk * 10;
>            = ;             c= locks->data[clocks->num_levels].latency_in_us =3D
>            = ;             d= ata->mclk_latency_table.entries
>            = ;             [= data->mclk_latency_table.count].latency =3D
> @@ -4126,7 +4126,7 @@ static void vega10_get_dcefclocks(struct pp_= hwmgr *hwmgr,
>         uint32_t i;
>
>         for (i =3D 0; i < d= ep_table->count; i++) {
> -           &nb= sp;   clocks->data[i].clocks_in_khz =3D dep_table->entries[= i].clk;
> +           = ;    clocks->data[i].clocks_in_khz =3D dep_table->entr= ies[i].clk * 10;
>            = ;     clocks->data[i].latency_in_us =3D 0;
>            = ;     clocks->num_levels++;
>         }
> @@ -4142,7 +4142,7 @@ static void vega10_get_socclocks(struct pp_h= wmgr *hwmgr,
>         uint32_t i;
>
>         for (i =3D 0; i < d= ep_table->count; i++) {
> -           &nb= sp;   clocks->data[i].clocks_in_khz =3D dep_table->entries[= i].clk;
> +           = ;    clocks->data[i].clocks_in_khz =3D dep_table->entr= ies[i].clk * 10;
>            = ;     clocks->data[i].latency_in_us =3D 0;
>            = ;     clocks->num_levels++;
>         }
> @@ -4202,7 +4202,7 @@ static int vega10_get_clock_by_type_with_vol= tage(struct pp_hwmgr *hwmgr,
>         }
>
>         for (i =3D 0; i < d= ep_table->count; i++) {
> -           &nb= sp;   clocks->data[i].clocks_in_khz =3D dep_table->entries[= i].clk;
> +           = ;    clocks->data[i].clocks_in_khz =3D dep_table->entr= ies[i].clk  * 10;
>            = ;     clocks->data[i].voltage_in_mv =3D (uint32_t)(t= able_info->vddc_lookup_table->
>            = ;            &n= bsp;        entries[dep_table->entrie= s[i].vddInd].us_vdd);
>            = ;     clocks->num_levels++;
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c b/driv= ers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> index 782e2098824d..d685ce7f88cc 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c > @@ -1576,7 +1576,7 @@ static int vega12_get_sclks(struct pp_hwmgr = *hwmgr,
>
>         for (i =3D 0; i < u= count; i++) {
>            = ;     clocks->data[i].clocks_in_khz =3D
> -           &nb= sp;           dpm_table-&= gt;dpm_levels[i].value * 100;
> +           = ;            dpm_tab= le->dpm_levels[i].value * 1000;
>
>            = ;     clocks->data[i].latency_in_us =3D 0;
>         }
> @@ -1608,7 +1608,7 @@ static int vega12_get_memclocks(struct pp_hw= mgr *hwmgr,
>
>         for (i =3D 0; i < u= count; i++) {
>            = ;     clocks->data[i].clocks_in_khz =3D
> -           &nb= sp;           dpm_table-&= gt;dpm_levels[i].value * 100;
> +           = ;            dpm_tab= le->dpm_levels[i].value * 1000;
>
>            = ;     clocks->data[i].latency_in_us =3D
>            = ;             d= ata->mclk_latency_table.entries[i].latency =3D
> @@ -1638,7 +1638,7 @@ static int vega12_get_dcefclocks(struct pp_h= wmgr *hwmgr,
>
>         for (i =3D 0; i < u= count; i++) {
>            = ;     clocks->data[i].clocks_in_khz =3D
> -           &nb= sp;           dpm_table-&= gt;dpm_levels[i].value * 100;
> +           = ;            dpm_tab= le->dpm_levels[i].value * 1000;
>
>            = ;     clocks->data[i].latency_in_us =3D 0;
>         }
> @@ -1666,7 +1666,7 @@ static int vega12_get_socclocks(struct pp_hw= mgr *hwmgr,
>
>         for (i =3D 0; i < u= count; i++) {
>            = ;     clocks->data[i].clocks_in_khz =3D
> -           &nb= sp;           dpm_table-&= gt;dpm_levels[i].value * 100;
> +           = ;            dpm_tab= le->dpm_levels[i].value * 1000;
>
>            = ;     clocks->data[i].latency_in_us =3D 0;
>         }
> @@ -1838,7 +1838,7 @@ static int vega12_print_clock_levels(struct = pp_hwmgr *hwmgr,
>            = ;            &n= bsp;        return -1);
>            = ;     for (i =3D 0; i < clocks.num_levels; i+= 3;)
>            = ;             s= ize +=3D sprintf(buf + size, "%d: %uMhz %s\n",
> -           &nb= sp;            =        i, clocks.data[i].clocks_in_khz / 100,=
> +           = ;            &n= bsp;       i, clocks.data[i].clocks_in_khz / = 1000,
>            = ;            &n= bsp;        (clocks.data[i].clocks_in_kh= z =3D=3D now) ? "*" : "");
>            = ;     break;
>
> --
> 2.17.1
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
lists.freedesktop.org
Subscribing to amd-gfx: Subscribe to amd-gfx by filling out the following f= orm. Use of all freedesktop.org lists is subject to our Code of Conduct.


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