Re: [Intel-gfx] [PATCH v9 6/7] drm/i915/vdsc: Check slice design requirement

["Shankar, Uma" <uma.shankar@intel.com>]

> -----Original Message-----
> From: Kandpal, Suraj <suraj.kandpal@intel.com>
> Sent: Tuesday, February 21, 2023 9:51 AM
> To: Shankar, Uma <uma.shankar@intel.com>; intel-gfx@lists.freedesktop.org
> Subject: RE: [Intel-gfx] [PATCH v9 6/7] drm/i915/vdsc: Check slice design
> requirement
> 
> > >
> > > +static int intel_dsc_slice_dimensions_valid(struct intel_crtc_state
> > *pipe_config,
> > > +					    struct drm_dsc_config *vdsc_cfg) {
> > > +	if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_RGB ||
> > > +	    pipe_config->output_format ==
> > INTEL_OUTPUT_FORMAT_YCBCR444) {
> > > +		if (vdsc_cfg->slice_height > 4095)
> > > +			return -EINVAL;
> > > +		if (vdsc_cfg->slice_height * vdsc_cfg->slice_width >= 15000)
> >
> > This should be greater than 15000 for valid case, please check
> >
> > > +			return -EINVAL;
> > > +	} else if (pipe_config->output_format ==
> > > INTEL_OUTPUT_FORMAT_YCBCR420) {
> > > +		if (vdsc_cfg->slice_width % 2)
> > > +			return -EINVAL;
> > > +		if (vdsc_cfg->slice_height % 2)
> > > +			return -EINVAL;
> > > +		if (vdsc_cfg->slice_height > 4094)
> > > +			return -EINVAL;
> > > +		if (vdsc_cfg->slice_height * vdsc_cfg->slice_width >= 30000)
> >
> > This should be greater than 30000 for valid case, please check
> >
> 
> I missed this will fix it the condition should have been < 30000/15000
> 
> > > +			return -EINVAL;
> > > +	}
> > > +
> > > +	return 0;
> >
> > If code reaches here, format is 422 which should be EINVAL as of now.
> >
> 
> Not necessarily code can also reach here if all the slice dimension requirements are
> met for any format also AFAIK INTEL_OUTPUT_FORMAT_YCBCR422 has not been
> defined yet hence can be found in crtc_state->output_format

Oh yeah, missed that. But it would be good to have a check for YCBCR422 just to
restrict it here.

Regards,
Uma Shankar

> Regards,
> Suraj Kandpal
> 
> > > +}
> > > +
> > >  int intel_dsc_compute_params(struct intel_crtc_state *pipe_config)  {
> > >  	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> > > @@ -455,11 +478,20 @@ int intel_dsc_compute_params(struct
> > > intel_crtc_state
> > > *pipe_config)
> > >  	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
> > >  	const struct rc_parameters *rc_params;
> > >  	struct rc_parameters *rc = NULL;
> > > +	int err;
> > >  	u8 i = 0;
> > >
> > >  	vdsc_cfg->pic_width = pipe_config- hw.adjusted_mode.crtc_hdisplay;
> > >  	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
> > >  					     pipe_config->dsc.slice_count);
> > > +
> > > +	err = intel_dsc_slice_dimensions_valid(pipe_config, vdsc_cfg);
> > > +
> > > +	if (err) {
> > > +		drm_dbg_kms(&dev_priv->drm, "Slice dimension
> > requirements not
> > > met\n");
> > > +		return err;
> > > +	}
> > > +
> > >  	/*
> > >  	 * According to DSC 1.2 specs if colorspace is YCbCr then
> > > convert_rgb
> > is 0
> > >  	 * else 1
> > > --
> > > 2.25.1