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From: Mark Burton <mark.burton@greensocs.com>
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Date: Fri, 10 Jul 2015 10:31:46 +0200
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Subject: Re: [Qemu-devel] [RFC v3 00/13] Slow-path for atomic instruction
	translation
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To: Alvise Rigo <a.rigo@virtualopensystems.com>
Cc: mttcg@listserver.greensocs.com, claudio.fontana@huawei.com, qemu-devel@nongnu.org, pbonzini@redhat.com, jani.kokkonen@huawei.com, tech@virtualopensystems.com, alex.bennee@linaro.org

<big snip>
To be clear, for a normal user (e.g. they boot linux, they run some =
apps, etc)..., if they use only one core, is it true that they will see =
no difference in performance?
For a =E2=80=98normal user=E2=80=99 who does use multi-core, are you =
saying that a typical boot is slower?

Cheers

Mark.

> On 10 Jul 2015, at 10:23, Alvise Rigo <a.rigo@virtualopensystems.com> =
wrote:
>=20
> * Performance considerations
> This implementation shows good results while booting a Linux kernel,
> where tons of flushes affect the overall performance. A complete ARM
> Linux boot, without any filesystem, requires 30% longer if compared to
> the mttcg implementation, benefiting however of being capable to offer
> the infrastructure to handle atomic instructions on any architecture.
> Instead compared to the current TCG upstream, it is 40% faster with =
four
> vCPUs and 2.1 times faster with 8 vCPUs.
> In addition, there is still margin to improve such performance, since =
at
> the moment TLB is flushed quite often, probably more than the =
required.


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	mark.burton