From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Wang, Yipeng1" Subject: Re: [PATCH v5 5/8] hash: add read and write concurrency support Date: Thu, 12 Jul 2018 01:22:12 +0000 Message-ID: References: <1528455078-328182-1-git-send-email-yipeng1.wang@intel.com> <1531242001-381104-1-git-send-email-yipeng1.wang@intel.com> <1531242001-381104-6-git-send-email-yipeng1.wang@intel.com> <20180711134907.01d8eaf0@xeon-e3> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Cc: "De Lara Guarch, Pablo" , "dev@dpdk.org" , "Richardson, Bruce" , "honnappa.nagarahalli@arm.com" , "vguvva@caviumnetworks.com" , "brijesh.s.singh@gmail.com" , "Wang, Ren" , "Gobriel, Sameh" , "Tai, Charlie" To: Stephen Hemminger Return-path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id EC58E1B524 for ; Thu, 12 Jul 2018 03:22:30 +0200 (CEST) In-Reply-To: <20180711134907.01d8eaf0@xeon-e3> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi, Stephen, You are correct and we understand that spinlock might be slightly faster th= an counter based rwlock in this case. However, the counter based rwlock is = the exception path when TSX fails. If performance of this exception path is a big concern, a more optimal read= -write lock scheme (e.g. TLRW) should be introduced into rte_rwlock in the = future. Thanks Yipeng >-----Original Message----- >From: Stephen Hemminger [mailto:stephen@networkplumber.org] > >For small windows, reader-writer locks are slower than a spin lock >because there are more cache bounces.