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dmarc=pass action=none header.from=arm.com; dkim=pass header.d=arm.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=armh.onmicrosoft.com; s=selector2-armh-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=32hs9lkEXp8u8+aXUbXvjic0i9Ga9cqihqwtBjJ6HRo=; b=QhLSgxB9viWgu6mzaW4fpiZBIwmcU8D8Sy4FTzkLF8R7cEMUEdul8OwIZ2UyI0BPGlyKqh+wS2vuSF5dPAZ1LE1ttpuGgh3lS/ug7nobQga3gRLiHuhDMf4qofZvjUwwOOnsIw6NV7KgJWkuJ+ipJAOaerNRmUv2lfbuGo2bTxY= From: Rahul Singh To: Oleksandr Andrushchenko CC: "xen-devel@lists.xenproject.org" , "julien@xen.org" , Oleksandr Tyshchenko , Volodymyr Babchuk , Artem Mygaiev , "roger.pau@citrix.com" , Bertrand Marquis , Stefano Stabellini , Oleksandr Andrushchenko Subject: Re: [PATCH 09/11] xen/arm: Setup MMIO range trap handlers for hardware domain Thread-Topic: [PATCH 09/11] xen/arm: Setup MMIO range trap handlers for hardware domain Thread-Index: AQHXoJ57xrO/H5MzpEqKB3+2EFX1LqudvyUAgAXn+wCAAP1GAIAAWBqAgACkJYCAAjRZAIAAFToA Date: Fri, 17 Sep 2021 07:29:23 +0000 Message-ID: References: <20210903083347.131786-1-andr2000@gmail.com> <20210903083347.131786-10-andr2000@gmail.com> <6a4e6a1d-12c9-09bb-442d-ce7f6586ef89@epam.com> <20b0a8c0-10dc-7473-3c56-a9baeaa43e62@epam.com> <6EA9A8EE-8101-4679-832C-A912819891BC@arm.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: Authentication-Results-Original: epam.com; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Sep 2021 07:29:38.1220 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6122d151-4095-4289-7f4f-08d979ace7f0 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT026.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: HE1PR0801MB1929 Hi Oleksandr, > On 17 Sep 2021, at 7:13 am, Oleksandr Andrushchenko wrote: >=20 > Hi, Rahul! >=20 > On 15.09.21 23:33, Stefano Stabellini wrote: >> On Wed, 15 Sep 2021, Rahul Singh wrote: >>> Hi Oleksandr, Stefano, >>>=20 >>>> On 15 Sep 2021, at 6:30 am, Oleksandr Andrushchenko wrote: >>>>=20 >>>> Hi, Rahul! >>>>=20 >>>> On 14.09.21 17:24, Oleksandr Andrushchenko wrote: >>>>> } >>>>>>> +static int pci_ecam_register_mmio_handler(struct domain *d, >>>>>>> + struct pci_host_bridge *= bridge, >>>>>>> + const struct mmio_handle= r_ops *ops) >>>>>>> +{ >>>>>>> + struct pci_config_window *cfg =3D bridge->sysdata; >>>>>>> + >>>>>>> + register_mmio_handler(d, ops, cfg->phys_addr, cfg->size, NULL)= ; >>>>>>> + return 0; >>>>>>> +} >>>>>> Given that struct pci_config_window is generic (it is not specific t= o >>>>>> one bridge), I wonder if we even need the .register_mmio_handler >>>>>> callback here. >>>>>>=20 >>>>>> In fact,pci_host_bridge->sysdata doesn't even need to be a void*, it >>>>>> could be a struct pci_config_window*, right? >>>>> Rahul, this actually may change your series. >>>>>=20 >>>>> Do you think we can do that? >>>>>=20 >>>> This is the only change requested that left unanswered by now. >>>>=20 >>>> Will it be possible that you change the API accordingly, so I can >>>>=20 >>>> implement as Stefano suggests? >>> We need pci_host_bridge->sysdata as void* in case we need to implement = the new non-ecam PCI controller in XEN. >>> Please have a look once in Linux code[1] how bridge->sysdata will be us= ed. struct pci_config_window is used only for >>> ecam supported host controller. Different PCI host controller will have= different PCI interface to access the PCI controller. >>>=20 >>> [1] https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/ke= rnel/git/torvalds/linux.git/tree/drivers/pci/controller/pcie-rcar-host.c*n3= 09__;Iw!!GF_29dbcQIUBPA!kjkv6KIlvXOEgVaS6BNPRo0gyABihhO0XmNHRPFJaFAGhhTEuK1= mIsWqPs0cXEipzkT_MmA-Eg$ [git[.]kernel[.]org] >>>=20 >>> I think we need bridge->sysdata in future to implement the new PCI cont= roller. >> In my opinion the pci_config_window is too important of an information >> to be left inside an opaque pointer, especially when the info under >> pci_config_window is both critical and vendor-neutral. >>=20 >> My preference would be something like this: >>=20 >>=20 >> diff --git a/xen/include/asm-arm/pci.h b/xen/include/asm-arm/pci.h >> index 9c28a4bdc4..c80d846da3 100644 >> --- a/xen/include/asm-arm/pci.h >> +++ b/xen/include/asm-arm/pci.h >> @@ -55,7 +55,6 @@ struct pci_config_window { >> uint8_t busn_start; >> uint8_t busn_end; >> void __iomem *win; >> - const struct pci_ecam_ops *ops; >> }; >>=20 >> /* >> @@ -68,7 +67,8 @@ struct pci_host_bridge { >> uint16_t segment; /* Segment number */ >> u8 bus_start; /* Bus start of this bridge. */ >> u8 bus_end; /* Bus end of this bridge. */ >> - void *sysdata; /* Pointer to the config space win= dow*/ >> + struct pci_config_window* cfg; /* Pointer to the bridge config wi= ndow */ >> + void *sysdata; /* Pointer to bridge private data = */ >> const struct pci_ops *ops; >> }; >>=20 >>=20 >> As a reference the attached patch builds. However, I had to remove const >> where struct pci_ecam_ops *ops is used. >=20 > I'd like to know which route we go with this as this is now the last >=20 > thing which stops me from sending v2 of this series. I will modify the code as per Stefano request and will send the next versio= n. Regards, Rahul >=20 > Thank you, >=20 > Oleksandr