From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756150AbbLDLqJ (ORCPT ); Fri, 4 Dec 2015 06:46:09 -0500 Received: from mail-db3on0067.outbound.protection.outlook.com ([157.55.234.67]:36283 "EHLO emea01-db3-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751639AbbLDLqH convert rfc822-to-8bit (ORCPT ); Fri, 4 Dec 2015 06:46:07 -0500 From: Noam Camus To: Daniel Lezcano , "linux-snps-arc@lists.infradead.org" CC: "linux-kernel@vger.kernel.org" , "Chris Metcalf" , Pawel Moll Subject: Re: [PATCH v3 01/18] Documentation: Add EZchip vendor to binding list Thread-Topic: [PATCH v3 01/18] Documentation: Add EZchip vendor to binding list Thread-Index: AQHRLDjKMjjG1rjHmEy6B3Ptrwwrbp66fTGAgAA8vPM= Date: Fri, 4 Dec 2015 11:46:03 +0000 Message-ID: References: <1448974985-11487-1-git-send-email-noamc@ezchip.com> <1448974985-11487-2-git-send-email-noamc@ezchip.com>,<566149C1.8070502@linaro.org> In-Reply-To: <566149C1.8070502@linaro.org> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: spf=none (sender IP is ) smtp.mailfrom=noamc@ezchip.com; x-originating-ip: [85.64.158.114] x-microsoft-exchange-diagnostics: 1;DB4PR02MB126;5:fFvQbG3zYrpktNyvFnd3OV18I5wUbnLpZ3110gibpvCToUWna1eoMcSyzqdY//XThbJyo0L0qY29qmynkY9+Yp1DGiXJEBtvHNEcqeqdTY8TnygQ568phCCCUbjVej86HfINUHFcP0uYJrzMjR490g==;24:Ik4KyckQDt9BDpIuRVhBUWd6bPioPg8hQ7xmrcbsLuuWkvUqpEKRvi8ay6rBDHh09Y9l5+HLZ2PcZQnP0JAY2507pNtpva+HAjfH6KsdIc0= x-microsoft-antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:DB4PR02MB126; x-microsoft-antispam-prvs: x-exchange-antispam-report-test: UriScan:; x-exchange-antispam-report-cfa-test: BCL:0;PCL:0;RULEID:(601004)(2401047)(5005006)(520078)(8121501046)(3002001)(10201501046);SRVR:DB4PR02MB126;BCL:0;PCL:0;RULEID:;SRVR:DB4PR02MB126; x-forefront-prvs: 07807C55DC x-forefront-antispam-report: SFV:NSPM;SFS:(10009020)(6009001)(189002)(199003)(377454003)(101416001)(586003)(5008740100001)(54356999)(74316001)(102836003)(76576001)(19580405001)(3846002)(19580395003)(1096002)(189998001)(5004730100002)(1220700001)(76176999)(10400500002)(33656002)(106116001)(5001770100001)(106356001)(81156007)(105586002)(5001960100002)(5002640100001)(50986999)(6116002)(97736004)(87936001)(86362001)(92566002)(66066001)(5003600100002)(2900100001)(15975445007)(2950100001)(77096005)(122556002)(2501003)(15395725005)(40100003);DIR:OUT;SFP:1101;SCL:1;SRVR:DB4PR02MB126;H:DB5PR02MB1141.eurprd02.prod.outlook.com;FPR:;SPF:None;PTR:InfoNoRecords;MX:1;A:1;LANG:en; spamdiagnosticoutput: 1:23 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="koi8-r" Content-Transfer-Encoding: 8BIT MIME-Version: 1.0 X-OriginatorOrg: ezchip.com X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Dec 2015 11:46:03.6784 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 0fc16e0a-3cd3-4092-8b2f-0a42cff122c3 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB4PR02MB126 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >From: Daniel Lezcano >Sent: Friday, December 4, 2015 10:07 AM >> >> diff --git a/Documentation/devicetree/bindings/arc/eznps.txt b/Documentation/devicetree/bindings/arc/eznps.txt >> new file mode 100644 >> index 0000000..f8b5e9b >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arc/eznps.txt >> @@ -0,0 +1,7 @@ >> +EZchip NPS Network Proccessor Platforms Device Tree Bindings > >Processor Thanks -- Linaro.org Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog From mboxrd@z Thu Jan 1 00:00:00 1970 From: noamc@ezchip.com (Noam Camus) Date: Fri, 4 Dec 2015 11:46:03 +0000 Subject: [PATCH v3 01/18] Documentation: Add EZchip vendor to binding list In-Reply-To: <566149C1.8070502@linaro.org> References: <1448974985-11487-1-git-send-email-noamc@ezchip.com> <1448974985-11487-2-git-send-email-noamc@ezchip.com>, <566149C1.8070502@linaro.org> List-ID: Message-ID: To: linux-snps-arc@lists.infradead.org >From: Daniel Lezcano >Sent: Friday, December 4, 2015 10:07 AM >> >> diff --git a/Documentation/devicetree/bindings/arc/eznps.txt b/Documentation/devicetree/bindings/arc/eznps.txt >> new file mode 100644 >> index 0000000..f8b5e9b >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/arc/eznps.txt >> @@ -0,0 +1,7 @@ >> +EZchip NPS Network Proccessor Platforms Device Tree Bindings > >Processor Thanks -- Linaro.org ? Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog