All of lore.kernel.org
 help / color / mirror / Atom feed
From: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
Date: Tue, 29 Aug 2017 16:12:10 +0000	[thread overview]
Message-ID: <DB6PR0402MB28384C5030078E6E51F866A1999F0@DB6PR0402MB2838.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <CAD6G_RSDtUxpwW9A4d_i56Onxbo=1DYxmyncUPriCczOfd84kQ@mail.gmail.com>



> -----Original Message-----
> From: Jagan Teki [mailto:jagannadh.teki at gmail.com]
> Sent: Friday, August 11, 2017 4:03 PM
> To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
> Cc: u-boot at lists.denx.de; York Sun <york.sun@nxp.com>
> Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
> 
> On Fri, Aug 11, 2017 at 3:38 PM, Yogesh Narayan Gaur
> <yogeshnarayan.gaur@nxp.com> wrote:
> >
> >
> >> -----Original Message-----
> >> From: Jagan Teki [mailto:jagannadh.teki at gmail.com]
> >> Sent: Friday, August 11, 2017 3:32 PM
> >> To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
> >> Cc: u-boot at lists.denx.de; York Sun <york.sun@nxp.com>
> >> Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support
> >>
> >> On Fri, Aug 11, 2017 at 3:30 PM, Yogesh Narayan Gaur
> >> <yogeshnarayan.gaur@nxp.com> wrote:
> >> >
> >> >
> >> >> -----Original Message-----
> >> >> From: Jagan Teki [mailto:jagannadh.teki at gmail.com]
> >> >> Sent: Friday, August 11, 2017 3:25 PM
> >> >> To: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>
> >> >> Cc: u-boot at lists.denx.de; York Sun <york.sun@nxp.com>
> >> >> Subject: Re: [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash
> >> >> support
> >> >>
> >> >> On Tue, Aug 1, 2017 at 9:43 AM, Yogesh Gaur
> >> >> <yogeshnarayan.gaur@nxp.com>
> >> >> wrote:
> >> >> > Add MT35XU512ABA1G12 parameters to NOR flash parameters array.
> >> >> > Since the manufactory ID is changed to 0x2C, add it for micron
> >> >> > and using it for relevant settings.
> >> >> >
> >> >> > The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It
> >> >> > can't support dual and quad. Supports subsector erase with 4KB
> >> >> > granularity, have support of FSR(flag status register) and flash size is
> 64MB.
> >> >> > ---
> >> >> >  drivers/mtd/spi/sf_internal.h   | 1 +
> >> >> >  drivers/mtd/spi/spi_flash.c     | 2 ++
> >> >> >  drivers/mtd/spi/spi_flash_ids.c | 1 +
> >> >> >  3 files changed, 4 insertions(+)
> >> >> >
> >> >> > diff --git a/drivers/mtd/spi/sf_internal.h
> >> >> > b/drivers/mtd/spi/sf_internal.h index 839cdbe..f46cb3a 100644
> >> >> > --- a/drivers/mtd/spi/sf_internal.h
> >> >> > +++ b/drivers/mtd/spi/sf_internal.h
> >> >> > @@ -33,6 +33,7 @@ enum spi_nor_option_flags {
> >> >> >  /* CFI Manufacture ID's */
> >> >> >  #define SPI_FLASH_CFI_MFR_SPANSION     0x01
> >> >> >  #define SPI_FLASH_CFI_MFR_STMICRO      0x20
> >> >> > +#define SPI_FLASH_CFI_MFR_MICRON       0x2C
> >> >>
> >> >> Does this new mfr id from micro? so 0x20 still exists?
> >> >>
> >> > On older Micron flash like MT25QU512ABB mfr id still is 0x20 but in
> >> > newer
> >> flash, MT35X, it's been changed to 0x2c.
> >>
> >> OK, so the flash features like quad ennoblements, opcodes remains same?
> >> except the mfr?
> >>
> > This flash support single bit and octal bit cmds no dual or quad support.
> > Opcode for read/write/erase and other register operation related cmds are
> similar to already supported flashes like MT25QU512ABB(n25q512a in existing
> table).
> > Only mfr id has been modified.
> 
> OK.

Did this patch needs to be modified further or can be upstreamed?

> 
> And better remove the new CONFIG_ macro since the both chips have equal
> functionalities and anyway changes should managed by id table.
> the chip you defined under STMICRO ifdef :)
> 
> thanks!
> --
> Jagan Teki
> Free Software Engineer | www.openedev.com U-Boot, Linux | Upstream
> Maintainer Hyderabad, India.

  reply	other threads:[~2017-08-29 16:12 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-08-01  4:13 [U-Boot] [PATCH] mtd/spi: Add MT35XU512ABA1G12 NOR flash support Yogesh Gaur
2017-08-11  9:54 ` Jagan Teki
2017-08-11 10:00   ` Yogesh Narayan Gaur
2017-08-11 10:02     ` Jagan Teki
2017-08-11 10:08       ` Yogesh Narayan Gaur
2017-08-11 10:32         ` Jagan Teki
2017-08-29 16:12           ` Yogesh Narayan Gaur [this message]
2017-08-29 17:18             ` Jagan Teki
2017-08-31 12:24               ` Yogesh Narayan Gaur

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=DB6PR0402MB28384C5030078E6E51F866A1999F0@DB6PR0402MB2838.eurprd04.prod.outlook.com \
    --to=yogeshnarayan.gaur@nxp.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.