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X-Microsoft-Antispam-Message-Info: b+dWz3VsYO7Y8sYJXgALZdSVFvIVrthtx+QQAKJfrlmZNc4vFqi37W2yTct4sQIjL44tV5tripvk3iFFAdPMhttGSoNwvNNvouHVTpL9ommbXiE0G+QQtomRjVLxkNqeGAWOJrfjcXpWqaOl6sP63KMW1XBVNvGehWVlgcv9owzb1FoO11e5ShP9RMHgVhIVX7I+UJc1gPcafVLct4P3QAgaf8aeqpTFpLhmZi6I9njaRJUUXhC7uBH9MVFuDCTPECUsqPwB/U1AcPP62S4Hsu8jW//jIJerTpm91Ret4DKn4D+AWIJnYXummP+c58XwYXeFJ2xDrE3MzcNnv0ebYV6MLOiOxJWOXJu3ORSyccIHybzNJLeDCoLuJYTkVJznEd1zgC/Rv/H98BL+/bhyqg== X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Jun 2020 14:37:50.4751 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 71bbe250-41d2-4a0d-92be-08d81c39fff0 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT040.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB4499 Subject: Re: [dpdk-dev] [PATCH v5 4/4] eal/atomic: add wrapper for c11 atomic thread fence X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > > > diff --git a/lib/librte_eal/x86/include/rte_atomic.h > > > b/lib/librte_eal/x86/include/rte_atomic.h > > > index b9dcd30..bd256e7 100644 > > > --- a/lib/librte_eal/x86/include/rte_atomic.h > > > +++ b/lib/librte_eal/x86/include/rte_atomic.h > > > @@ -83,6 +83,23 @@ rte_smp_mb(void) > > > > > > #define rte_cio_rmb() rte_compiler_barrier() > > > > > > +/** > > > + * Synchronization fence between threads based on the specified > > > + * memory order. > > > + * > > > + * On x86 the __atomic_thread_fence(__ATOMIC_SEQ_CST) generates > > > + * full 'mfence' which is quite expensive. The optimized > > > + * implementation of rte_smp_mb is used instead. > > > + */ > > > +static __rte_always_inline void > > > +rte_atomic_thread_fence(int mo) > > > +{ > > > + if (mo =3D=3D __ATOMIC_SEQ_CST) > > > + rte_smp_mb(); > > > + else > > > + __atomic_thread_fence(mo); > > > +} > > I think __ATOMIC_SEQ_CST needs to be used rarely. IMO, > > rte_atomic_thread_fence should be called only for __ATOMIC_SEQ_CST > > memory order. For all others the __atomic_thread_fence can be used > directly. This will help us to stick to using the atomic built-ins in mos= t of the > cases. > > > > Konstantin, is this ok for you? >=20 > My preference is to have one generic rte_atomic_thread_fence() for all ca= ses > (I.E - current Phil implementation looks good to me). > I think it is more consistent approach and would help to avoid confusion. Ok, I am fine. The script currently checks for __atomic_thread_fence(__ATOM= IC_SEQ_CST), we have to change it to check for __atomic_thread_fence > Konstantin