From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shahaf Shuler Subject: Re: [PATCH v3 2/2] net/mlx5: fix instruction hotspot on replenishing Rx buffer Date: Thu, 10 Jan 2019 19:10:04 +0000 Message-ID: References: <20190109085426.39965-1-yskoh@mellanox.com> <20190110183528.42503-1-yskoh@mellanox.com> <20190110183528.42503-2-yskoh@mellanox.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Cc: "dev@dpdk.org" , "roszenrami@gmail.com" , "david.marchand@redhat.com" , "stable@dpdk.org" To: Yongseok Koh , "olivier.matz@6wind.com" Return-path: In-Reply-To: <20190110183528.42503-2-yskoh@mellanox.com> Content-Language: en-US List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Thursday, January 10, 2019 8:35 PM, Yongseok Koh: > Subject: [dpdk-dev] [PATCH v3 2/2] net/mlx5: fix instruction hotspot on > replenishing Rx buffer >=20 > On replenishing Rx buffers for vectorized Rx, mbuf->buf_addr isn't needed= to > be accessed as it is static and easily calculated from the mbuf address. > Accessing the mbuf content causes unnecessary load stall and it is worsen= ed on > ARM. >=20 > Fixes: 545b884b1da3 ("net/mlx5: fix buffer address posting in SSE Rx") > Cc: stable@dpdk.org >=20 > Signed-off-by: Yongseok Koh Acked-by: Shahaf Shuler > --- >=20 > v3: > * rte_mbuf_buf_addr_default() -> rte_mbuf_buf_addr() >=20 > v2: > * use the newly introduced API - rte_mbuf_buf_addr_default() > * fix error in assert >=20 > drivers/net/mlx5/mlx5_rxtx_vec.h | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) >=20 > diff --git a/drivers/net/mlx5/mlx5_rxtx_vec.h > b/drivers/net/mlx5/mlx5_rxtx_vec.h > index fda7004e2d..989a1fdce5 100644 > --- a/drivers/net/mlx5/mlx5_rxtx_vec.h > +++ b/drivers/net/mlx5/mlx5_rxtx_vec.h > @@ -102,8 +102,10 @@ mlx5_rx_replenish_bulk_mbuf(struct mlx5_rxq_data > *rxq, uint16_t n) > return; > } > for (i =3D 0; i < n; ++i) { > - wq[i].addr =3D rte_cpu_to_be_64((uintptr_t)elts[i]->buf_addr + > - RTE_PKTMBUF_HEADROOM); > + void *buf_addr =3D rte_mbuf_buf_addr(elts[i], rxq->mp); > + > + assert(buf_addr =3D=3D elts[i]->buf_addr); > + wq[i].addr =3D rte_cpu_to_be_64((uintptr_t)buf_addr + > +RTE_PKTMBUF_HEADROOM); > /* If there's only one MR, no need to replace LKey in WQE. */ > if (unlikely(mlx5_mr_btree_len(&rxq->mr_ctrl.cache_bh) > 1)) > wq[i].lkey =3D mlx5_rx_mb2mr(rxq, elts[i]); > -- > 2.11.0