From: Jacky Bai <ping.bai@nxp.com>
To: Marcel Ziswiler <marcel.ziswiler@toradex.com>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"shawnguo@kernel.org" <shawnguo@kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>
Cc: Philippe Schenker <philippe.schenker@toradex.com>,
Peter Tian <peter.tian@nxp.com>,
"tharvey@gateworks.com" <tharvey@gateworks.com>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
dl-linux-imx <linux-imx@nxp.com>
Subject: RE: [PATCH] arm64: dts: imx8mp: Update pin function file according to Rev.D RM
Date: Wed, 17 Aug 2022 03:24:54 +0000 [thread overview]
Message-ID: <DB9PR04MB841293B23BF0E89E0A5A5E97876A9@DB9PR04MB8412.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <d5b7317f2149fec31070349b45ca41587571f322.camel@toradex.com>
> Subject: Re: [PATCH] arm64: dts: imx8mp: Update pin function file according
> to Rev.D RM
>
> Hi Jacky
>
> On Tue, 2022-08-16 at 15:32 +0800, Jacky Bai wrote:
> > Update i.MX8MP imx8mp-pinfunc.h file according latest reference manual
> > Rev.D. As some of the pins' name are changed, update the dts at the
> > same time.
>
> I am confused. We got told by NXP that there is no such USB1_OTG_ID resp.
> USB1_ID functionality at all on the i.MX 8M Plus and one has to rely on
> simulating such functionality using a regular GPIO. I mean, I understand that
> this commit just updates stuff according to the latest reference manual but
> why would that reference manual still claim such functionality exists when it
> supposedly really does not and we even had to re-design our PCB due to that?
>
Just confirmed, the info you got from NXP is correct. The USB ID pin has function limitation. IMO, the pinmux function
of USB ID should be marked as unavailable or reserved in the RM to eliminate the confusion.
Just hold this patch before I get a clear answer how to update the RM doc info.
BR
> Anyway, unfortunately, that claim was made in a super secret under NDA
> non-public forum [1] but I am sure them NXP folks should be able to access
> that as well.
>
> Any ideas?
>
> [1]
>
> > Signed-off-by: Jacky Bai <ping.bai@nxp.com>
> > ---
> > .../boot/dts/freescale/imx8mp-dhcom-som.dtsi | 6 +++---
> > arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 2 +-
> > arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h | 16
> > ++++++++--------
> > .../boot/dts/freescale/imx8mp-venice-gw74xx.dts | 4 ++--
> > arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi | 4 ++--
> > 5 files changed, 16 insertions(+), 16 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp-
> > dhcom-som.dtsi
> > index a616eb378002..dd896b6ddfe5 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> > @@ -867,14 +867,14 @@
> MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX
> > 0x49
> >
> > pinctrl_usb0_vbus: dhcom-usb0-grp {
> > fsl,pins = <
> >
> - MX8MP_IOMUXC_GPIO1_IO10__USB1_
> OTG_ID
> > 0x0
> >
> + MX8MP_IOMUXC_GPIO1_IO10__USB1_I
> D
> > +0x0
> > >;
> > };
> >
> > pinctrl_usb1_vbus: dhcom-usb1-grp {
> > fsl,pins = <
> >
> - MX8MP_IOMUXC_GPIO1_IO14__USB2_
> OTG_PWR
> > 0x6
> >
> - MX8MP_IOMUXC_GPIO1_IO15__USB2_
> OTG_OC
> > 0x80
> >
> + MX8MP_IOMUXC_GPIO1_IO14__USB2_
> PWR
> > +0x6
> >
> + MX8MP_IOMUXC_GPIO1_IO15__USB2_
> OC
> > +0x80
> > >;
> > };
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > index f6b017ab5f53..bdeccda5ddae 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts
> > @@ -529,7 +529,7 @@
> MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
> >
> > pinctrl_usb1_vbus: usb1grp {
> > fsl,pins = <
> >
> - MX8MP_IOMUXC_GPIO1_IO14__USB2_
> OTG_PWR 0x10
> >
> + MX8MP_IOMUXC_GPIO1_IO14__USB2_
> PWR 0x10
> > >;
> > };
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
> > b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
> > index 0fef066471ba..7c266990aa3e 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-pinfunc.h
> > @@ -13,10 +13,12 @@
> > #define
> MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00
>
> > 0x014 0x274 0x000 0x0 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO00__CCM_ENET_PHY_REF_CLK_ROOT
>
> > 0x014 0x274 0x000 0x1 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO00__ISP_FL_TRIG_0
>
> > 0x014 0x274 0x5D4 0x3 0x0
> > +#define
> MX8MP_IOMUXC_GPIO1_IO00__ANAMIX_REF_CLK_32K
>
> > +0x014 0x274 0x000 0x5 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO00__CCM_EXT_CLK1
>
> > 0x014 0x274 0x000 0x6 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01
>
> > 0x018 0x278 0x000 0x0 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT
>
> > 0x018 0x278 0x000 0x1 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO01__ISP_SHUTTER_TRIG_0
>
> > 0x018 0x278 0x5DC 0x3 0x0
> > +#define
> MX8MP_IOMUXC_GPIO1_IO01__ANAMIX_REF_CLK_24M
>
> > +0x018 0x278 0x000 0x5 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO01__CCM_EXT_CLK2
>
> > 0x018 0x278 0x000 0x6 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO02__GPIO1_IO02
>
> > 0x01C 0x27C 0x000 0x0 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B
>
> > 0x01C 0x27C 0x000 0x1 0x0 @@ -58,26 +60,26 @@
> > #define
> MX8MP_IOMUXC_GPIO1_IO09__USDHC3_RESET_B
>
> > 0x038 0x298 0x000 0x4 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO09__SDMA2_EXT_EVENT00
>
> > 0x038 0x298 0x000 0x5 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10
>
> > 0x03C 0x29C 0x000 0x0 0x0 -#define
> >
> MX8MP_IOMUXC_GPIO1_IO10__USB1_OTG_ID
> 0x03C
> > 0x29C 0x000 0x1 0x0
> > +#define
> MX8MP_IOMUXC_GPIO1_IO10__USB1_ID
>
> > +0x03C 0x29C 0x000 0x1 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO10__PWM3_OUT
>
> > 0x03C 0x29C 0x000 0x2 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11
>
> > 0x040 0x2A0 0x000 0x0 0x0 -#define
> >
> MX8MP_IOMUXC_GPIO1_IO11__USB2_OTG_ID
> 0x040
> > 0x2A0 0x000 0x1 0x0
> > +#define
> MX8MP_IOMUXC_GPIO1_IO11__USB2_ID
>
> > +0x040 0x2A0 0x000 0x1 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO11__PWM2_OUT
>
> > 0x040 0x2A0 0x000 0x2 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO11__USDHC3_VSELECT
>
> > 0x040 0x2A0 0x000 0x4 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO11__CCM_PMIC_READY
>
> > 0x040 0x2A0 0x554 0x5 0x1
> > #define
> MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12
>
> > 0x044 0x2A4 0x000 0x0 0x0 -#define
> >
> MX8MP_IOMUXC_GPIO1_IO12__USB1_OTG_PWR
> 0x044
> > 0x2A4 0x000 0x1 0x0
> > +#define
> MX8MP_IOMUXC_GPIO1_IO12__USB1_PWR
>
> > +0x044 0x2A4 0x000 0x1 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO12__SDMA2_EXT_EVENT01
>
> > 0x044 0x2A4 0x000 0x5 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO13__GPIO1_IO13
>
> > 0x048 0x2A8 0x000 0x0 0x0 -#define
> >
> MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC
> 0x048
> > 0x2A8 0x000 0x1 0x0
> > +#define
> MX8MP_IOMUXC_GPIO1_IO13__USB1_OC
>
> > +0x048 0x2A8 0x000 0x1 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO13__PWM2_OUT
>
> > 0x048 0x2A8 0x000 0x5 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14
>
> > 0x04C 0x2AC 0x000 0x0 0x0 -#define
> >
> MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR
> 0x04C
> > 0x2AC 0x000 0x1 0x0
> > +#define
> MX8MP_IOMUXC_GPIO1_IO14__USB2_PWR
>
> > +0x04C 0x2AC 0x000 0x1 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO14__USDHC3_CD_B
>
> > 0x04C 0x2AC 0x608 0x4 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO14__PWM3_OUT
>
> > 0x04C 0x2AC 0x000 0x5 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1
>
> > 0x04C 0x2AC 0x000 0x6 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15
>
> > 0x050 0x2B0 0x000 0x0 0x0 -#define
> >
> MX8MP_IOMUXC_GPIO1_IO15__USB2_OTG_OC
> 0x050
> > 0x2B0 0x000 0x1 0x0
> > +#define
> MX8MP_IOMUXC_GPIO1_IO15__USB2_OC
>
> > +0x050 0x2B0 0x000 0x1 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO15__USDHC3_WP
>
> > 0x050 0x2B0 0x634 0x4 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO15__PWM4_OUT
>
> > 0x050 0x2B0 0x000 0x5 0x0
> > #define
> MX8MP_IOMUXC_GPIO1_IO15__CCM_CLKO2
>
> > 0x050 0x2B0 0x000 0x6 0x0 @@ -258,10 +260,8 @@
> > #define
> MX8MP_IOMUXC_SD2_DATA3__AUDIOMIX_SPDIF1_IN
>
> > 0x0D4 0x334 0x544 0x3 0x1
> > #define
> MX8MP_IOMUXC_SD2_DATA3__AUDIOMIX_PDM_BIT_STREAM03
>
> > 0x0D4 0x334 0x4CC 0x4 0x2
> > #define
> MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18
>
> > 0x0D4 0x334 0x000 0x5 0x0 -#define
> >
> MX8MP_IOMUXC_SD2_DATA3__SRC_EARLY_RESET
> 0x0D4
> > 0x334 0x000 0x6 0x0
> > #define
> MX8MP_IOMUXC_SD2_RESET_B__USDHC2_RESET_B
>
> > 0x0D8 0x338 0x000 0x0 0x0
> > #define
> MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19
>
> > 0x0D8 0x338 0x000 0x5 0x0 -#define
> >
> MX8MP_IOMUXC_SD2_RESET_B__SRC_SYSTEM_RESET
> 0x0D8
> > 0x338 0x000 0x6 0x0
> > #define
> MX8MP_IOMUXC_SD2_WP__USDHC2_WP
>
> > 0x0DC 0x33C 0x000 0x0 0x0
> > #define
> MX8MP_IOMUXC_SD2_WP__GPIO2_IO20
>
> > 0x0DC 0x33C 0x000 0x5 0x0
> > #define
> MX8MP_IOMUXC_SD2_WP__CORESIGHT_EVENTI
>
> > 0x0DC 0x33C 0x000 0x6 0x0 diff --git
> > a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > b/arch/arm64/boot/dts/freescale/imx8mp-
> > venice-gw74xx.dts
> > index 521215520a0f..ac59f36b82fc 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts
> > @@ -824,8 +824,8 @@
> MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140
> >
> > pinctrl_usb1: usb1grp {
> > fsl,pins = <
> >
> - MX8MP_IOMUXC_GPIO1_IO13__USB1_
> OTG_OC 0x140
> >
> - MX8MP_IOMUXC_GPIO1_IO10__USB1_
> OTG_ID 0x140
> >
> + MX8MP_IOMUXC_GPIO1_IO13__USB1_
> OC 0x140
> >
> + MX8MP_IOMUXC_GPIO1_IO10__USB1_I
> D 0x140
> > >;
> > };
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
> > b/arch/arm64/boot/dts/freescale/imx8mp-
> > verdin.dtsi
> > index c5987bdbb383..da66d8487651 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
> > @@ -1205,7 +1205,7 @@ pinctrl_uart4: uart4grp {
> >
> > pinctrl_usb1_vbus: usb1vbusgrp {
> > fsl,pins =
> >
> - <MX8MP_IOMUXC_GPIO1_IO12__USB1
> _OTG_PWR
> > 0x19>; /* SODIMM 155 */
> >
> + <MX8MP_IOMUXC_GPIO1_IO12__USB1
> _PWR
> > +0x19>; /* SODIMM 155 */
> > };
> >
> > /* USB_1_ID */
> > @@ -1216,7 +1216,7 @@ pinctrl_usb_1_id: usb1idgrp {
> >
> > pinctrl_usb2_vbus: usb2vbusgrp {
> > fsl,pins =
> >
> - <MX8MP_IOMUXC_GPIO1_IO14__USB2
> _OTG_PWR
> > 0x19>; /* SODIMM 185 */
> >
> + <MX8MP_IOMUXC_GPIO1_IO14__USB2
> _PWR
> > +0x19>; /* SODIMM 185 */
> > };
> >
> > /* On-module Wi-Fi */
>
> Cheers
>
> Marcel
prev parent reply other threads:[~2022-08-17 3:25 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-16 7:32 [PATCH] arm64: dts: imx8mp: Update pin function file according to Rev.D RM Jacky Bai
2022-08-16 14:15 ` Marcel Ziswiler
2022-08-17 3:24 ` Jacky Bai [this message]
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