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CTRY:IE; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:64aa7808-outbound-1.mta.getcheckrecipient.com; PTR:ec2-63-35-35-123.eu-west-1.compute.amazonaws.com; CAT:NONE; SFS:(4636009)(136003)(346002)(376002)(396003)(39860400002)(36840700001)(46966006)(82310400003)(336012)(478600001)(86362001)(9686003)(36860700001)(2906002)(47076005)(33656002)(8936002)(70206006)(70586007)(4326008)(966005)(81166007)(110136005)(5660300002)(356005)(52536014)(55016002)(316002)(26005)(186003)(8676002)(6506007)(54906003)(83380400001)(7696005)(82740400003); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2021 13:20:49.2916 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 67145161-a515-45ae-4bd3-08d919ffc0f4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: VE1EUR03FT050.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB6828 Subject: Re: [dpdk-dev] [EXT] Re: [PATCH] config/arm: add ability to express arch extensions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > > > > > > > >> > > > >> >> >> > > > >> >> >> > > > > >> >> >> > The patch still holds true for CRC though as it is listed > > > >> >> >> > separately below > > > >> >> >> > https://urldefense.proofpoint.com/v2/url?u=3Dhttps- > > > >> >> >3A__developer.arm.com_architectures_cpu-2Darchitecture_a- > > > >> >> > > > >>2D&d=3DDwIFAg&c=3DnKjWec2b6R0mOyPaz7xtfQ&r=3DE3SgYMjtKCMVsB- > > > >> >> >fmvgGV3o- > > > >> >> > > > >> > > > >>>g_fjLhk5Pupi9ijohpc&m=3Di3kC8htMiHjXMoJWUn6QlDVZQCblbFrIJyMc > > > >> >W > > > >> >> > > > >> > > > >>>d9nAmM&s=3DfA4SM6O3iC2HXIK1qSbOHzxVeHoYqcfUebEOwioHC7c& > > > >e > > > >> >=3D > > > >> >> >> > profile/exploration-tools/feature-names-for-a-profile > > > >> >> >CRC is mandatory starting in V8.1, refer to Arm-ARM document. > > > >> >> > > > > >> >> >> > > > > >> >> >> > Also, looks like sve2 support in n2 core might be > > > >> >> >> > optional as per > > > >> >> >above doc? > > > >> >> >> I need to check on this. Some of the info here might not be > > > >public > > > >> >yet. > > > >> >> >I found [1]. SVE2 is mandatory feature. > > > >> >> > > > > >> >> > > > >> >> I see thanks for the info I will remove extension from cnxk. > > > >> >> > > > >> >> Do you think the extension infra is still useful for other case= s? i.e. > > > >> >older cores > > > >> >> or cases where vendor wants to enable some extensions by > > > >default? > > > >> >> > > > >> >> I found a document[1] which describes about extensions not > > > >enabled > > > >> >by > > > >> >> default but supported by a given march. > > > >> >> In case of n2 I think memory tagging is one such feature > > > >> >I think the reference is providing a different information than > > > >> >what you are trying to achieve here. > > > >> > > > > >> >It looks like you are trying to address a use case where in the > > > >> >same CPU IP has different features enabled/disabled on different > SoCs. > > > >> >This is a valid use case from crypto perspective (due to export > > > >control > > > >> >reasons) where-in 2 different SoCs might have crypto > > > >enabled/disabled. > > > >> >I am not sure if other features can be enabled/disabled. But, > > > >> >Crypto feature is a good enough reason to address such a use case= . > > > >> > > > >> Yes, that's my intension apologies if the commit log doesn't > > > >> clarify it > > > >properly. > > > >> > > > >> > > > > >> >IMO, we should capture the SoC specific details in SoC specific > > > >> >files, in this case in 'arm64_cn10k_linux_gcc'. I believe there > > > >> >were some challenges in doing this. > > > >> > > > >> Since, all the flags are populated through soc_* variable and > > > >> arm64_cn10k_linux_gcc also translates to soc_cn10k I believe the > > > >extensions > > > >> should be reported through > > > >> soc_* variables. > > > >IMO, there will be more SoCs in the future. I prefer to not grow > > > >meson.build. > > > > > > Problem is native build wouldn't read arm64_*_linux_gcc, it will be > > > really hard to parse it and read extensions if they are placed there. > > > > > Since our minimum meson version for DPDK is >0.49, would native-build > > files[1] for meson offer a solution here? > > >=20 > We need a place to define SoC specific configuration that would be access= ible > to both native and cross builds. A separate file for each SoC would be gr= eat > and I've thought about native files in the past where we'd have: > 1. an SoC specific file such as soc_armada_config 2. a cross file for eac= h > compiler, such as arm64_linux_gcc >=20 > This we'd we could use the first file in native builds (and we wouldn't n= eed the > platform parameter) and we'd use both files in cross builds. >=20 > I have a hazy memory of trying something similar in 0.47.1 (splitting the= cross > file into SoC config and the rest), but it didn't work, both of the files= needed > all of the mandatory sections and I suspect this is still true judging fr= om the > docs (even for the latest Meson). Are we concluding there is no solution? >=20 > > /Bruce > > > > [1] https://mesonbuild.com/Native-environments.html >=20