From mboxrd@z Thu Jan  1 00:00:00 1970
From: Zhiqiang Hou <zhiqiang.hou@nxp.com>
Date: Thu, 19 May 2016 02:35:40 +0000
Subject: [U-Boot] [PATCH v3 6/7] ARMv8/Layerscape: switch SMP method to
 spin-table when the PSCI isn't available
In-Reply-To: <57323D57.7090801@nxp.com>
References: <1461764367-7760-1-git-send-email-Zhiqiang.Hou@nxp.com>
 <1461764367-7760-6-git-send-email-Zhiqiang.Hou@nxp.com>
 <57323D57.7090801@nxp.com>
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To: u-boot@lists.denx.de

Hi York,

Thanks a lot for your comments!

> -----Original Message-----
> From: York Sun [mailto:york.sun at nxp.com]
> Sent: 2016?5?11? 3:58
> To: Zhiqiang Hou <zhiqiang.hou@nxp.com>; u-boot at lists.denx.de;
> albert.u.boot at aribaud.net; scottwood at freescale.com;
> Mingkai.hu at freescale.com; yorksun at freescale.com; leoli at freescale.com;
> prabhakar at freescale.com; bhupesh.sharma at freescale.com
> Subject: Re: [PATCH v3 6/7] ARMv8/Layerscape: switch SMP method to spin-table
> when the PSCI isn't available
> 
> On 04/27/2016 06:50 AM, Zhiqiang Hou wrote:
> > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> >
> > If the PSCI and PPA is ready, skip the fixup for spin-table and waking
> > secondary cores. If not, change SMP method to spin-table, and the
> > device node of PSCI will be removed.
> >
> > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > ---
> > V3:
> >  - new patch
> >
> >  arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 +++++++++++---
> > arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 31
> > +++++++++++++++++++++++++++++++
> >  2 files changed, 42 insertions(+), 3 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > index 672a453..937f7ec 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
> > @@ -23,6 +23,9 @@
> >  #ifdef CONFIG_FSL_ESDHC
> >  #include <fsl_esdhc.h>
> >  #endif
> > +#ifdef CONFIG_FSL_LS_PPA
> > +#include <asm/armv8/sec_firmware.h>
> > +#endif
> >
> >  DECLARE_GLOBAL_DATA_PTR;
> >
> > @@ -625,9 +628,14 @@ int arch_early_init_r(void)  #endif
> >
> >  #ifdef CONFIG_MP
> > -	rv = fsl_layerscape_wake_seconday_cores();
> > -	if (rv)
> > -		printf("Did not wake secondary cores\n");
> > +#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
> > +	if (sec_firmware_validate())
> > +#endif
> > +	{
> > +		rv = fsl_layerscape_wake_seconday_cores();
> > +		if (rv)
> > +			printf("Did not wake secondary cores\n");
> > +	}
> >  #endif
> >
> >  #ifdef CONFIG_SYS_HAS_SERDES
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > index 1e875c4..333b973 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
> > @@ -20,6 +20,9 @@
> >  #ifdef CONFIG_MP
> >  #include <asm/arch/mp.h>
> >  #endif
> > +#ifdef CONFIG_FSL_LS_PPA
> > +#include <asm/armv8/sec_firmware.h>
> > +#endif
> >
> >  int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t
> > phyc)  { @@ -36,7 +39,35 @@ void ft_fixup_cpu(void *blob)
> >  	int addr_cells;
> >  	u64 val, core_id;
> >  	size_t *boot_code_size = &(__secondary_boot_code_size);
> > +#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
> > +	int node;
> > +#endif
> > +
> > +#if defined(CONFIG_FSL_LS_PPA) && defined(CONFIG_ARMV8_PSCI)
> > +	if (sec_firmware_validate()) {
> > +		/* remove psci DT node */
> > +		node = fdt_path_offset(blob, "/psci");
> > +		if (node >= 0)
> > +			goto remove_psci_node;
> > +
> > +		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
> > +		if (node >= 0)
> > +			goto remove_psci_node;
> >
> > +		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
> > +		if (node >= 0)
> > +			goto remove_psci_node;
> > +
> > +		node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
> > +		if (node >= 0)
> > +			goto remove_psci_node;
> > +
> > +remove_psci_node:
> > +		if (node >= 0)
> > +			fdt_del_node(blob, node);
> > +	} else
> > +		return;
> > +#endif
> >  	off = fdt_path_offset(blob, "/cpus");
> >  	if (off < 0) {
> >  		puts("couldn't find /cpus node\n");
> >
> 
> 
> Zhiqiang,
> 
> I think your patch sequence and logic is backward. To make the transition
> smoothly, we need to make sure U-Boot always works. You can introduce PPA
> with PSCI support. After each patch applied, U-Boot should still work. I suggest
> you to check if PPA/PSCI is available before fixing up device tree. You can also
> switch to PSCI to boot secondary cores by then.

Yes, will refactor the patchset according to your suggestion. 

Thanks,
Zhiqiang