From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Kavanagh, Mark B" Subject: Minimum Supported x86 microarchitecture Date: Wed, 15 Apr 2015 15:09:39 +0000 Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable To: "dev-VfR2kkLFssw@public.gmane.org" Return-path: Content-Language: en-US List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces-VfR2kkLFssw@public.gmane.org Sender: "dev" Hi, The recent reimplementation of rte_memcpy in DPDK v2.0.0 seems to have a pl= aced an implicit floor on the microarchitecture/Instruction set supported b= y DPDK. For example, I can't compile head of OVS against DPDK 2.0 with gcc without = passing the 'msse3' flag; this points to an implicit minimum supported CPU= of 'core2'. More discussion on same is available here: http://openvswitch.= org/pipermail/dev/2015-April/053523.html Can anyone confirm or deny this, and is/should it be documented? Thanks in advance, Mark