From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Liu, Jinsong" Subject: Re: [PATCH V4.1] mcheck, vmce: Allow vmce_amd_* functions to handle AMD thresolding MSRs Date: Tue, 18 Feb 2014 11:42:23 +0000 Message-ID: References: <1392247608-6960-1-git-send-email-aravind.gopalakrishnan@amd.com> <530338D5020000780011D258@nat28.tlf.novell.com> <53034BC1020000780011D371@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <53034BC1020000780011D371@nat28.tlf.novell.com> Content-Language: en-US List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: "boris.ostrovsky@oracle.com" , "chegger@amazon.de" , Aravind Gopalakrishnan , "suravee.suthikulpanit@amd.com" , "xen-devel@lists.xen.org" List-Id: xen-devel@lists.xenproject.org Jan Beulich wrote: >>>> On 18.02.14 at 11:52, "Liu, Jinsong" wrote: >>>>> --- a/xen/arch/x86/cpu/mcheck/vmce.c >>>>> +++ b/xen/arch/x86/cpu/mcheck/vmce.c >>>>> @@ -107,7 +107,8 @@ static int bank_mce_rdmsr(const struct vcpu >>>>> *v, uint32_t msr, uint64_t *val) >>>>> >>>>> *val = 0; >>>>> >>>>> - switch ( msr & (MSR_IA32_MC0_CTL | 3) ) >>>>> + /* Allow only first 3 MC banks into switch() */ >> >> I don't think this comments is good here. Remove it is better. > > I had asked for this to be removed again too. I'm really thinking > that V3 is what we should go with. > > Jan V3 is fine, except adding comments for '-MSR_IA32_MC0_CTL' is slightly better. Thanks, Jinsong