From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751533AbeEBLe7 convert rfc822-to-8bit (ORCPT ); Wed, 2 May 2018 07:34:59 -0400 Received: from hermes.aosc.io ([199.195.250.187]:47106 "EHLO hermes.aosc.io" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751377AbeEBLe6 (ORCPT ); Wed, 2 May 2018 07:34:58 -0400 Date: Wed, 02 May 2018 19:34:21 +0800 In-Reply-To: <20180502113250.5i2eyzv237t5oyl6@flea> References: <20180430114058.5061-1-jagan@amarulasolutions.com> <20180430114058.5061-3-jagan@amarulasolutions.com> <20180502113250.5i2eyzv237t5oyl6@flea> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Subject: Re: [linux-sunxi] Re: [PATCH 02/21] arm64: dts: allwinner: a64: Add DE2 CCU To: maxime.ripard@bootlin.com, Maxime Ripard , Jagan Teki CC: Chen-Yu Tsai , Jernej Skrabec , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , David Airlie , dri-devel@lists.freedesktop.org, Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, Michael Trimarchi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com From: Icenowy Zheng Message-ID: Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 于 2018年5月2日 GMT+08:00 下午7:32:50, Maxime Ripard 写到: >On Mon, Apr 30, 2018 at 05:10:39PM +0530, Jagan Teki wrote: >> DE2 in A64 has clock control unit and behavior is >> same like H3/H5, so reuse the same in A64. >> >> Signed-off-by: Jagan Teki >> --- >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++++++++++++++ >> 1 file changed, 15 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> index 1b2ef28c42bd..67b80bbe5bf5 100644 >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> @@ -43,9 +43,11 @@ >> */ >> >> #include >> +#include >> #include >> #include >> #include >> +#include >> >> / { >> interrupt-parent = <&gic>; >> @@ -168,6 +170,19 @@ >> #size-cells = <1>; >> ranges; >> >> + display_clocks: clock@1000000 { >> + compatible = "allwinner,sun50i-a64-de2-clk", >> + "allwinner,sun50i-h5-de2-clk"; > >The A64 was released before the H5, so that should be the other way >around. > >> + reg = <0x01000000 0x100000>; >> + clocks = <&ccu CLK_DE>, >> + <&ccu CLK_BUS_DE>; >> + clock-names = "mod", >> + "bus"; >> + resets = <&ccu RST_BUS_DE>; >> + #clock-cells = <1>; >> + #reset-cells = <1>; >> + }; >> + > >So it turns out we don't need the SRAM to access the CCU driver? As now U-Boot claims SRAM, people may forget thus :-( > >Maxime From mboxrd@z Thu Jan 1 00:00:00 1970 From: Icenowy Zheng Subject: Re: Re: [PATCH 02/21] arm64: dts: allwinner: a64: Add DE2 CCU Date: Wed, 02 May 2018 19:34:21 +0800 Message-ID: References: <20180430114058.5061-1-jagan@amarulasolutions.com> <20180430114058.5061-3-jagan@amarulasolutions.com> <20180502113250.5i2eyzv237t5oyl6@flea> Reply-To: icenowy-h8G6r0blFSE@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: <20180502113250.5i2eyzv237t5oyl6@flea> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.orgMaxime Ripard , Jagan Teki Cc: Chen-Yu Tsai , Jernej Skrabec , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , David Airlie , dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Michael Turquette , Stephen Boyd , linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Michael Trimarchi , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org =E4=BA=8E 2018=E5=B9=B45=E6=9C=882=E6=97=A5 GMT+08:00 =E4=B8=8B=E5=8D=887:3= 2:50, Maxime Ripard =E5=86=99=E5=88=B0: >On Mon, Apr 30, 2018 at 05:10:39PM +0530, Jagan Teki wrote: >> DE2 in A64 has clock control unit and behavior is >> same like H3/H5, so reuse the same in A64. >>=20 >> Signed-off-by: Jagan Teki >> --- >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++++++++++++++ >> 1 file changed, 15 insertions(+) >>=20 >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> index 1b2ef28c42bd..67b80bbe5bf5 100644 >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> @@ -43,9 +43,11 @@ >> */ >> =20 >> #include >> +#include >> #include >> #include >> #include >> +#include >> =20 >> / { >> interrupt-parent =3D <&gic>; >> @@ -168,6 +170,19 @@ >> #size-cells =3D <1>; >> ranges; >> =20 >> + display_clocks: clock@1000000 { >> + compatible =3D "allwinner,sun50i-a64-de2-clk", >> + "allwinner,sun50i-h5-de2-clk"; > >The A64 was released before the H5, so that should be the other way >around. > >> + reg =3D <0x01000000 0x100000>; >> + clocks =3D <&ccu CLK_DE>, >> + <&ccu CLK_BUS_DE>; >> + clock-names =3D "mod", >> + "bus"; >> + resets =3D <&ccu RST_BUS_DE>; >> + #clock-cells =3D <1>; >> + #reset-cells =3D <1>; >> + }; >> + > >So it turns out we don't need the SRAM to access the CCU driver? As now U-Boot claims SRAM, people may forget thus :-( > >Maxime --=20 You received this message because you are subscribed to the Google Groups "= linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an e= mail to linux-sunxi+unsubscribe-/JYPxA39Uh5TLH3MbocFF+G/Ez6ZCGd0@public.gmane.org For more options, visit https://groups.google.com/d/optout. From mboxrd@z Thu Jan 1 00:00:00 1970 From: icenowy@aosc.io (Icenowy Zheng) Date: Wed, 02 May 2018 19:34:21 +0800 Subject: [linux-sunxi] Re: [PATCH 02/21] arm64: dts: allwinner: a64: Add DE2 CCU In-Reply-To: <20180502113250.5i2eyzv237t5oyl6@flea> References: <20180430114058.5061-1-jagan@amarulasolutions.com> <20180430114058.5061-3-jagan@amarulasolutions.com> <20180502113250.5i2eyzv237t5oyl6@flea> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org ? 2018?5?2? GMT+08:00 ??7:32:50, Maxime Ripard ??: >On Mon, Apr 30, 2018 at 05:10:39PM +0530, Jagan Teki wrote: >> DE2 in A64 has clock control unit and behavior is >> same like H3/H5, so reuse the same in A64. >> >> Signed-off-by: Jagan Teki >> --- >> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 +++++++++++++++ >> 1 file changed, 15 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> index 1b2ef28c42bd..67b80bbe5bf5 100644 >> --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi >> @@ -43,9 +43,11 @@ >> */ >> >> #include >> +#include >> #include >> #include >> #include >> +#include >> >> / { >> interrupt-parent = <&gic>; >> @@ -168,6 +170,19 @@ >> #size-cells = <1>; >> ranges; >> >> + display_clocks: clock at 1000000 { >> + compatible = "allwinner,sun50i-a64-de2-clk", >> + "allwinner,sun50i-h5-de2-clk"; > >The A64 was released before the H5, so that should be the other way >around. > >> + reg = <0x01000000 0x100000>; >> + clocks = <&ccu CLK_DE>, >> + <&ccu CLK_BUS_DE>; >> + clock-names = "mod", >> + "bus"; >> + resets = <&ccu RST_BUS_DE>; >> + #clock-cells = <1>; >> + #reset-cells = <1>; >> + }; >> + > >So it turns out we don't need the SRAM to access the CCU driver? As now U-Boot claims SRAM, people may forget thus :-( > >Maxime