From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752686AbcHQNP1 convert rfc822-to-8bit (ORCPT ); Wed, 17 Aug 2016 09:15:27 -0400 Received: from vegas.theobroma-systems.com ([144.76.126.164]:33676 "EHLO mail.theobroma-systems.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751550AbcHQNPZ (ORCPT ); Wed, 17 Aug 2016 09:15:25 -0400 X-Greylist: delayed 1194 seconds by postgrey-1.27 at vger.kernel.org; Wed, 17 Aug 2016 09:15:25 EDT Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 8.2 \(2104\)) Subject: Re: [RFC2 nowrap: PATCH v7 00/18] ILP32 for ARM64 From: "Dr. Philipp Tomsich" In-Reply-To: <20160817124822.GA25751@yury-N73SV> Date: Wed, 17 Aug 2016 14:54:59 +0200 Cc: Alexander Graf , Arnd Bergmann , Catalin Marinas , linux-arm-kernel , LKML , linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Martin Schwidefsky , heiko.carstens@de.ibm.com, Andrew Pinski , broonie@kernel.org, "Joseph S. Myers" , =?utf-8?Q?Christoph_M=C3=BCllner?= , "Zhangjian (Bamvor)" , szabolcs.nagy@arm.com, Alexey Klimov , Nathan Lynch , "Kapoor, Prasun" , kilobyte@angband.pl, geert@linux-m68k.org, manuel.montezelo@gmail.com, linyongting@huawei.com, maxim.kuvyrkov@linaro.org, davem@davemloft.net, zhouchengming1@huawei.com, cmetcalf@ezchip.com Content-Transfer-Encoding: 8BIT Message-Id: References: <1471434403-25291-1-git-send-email-ynorov@caviumnetworks.com> <175AE090-EDA7-4A8D-9044-3FFA74AC1903@suse.de> <20160817124822.GA25751@yury-N73SV> To: Yury Norov X-Mailer: Apple Mail (2.2104) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On 17 Aug 2016, at 14:48, Yury Norov wrote: > > On Wed, Aug 17, 2016 at 02:28:50PM +0200, Alexander Graf wrote: >> >>> On 17 Aug 2016, at 13:46, Yury Norov wrote: >>> >>> This series enables aarch64 with ilp32 mode, and as supporting work, >>> introduces ARCH_32BIT_OFF_T configuration option that is enabled for >>> existing 32-bit architectures but disabled for new arches (so 64-bit >>> off_t is is used by new userspace). >>> >>> This version is based on kernel v4.8-rc2. >>> It works with glibc-2.23, and tested with LTP. >>> >>> This is RFC because there is still no solid understanding what type of registers >>> top-halves delousing we prefer. In this patchset, w0-w7 are cleared for each >>> syscall in assembler entry. The alternative approach is in introducing compat >>> wrappers which is little faster for natively routed syscalls (~2.6% for syscall >>> with no payload) but much more complicated. >> >> So you’re saying there are 2 options: >> >> 1) easy to get right, slightly slower, same ABI to user space as 2 >> 2) harder to get right, minor performance benefit > > No, ABI is little different. If 1) we pass off_t in a pair to syscalls, > if 2) - in a single register. So if 1, we 'd take some wrappers from aarch32. > See patch 12 here. >>From our experience with ILP32, I’d prefer to have off_t (and similar) in a single register whenever possible (i.e. option #2). It feels more natural to use the full 64bit registers whenever possible, as ILP32 on ARMv8 should really be understood as a 64bit ABI with a 32bit memory model. Cheers, Philipp. From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Dr. Philipp Tomsich" Subject: Re: [RFC2 nowrap: PATCH v7 00/18] ILP32 for ARM64 Date: Wed, 17 Aug 2016 14:54:59 +0200 Message-ID: References: <1471434403-25291-1-git-send-email-ynorov@caviumnetworks.com> <175AE090-EDA7-4A8D-9044-3FFA74AC1903@suse.de> <20160817124822.GA25751@yury-N73SV> Mime-Version: 1.0 (Mac OS X Mail 8.2 \(2104\)) Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Return-path: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org In-Reply-To: <20160817124822.GA25751@yury-N73SV> To: Yury Norov Cc: Alexander Graf , Arnd Bergmann , Catalin Marinas , linux-arm-kernel , LKML , linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Martin Schwidefsky , heiko.carstens@de.ibm.com, Andrew Pinski , broonie@kernel.org, "Joseph S. Myers" , =?utf-8?Q?Christoph_M=C3=BCllner?= , "Zhangjian (Bamvor)" , szabolcs.nagy@arm.com, Alexey Klimov , Nathan Lynch , "Kapoor, Prasun" , kilobyte@angband.pl, geert@linux-m68k.org, manuel.montezelo@gmail.com, linyongting@huawei.com, maxim.kuvyrkov@linaro.org, davem@dav List-Id: linux-arch.vger.kernel.org > On 17 Aug 2016, at 14:48, Yury Norov = wrote: >=20 > On Wed, Aug 17, 2016 at 02:28:50PM +0200, Alexander Graf wrote: >>=20 >>> On 17 Aug 2016, at 13:46, Yury Norov = wrote: >>>=20 >>> This series enables aarch64 with ilp32 mode, and as supporting work, >>> introduces ARCH_32BIT_OFF_T configuration option that is enabled for >>> existing 32-bit architectures but disabled for new arches (so 64-bit >>> off_t is is used by new userspace). >>>=20 >>> This version is based on kernel v4.8-rc2. >>> It works with glibc-2.23, and tested with LTP. >>>=20 >>> This is RFC because there is still no solid understanding what type = of registers >>> top-halves delousing we prefer. In this patchset, w0-w7 are cleared = for each >>> syscall in assembler entry. The alternative approach is in = introducing compat >>> wrappers which is little faster for natively routed syscalls (~2.6% = for syscall >>> with no payload) but much more complicated. >>=20 >> So you=E2=80=99re saying there are 2 options: >>=20 >> 1) easy to get right, slightly slower, same ABI to user space as 2 >> 2) harder to get right, minor performance benefit >=20 > No, ABI is little different. If 1) we pass off_t in a pair to = syscalls, > if 2) - in a single register. So if 1, we 'd take some wrappers from = aarch32. > See patch 12 here. =46rom our experience with ILP32, I=E2=80=99d prefer to have off_t (and = similar) in a single register whenever possible (i.e. option #2). It feels more natural to use the = full 64bit registers=20 whenever possible, as ILP32 on ARMv8 should really be understood as a = 64bit ABI with=20 a 32bit memory model. Cheers, Philipp.= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from vegas.theobroma-systems.com ([144.76.126.164]:33676 "EHLO mail.theobroma-systems.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751550AbcHQNPZ (ORCPT ); Wed, 17 Aug 2016 09:15:25 -0400 Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 8.2 \(2104\)) Subject: Re: [RFC2 nowrap: PATCH v7 00/18] ILP32 for ARM64 From: "Dr. Philipp Tomsich" In-Reply-To: <20160817124822.GA25751@yury-N73SV> Date: Wed, 17 Aug 2016 14:54:59 +0200 Content-Transfer-Encoding: 8BIT Message-ID: References: <1471434403-25291-1-git-send-email-ynorov@caviumnetworks.com> <175AE090-EDA7-4A8D-9044-3FFA74AC1903@suse.de> <20160817124822.GA25751@yury-N73SV> Sender: linux-arch-owner@vger.kernel.org List-ID: To: Yury Norov Cc: Alexander Graf , Arnd Bergmann , Catalin Marinas , linux-arm-kernel , LKML , linux-doc@vger.kernel.org, linux-arch@vger.kernel.org, libc-alpha@sourceware.org, Martin Schwidefsky , heiko.carstens@de.ibm.com, Andrew Pinski , broonie@kernel.org, "Joseph S. Myers" , =?utf-8?Q?Christoph_M=C3=BCllner?= , "Zhangjian (Bamvor)" , szabolcs.nagy@arm.com, Alexey Klimov , Nathan Lynch , "Kapoor, Prasun" , kilobyte@angband.pl, geert@linux-m68k.org, manuel.montezelo@gmail.com, linyongting@huawei.com, maxim.kuvyrkov@linaro.org, davem@davemloft.net, zhouchengming1@huawei.com, cmetcalf@ezchip.com Message-ID: <20160817125459.aUIdYKmpL9nIUfG2v_aCL0Mbi_bv2ElIyVMjlFti19g@z> > On 17 Aug 2016, at 14:48, Yury Norov wrote: > > On Wed, Aug 17, 2016 at 02:28:50PM +0200, Alexander Graf wrote: >> >>> On 17 Aug 2016, at 13:46, Yury Norov wrote: >>> >>> This series enables aarch64 with ilp32 mode, and as supporting work, >>> introduces ARCH_32BIT_OFF_T configuration option that is enabled for >>> existing 32-bit architectures but disabled for new arches (so 64-bit >>> off_t is is used by new userspace). >>> >>> This version is based on kernel v4.8-rc2. >>> It works with glibc-2.23, and tested with LTP. >>> >>> This is RFC because there is still no solid understanding what type of registers >>> top-halves delousing we prefer. In this patchset, w0-w7 are cleared for each >>> syscall in assembler entry. The alternative approach is in introducing compat >>> wrappers which is little faster for natively routed syscalls (~2.6% for syscall >>> with no payload) but much more complicated. >> >> So you’re saying there are 2 options: >> >> 1) easy to get right, slightly slower, same ABI to user space as 2 >> 2) harder to get right, minor performance benefit > > No, ABI is little different. If 1) we pass off_t in a pair to syscalls, > if 2) - in a single register. So if 1, we 'd take some wrappers from aarch32. > See patch 12 here. From mboxrd@z Thu Jan 1 00:00:00 1970 From: philipp.tomsich@theobroma-systems.com (Dr. Philipp Tomsich) Date: Wed, 17 Aug 2016 14:54:59 +0200 Subject: [RFC2 nowrap: PATCH v7 00/18] ILP32 for ARM64 In-Reply-To: <20160817124822.GA25751@yury-N73SV> References: <1471434403-25291-1-git-send-email-ynorov@caviumnetworks.com> <175AE090-EDA7-4A8D-9044-3FFA74AC1903@suse.de> <20160817124822.GA25751@yury-N73SV> Message-ID: To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org > On 17 Aug 2016, at 14:48, Yury Norov wrote: > > On Wed, Aug 17, 2016 at 02:28:50PM +0200, Alexander Graf wrote: >> >>> On 17 Aug 2016, at 13:46, Yury Norov wrote: >>> >>> This series enables aarch64 with ilp32 mode, and as supporting work, >>> introduces ARCH_32BIT_OFF_T configuration option that is enabled for >>> existing 32-bit architectures but disabled for new arches (so 64-bit >>> off_t is is used by new userspace). >>> >>> This version is based on kernel v4.8-rc2. >>> It works with glibc-2.23, and tested with LTP. >>> >>> This is RFC because there is still no solid understanding what type of registers >>> top-halves delousing we prefer. In this patchset, w0-w7 are cleared for each >>> syscall in assembler entry. The alternative approach is in introducing compat >>> wrappers which is little faster for natively routed syscalls (~2.6% for syscall >>> with no payload) but much more complicated. >> >> So you?re saying there are 2 options: >> >> 1) easy to get right, slightly slower, same ABI to user space as 2 >> 2) harder to get right, minor performance benefit > > No, ABI is little different. If 1) we pass off_t in a pair to syscalls, > if 2) - in a single register. So if 1, we 'd take some wrappers from aarch32. > See patch 12 here. >>From our experience with ILP32, I?d prefer to have off_t (and similar) in a single register whenever possible (i.e. option #2). It feels more natural to use the full 64bit registers whenever possible, as ILP32 on ARMv8 should really be understood as a 64bit ABI with a 32bit memory model. Cheers, Philipp.