* [PULL 01/25] hw/arm/bcm2836: Remove unused 'cpu_type' field
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 02/25] target/arm: Fix mtedesc for do_mem_zpz Peter Maydell
` (24 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
The 'cpu_type' has been moved from BCM283XState to BCM283XClass
in commit 210f47840d, but we forgot to remove the old variable.
Do it now.
Fixes: 210f47840d ("hw/arm/bcm2836: Hardcode correct CPU type")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20200703200459.23294-1-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/bcm2836.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/hw/arm/bcm2836.h b/include/hw/arm/bcm2836.h
index 024af8aae4f..79dfff9d734 100644
--- a/include/hw/arm/bcm2836.h
+++ b/include/hw/arm/bcm2836.h
@@ -33,7 +33,6 @@ typedef struct BCM283XState {
DeviceState parent_obj;
/*< public >*/
- char *cpu_type;
uint32_t enabled_cpus;
struct {
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 02/25] target/arm: Fix mtedesc for do_mem_zpz
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
2020-07-13 14:10 ` [PULL 01/25] hw/arm/bcm2836: Remove unused 'cpu_type' field Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 03/25] Add the ability to change the FEC PHY MDIO device number on i.MX25 processor Peter Maydell
` (23 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Richard Henderson <richard.henderson@linaro.org>
The mtedesc that was constructed was not actually passed in.
Found by Coverity (CID 1429996).
Fixes: d28d12f008e
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200706202345.193676-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-sve.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 08f0fd15b28..88a2fb271d1 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -5275,7 +5275,7 @@ static void do_mem_zpz(DisasContext *s, int zt, int pg, int zm,
desc = FIELD_DP32(desc, MTEDESC, ESIZE, 1 << msz);
desc <<= SVE_MTEDESC_SHIFT;
}
- desc = simd_desc(vsz, vsz, scale);
+ desc = simd_desc(vsz, vsz, desc | scale);
t_desc = tcg_const_i32(desc);
tcg_gen_addi_ptr(t_pg, cpu_env, pred_full_reg_offset(s, pg));
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 03/25] Add the ability to change the FEC PHY MDIO device number on i.MX25 processor
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
2020-07-13 14:10 ` [PULL 01/25] hw/arm/bcm2836: Remove unused 'cpu_type' field Peter Maydell
2020-07-13 14:10 ` [PULL 02/25] target/arm: Fix mtedesc for do_mem_zpz Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 04/25] Add the ability to change the FEC PHY MDIO device number on i.MX6 processor Peter Maydell
` (22 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Jean-Christophe Dubois <jcd@tribudubois.net>
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: 9f8923ecd974160ae8f634c275b1100c2cbe66d7.1593806826.git.jcd@tribudubois.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: updated for object_property_set_uint() argument reordering]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/fsl-imx25.h | 1 +
hw/arm/fsl-imx25.c | 7 +++++++
2 files changed, 8 insertions(+)
diff --git a/include/hw/arm/fsl-imx25.h b/include/hw/arm/fsl-imx25.h
index 9e228daceae..54ee1bfd780 100644
--- a/include/hw/arm/fsl-imx25.h
+++ b/include/hw/arm/fsl-imx25.h
@@ -65,6 +65,7 @@ typedef struct FslIMX25State {
MemoryRegion rom[2];
MemoryRegion iram;
MemoryRegion iram_alias;
+ uint32_t phy_num;
} FslIMX25State;
/**
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index b4ddceae45a..08a98f828fc 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -171,6 +171,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
epit_table[i].irq));
}
+ object_property_set_uint(OBJECT(&s->fec), "phy-num", s->phy_num, &err);
qdev_set_nic_properties(DEVICE(&s->fec), &nd_table[0]);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->fec), errp)) {
@@ -315,10 +316,16 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
&s->iram_alias);
}
+static Property fsl_imx25_properties[] = {
+ DEFINE_PROP_UINT32("fec-phy-num", FslIMX25State, phy_num, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void fsl_imx25_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
+ device_class_set_props(dc, fsl_imx25_properties);
dc->realize = fsl_imx25_realize;
dc->desc = "i.MX25 SOC";
/*
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 04/25] Add the ability to change the FEC PHY MDIO device number on i.MX6 processor
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (2 preceding siblings ...)
2020-07-13 14:10 ` [PULL 03/25] Add the ability to change the FEC PHY MDIO device number on i.MX25 processor Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 05/25] Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor Peter Maydell
` (21 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Jean-Christophe Dubois <jcd@tribudubois.net>
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: 05a64e83eb1c0c865ac077b22c599425c024c02c.1593806826.git.jcd@tribudubois.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: updated for object_property_set_uint() argument reordering]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/fsl-imx6.h | 1 +
hw/arm/fsl-imx6.c | 7 +++++++
2 files changed, 8 insertions(+)
diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
index 1ebd7513246..162fe99375d 100644
--- a/include/hw/arm/fsl-imx6.h
+++ b/include/hw/arm/fsl-imx6.h
@@ -73,6 +73,7 @@ typedef struct FslIMX6State {
MemoryRegion caam;
MemoryRegion ocram;
MemoryRegion ocram_alias;
+ uint32_t phy_num;
} FslIMX6State;
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 0bc9f0b60d1..00dafe3f62d 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -377,6 +377,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
spi_table[i].irq));
}
+ object_property_set_uint(OBJECT(&s->eth), "phy-num", s->phy_num, &err);
qdev_set_nic_properties(DEVICE(&s->eth), &nd_table[0]);
if (!sysbus_realize(SYS_BUS_DEVICE(&s->eth), errp)) {
return;
@@ -449,10 +450,16 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
&s->ocram_alias);
}
+static Property fsl_imx6_properties[] = {
+ DEFINE_PROP_UINT32("fec-phy-num", FslIMX6State, phy_num, 0),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void fsl_imx6_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
+ device_class_set_props(dc, fsl_imx6_properties);
dc->realize = fsl_imx6_realize;
dc->desc = "i.MX6 SOC";
/* Reason: Uses serial_hd() in the realize() function */
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 05/25] Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (3 preceding siblings ...)
2020-07-13 14:10 ` [PULL 04/25] Add the ability to change the FEC PHY MDIO device number on i.MX6 processor Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 06/25] target/arm: Don't do raw writes for PMINTENCLR Peter Maydell
` (20 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Jean-Christophe Dubois <jcd@tribudubois.net>
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Message-id: c850187322be9930e47c8b234c385a7d0da245cb.1593806826.git.jcd@tribudubois.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: updated for object_property_set_uint() argument reordering]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/arm/fsl-imx7.h | 1 +
hw/arm/fsl-imx7.c | 9 +++++++++
2 files changed, 10 insertions(+)
diff --git a/include/hw/arm/fsl-imx7.h b/include/hw/arm/fsl-imx7.h
index da977f9ffb4..ad889237077 100644
--- a/include/hw/arm/fsl-imx7.h
+++ b/include/hw/arm/fsl-imx7.h
@@ -81,6 +81,7 @@ typedef struct FslIMX7State {
IMX7GPRState gpr;
ChipideaState usb[FSL_IMX7_NUM_USBS];
DesignwarePCIEHost pcie;
+ uint32_t phy_num[FSL_IMX7_NUM_ETHS];
} FslIMX7State;
enum FslIMX7MemoryMap {
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index fad637d3288..2ff2cab9246 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -363,6 +363,8 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
FSL_IMX7_ENET2_ADDR,
};
+ object_property_set_uint(OBJECT(&s->eth[i]), "phy-num",
+ s->phy_num[i], &error_abort);
object_property_set_uint(OBJECT(&s->eth[i]), "tx-ring-num",
FSL_IMX7_ETH_NUM_TX_RINGS, &error_abort);
qdev_set_nic_properties(DEVICE(&s->eth[i]), &nd_table[i]);
@@ -550,10 +552,17 @@ static void fsl_imx7_realize(DeviceState *dev, Error **errp)
FSL_IMX7_PCIE_PHY_SIZE);
}
+static Property fsl_imx7_properties[] = {
+ DEFINE_PROP_UINT32("fec1-phy-num", FslIMX7State, phy_num[0], 0),
+ DEFINE_PROP_UINT32("fec2-phy-num", FslIMX7State, phy_num[1], 1),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
static void fsl_imx7_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
+ device_class_set_props(dc, fsl_imx7_properties);
dc->realize = fsl_imx7_realize;
/* Reason: Uses serial_hds and nd_table in realize() directly */
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 06/25] target/arm: Don't do raw writes for PMINTENCLR
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (4 preceding siblings ...)
2020-07-13 14:10 ` [PULL 05/25] Add the ability to change the FEC PHY MDIO devices numbers on i.MX7 processor Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 07/25] virtio-iommu: Fix coverity issue in virtio_iommu_handle_command() Peter Maydell
` (19 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Aaron Lindsay <aaron@os.amperecomputing.com>
Raw writes to this register when in KVM mode can cause interrupts to be
raised (even when the PMU is disabled). Because the underlying state is
already aliased to PMINTENSET (which already provides raw write
functions), we can safely disable raw accesses to PMINTENCLR entirely.
Signed-off-by: Aaron Lindsay <aaron@os.amperecomputing.com>
Message-id: 20200707152616.1917154-1-aaron@os.amperecomputing.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index dc9c29f998f..c69a2baf1d3 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -2269,13 +2269,13 @@ static const ARMCPRegInfo v7_cp_reginfo[] = {
.resetvalue = 0x0 },
{ .name = "PMINTENCLR", .cp = 15, .crn = 9, .crm = 14, .opc1 = 0, .opc2 = 2,
.access = PL1_RW, .accessfn = access_tpm,
- .type = ARM_CP_ALIAS | ARM_CP_IO,
+ .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
.writefn = pmintenclr_write, },
{ .name = "PMINTENCLR_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 9, .crm = 14, .opc2 = 2,
.access = PL1_RW, .accessfn = access_tpm,
- .type = ARM_CP_ALIAS | ARM_CP_IO,
+ .type = ARM_CP_ALIAS | ARM_CP_IO | ARM_CP_NO_RAW,
.fieldoffset = offsetof(CPUARMState, cp15.c9_pminten),
.writefn = pmintenclr_write },
{ .name = "CCSIDR", .state = ARM_CP_STATE_BOTH,
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 07/25] virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (5 preceding siblings ...)
2020-07-13 14:10 ` [PULL 06/25] target/arm: Don't do raw writes for PMINTENCLR Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 08/25] build: Enable BSD symbols for Haiku Peter Maydell
` (18 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Eric Auger <eric.auger@redhat.com>
Coverity points out (CID 1430180) that the new case is missing
break or a /* fallthrough */ comment. Break is the right thing to
do as in that case, tail is not used.
Fixes 1733eebb9e ("virtio-iommu: Implement RESV_MEM probe request")
Signed-off-by: Eric Auger <eric.auger@redhat.com>
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200708160147.18426-1-eric.auger@redhat.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/virtio/virtio-iommu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
index b39e836181e..5d56865e569 100644
--- a/hw/virtio/virtio-iommu.c
+++ b/hw/virtio/virtio-iommu.c
@@ -534,6 +534,7 @@ static void virtio_iommu_handle_command(VirtIODevice *vdev, VirtQueue *vq)
ptail = (struct virtio_iommu_req_tail *)
(buf + s->config.probe_size);
ptail->status = virtio_iommu_handle_probe(s, iov, iov_cnt, buf);
+ break;
}
default:
tail.status = VIRTIO_IOMMU_S_UNSUPP;
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 08/25] build: Enable BSD symbols for Haiku
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (6 preceding siblings ...)
2020-07-13 14:10 ` [PULL 07/25] virtio-iommu: Fix coverity issue in virtio_iommu_handle_command() Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 09/25] util/qemu-openpty.c: Don't assume pty.h is glibc-only Peter Maydell
` (17 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: David CARLIER <devnexen@gmail.com>
Tell Haiku to provide various BSD functions by setting BSD_SOURCE
and linking libbsd.
Signed-off-by: David Carlier <devnexen@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200703145614.16684-2-peter.maydell@linaro.org
[PMM: expanded commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
configure | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/configure b/configure
index 9b6ab9d3ca3..c70b43d1394 100755
--- a/configure
+++ b/configure
@@ -904,8 +904,8 @@ SunOS)
;;
Haiku)
haiku="yes"
- QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS $QEMU_CFLAGS"
- LIBS="-lposix_error_mapper -lnetwork $LIBS"
+ QEMU_CFLAGS="-DB_USE_POSITIVE_POSIX_ERRORS -DBSD_SOURCE $QEMU_CFLAGS"
+ LIBS="-lposix_error_mapper -lnetwork -lbsd $LIBS"
;;
Linux)
audio_drv_list="try-pa oss"
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 09/25] util/qemu-openpty.c: Don't assume pty.h is glibc-only
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (7 preceding siblings ...)
2020-07-13 14:10 ` [PULL 08/25] build: Enable BSD symbols for Haiku Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 10/25] build: Check that mlockall() exists Peter Maydell
` (16 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: David CARLIER <devnexen@gmail.com>
Instead of using an OS-specific ifdef test to select the "openpty()
is in pty.h" codepath, make configure check for the existence of
the header and use the new CONFIG_PTY instead.
This is necessary to build on Haiku, which also provides openpty()
via pty.h.
Signed-off-by: David Carlier <devnexen@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200703145614.16684-3-peter.maydell@linaro.org
[PMM: Expanded commit message; rename to HAVE_PTY_H]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
configure | 9 +++++++++
util/qemu-openpty.c | 2 +-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/configure b/configure
index c70b43d1394..978505611b1 100755
--- a/configure
+++ b/configure
@@ -2402,6 +2402,12 @@ else
l2tpv3=no
fi
+if check_include "pty.h" ; then
+ pty_h=yes
+else
+ pty_h=no
+fi
+
#########################################
# vhost interdependencies and host support
@@ -7893,6 +7899,9 @@ fi
if test "$sheepdog" = "yes" ; then
echo "CONFIG_SHEEPDOG=y" >> $config_host_mak
fi
+if test "$pty_h" = "yes" ; then
+ echo "HAVE_PTY_H=y" >> $config_host_mak
+fi
if test "$fuzzing" = "yes" ; then
if test "$have_fuzzer" = "yes"; then
FUZZ_LDFLAGS=" -fsanitize=address,fuzzer"
diff --git a/util/qemu-openpty.c b/util/qemu-openpty.c
index 4b8df96f383..eb17f5b0bce 100644
--- a/util/qemu-openpty.c
+++ b/util/qemu-openpty.c
@@ -35,7 +35,7 @@
#include "qemu/osdep.h"
#include "qemu-common.h"
-#if defined(__GLIBC__)
+#if defined HAVE_PTY_H
# include <pty.h>
#elif defined CONFIG_BSD
# include <termios.h>
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 10/25] build: Check that mlockall() exists
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (8 preceding siblings ...)
2020-07-13 14:10 ` [PULL 09/25] util/qemu-openpty.c: Don't assume pty.h is glibc-only Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 11/25] osdep.h: Always include <sys/signal.h> if it exists Peter Maydell
` (15 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: David CARLIER <devnexen@gmail.com>
Instead of assuming that all POSIX platforms provide mlockall(),
test for it in configure. If the host doesn't provide this platform
then os_mlock() will fail -ENOSYS, as it does already on Windows.
This is necessary for Haiku, which does not have mlockall().
Signed-off-by: David Carlier <devnexen@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200703145614.16684-4-peter.maydell@linaro.org
[PMM: Expanded commit message; rename to HAVE_MLOCKALL]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
configure | 15 +++++++++++++++
os-posix.c | 4 ++++
2 files changed, 19 insertions(+)
diff --git a/configure b/configure
index 978505611b1..429c938708e 100755
--- a/configure
+++ b/configure
@@ -2408,6 +2408,18 @@ else
pty_h=no
fi
+cat > $TMPC <<EOF
+#include <sys/mman.h>
+int main(int argc, char *argv[]) {
+ return mlockall(MCL_FUTURE);
+}
+EOF
+if compile_prog "" "" ; then
+ have_mlockall=yes
+else
+ have_mlockall=no
+fi
+
#########################################
# vhost interdependencies and host support
@@ -7902,6 +7914,9 @@ fi
if test "$pty_h" = "yes" ; then
echo "HAVE_PTY_H=y" >> $config_host_mak
fi
+if test "$have_mlockall" = "yes" ; then
+ echo "HAVE_MLOCKALL=y" >> $config_host_mak
+fi
if test "$fuzzing" = "yes" ; then
if test "$have_fuzzer" = "yes"; then
FUZZ_LDFLAGS=" -fsanitize=address,fuzzer"
diff --git a/os-posix.c b/os-posix.c
index 3cd52e1e700..b674b20b1b1 100644
--- a/os-posix.c
+++ b/os-posix.c
@@ -337,6 +337,7 @@ bool is_daemonized(void)
int os_mlock(void)
{
+#ifdef HAVE_MLOCKALL
int ret = 0;
ret = mlockall(MCL_CURRENT | MCL_FUTURE);
@@ -345,4 +346,7 @@ int os_mlock(void)
}
return ret;
+#else
+ return -ENOSYS;
+#endif
}
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 11/25] osdep.h: Always include <sys/signal.h> if it exists
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (9 preceding siblings ...)
2020-07-13 14:10 ` [PULL 10/25] build: Check that mlockall() exists Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 12/25] osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL Peter Maydell
` (14 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: David CARLIER <devnexen@gmail.com>
Regularize our handling of <sys/signal.h>: currently we include it in
osdep.h, but only for OpenBSD, and we include it without an ifdef
guard in a couple of C files. This causes problems for Haiku, which
doesn't have that header.
Instead, check in configure whether sys/signal.h exists, and if it
does then always include it from osdep.h.
Signed-off-by: David Carlier <devnexen@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200703145614.16684-5-peter.maydell@linaro.org
[PMM: Expanded commit message; rename to HAVE_SYS_SIGNAL_H]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
configure | 10 ++++++++++
include/qemu/osdep.h | 2 +-
hw/xen/xen-legacy-backend.c | 1 -
util/oslib-posix.c | 1 -
4 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
index 429c938708e..bc3b9ad9317 100755
--- a/configure
+++ b/configure
@@ -3244,6 +3244,13 @@ if check_include "libdrm/drm.h" ; then
have_drm_h=yes
fi
+#########################################
+# sys/signal.h check
+have_sys_signal_h=no
+if check_include "sys/signal.h" ; then
+ have_sys_signal_h=yes
+fi
+
##########################################
# VTE probe
@@ -7433,6 +7440,9 @@ fi
if test "$have_openpty" = "yes" ; then
echo "HAVE_OPENPTY=y" >> $config_host_mak
fi
+if test "$have_sys_signal_h" = "yes" ; then
+ echo "HAVE_SYS_SIGNAL_H=y" >> $config_host_mak
+fi
# Work around a system header bug with some kernel/XFS header
# versions where they both try to define 'struct fsxattr':
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 0fc206ae615..14059bce5a7 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -104,7 +104,7 @@ extern int daemon(int, int);
#include <setjmp.h>
#include <signal.h>
-#ifdef __OpenBSD__
+#ifdef HAVE_SYS_SIGNAL_H
#include <sys/signal.h>
#endif
diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c
index 083d8dc1b28..b61a4855b7b 100644
--- a/hw/xen/xen-legacy-backend.c
+++ b/hw/xen/xen-legacy-backend.c
@@ -23,7 +23,6 @@
*/
#include "qemu/osdep.h"
-#include <sys/signal.h>
#include "hw/sysbus.h"
#include "hw/boards.h"
diff --git a/util/oslib-posix.c b/util/oslib-posix.c
index 39ddc77c85b..7ad9195c445 100644
--- a/util/oslib-posix.c
+++ b/util/oslib-posix.c
@@ -38,7 +38,6 @@
#include "qemu/sockets.h"
#include "qemu/thread.h"
#include <libgen.h>
-#include <sys/signal.h>
#include "qemu/cutils.h"
#ifdef CONFIG_LINUX
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 12/25] osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (10 preceding siblings ...)
2020-07-13 14:10 ` [PULL 11/25] osdep.h: Always include <sys/signal.h> if it exists Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 13/25] bswap.h: Include <endian.h> on Haiku for bswap operations Peter Maydell
` (13 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: David CARLIER <devnexen@gmail.com>
Haiku doesn't provide SIGIO; fix this up in osdep.h by defining it as
equal to SIGPOLL.
Signed-off-by: David Carlier <devnexen@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200703145614.16684-6-peter.maydell@linaro.org
[PMM: Expanded commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/qemu/osdep.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/include/qemu/osdep.h b/include/qemu/osdep.h
index 14059bce5a7..979a4039841 100644
--- a/include/qemu/osdep.h
+++ b/include/qemu/osdep.h
@@ -432,6 +432,10 @@ void qemu_anon_ram_free(void *ptr, size_t size);
#define HAVE_CHARDEV_PARPORT 1
#endif
+#if defined(__HAIKU__)
+#define SIGIO SIGPOLL
+#endif
+
#if defined(CONFIG_LINUX)
#ifndef BUS_MCEERR_AR
#define BUS_MCEERR_AR 4
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 13/25] bswap.h: Include <endian.h> on Haiku for bswap operations
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (11 preceding siblings ...)
2020-07-13 14:10 ` [PULL 12/25] osdep.h: For Haiku, define SIGIO as equivalent to SIGPOLL Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 14/25] util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD Peter Maydell
` (12 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: David CARLIER <devnexen@gmail.com>
Haiku puts the bswap* functions in <endian.h>; pull in that
include file on that platform.
Signed-off-by: David Carlier <devnexen@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200703145614.16684-7-peter.maydell@linaro.org
[PMM: Expanded commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/qemu/bswap.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/qemu/bswap.h b/include/qemu/bswap.h
index 2a9f3fe783e..1d3e4c24e41 100644
--- a/include/qemu/bswap.h
+++ b/include/qemu/bswap.h
@@ -8,6 +8,8 @@
# include <machine/bswap.h>
#elif defined(__FreeBSD__)
# include <sys/endian.h>
+#elif defined(__HAIKU__)
+# include <endian.h>
#elif defined(CONFIG_BYTESWAP_H)
# include <byteswap.h>
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 14/25] util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (12 preceding siblings ...)
2020-07-13 14:10 ` [PULL 13/25] bswap.h: Include <endian.h> on Haiku for bswap operations Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 15/25] util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku Peter Maydell
` (11 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: David CARLIER <devnexen@gmail.com>
util/compatfd.c includes <sys/syscall.h> so that the CONFIG_SIGNALFD
code can use SYS_signalfd. Guard the #include with CONFIG_SIGNALFD
to avoid portability issues on hosts like Haiku which do not
provide that header file.
Signed-off-by: David Carlier <devnexen@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200703145614.16684-8-peter.maydell@linaro.org
[PMM: Expanded commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
util/compatfd.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/util/compatfd.c b/util/compatfd.c
index c296f55d148..ee47dd80897 100644
--- a/util/compatfd.c
+++ b/util/compatfd.c
@@ -16,7 +16,9 @@
#include "qemu/osdep.h"
#include "qemu/thread.h"
+#if defined(CONFIG_SIGNALFD)
#include <sys/syscall.h>
+#endif
struct sigfd_compat_info
{
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 15/25] util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (13 preceding siblings ...)
2020-07-13 14:10 ` [PULL 14/25] util/compatfd.c: Only include <sys/syscall.h> if CONFIG_SIGNALFD Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 16/25] util/drm: make portable by avoiding struct dirent d_type Peter Maydell
` (10 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: David CARLIER <devnexen@gmail.com>
The qemu_init_exec_dir() function is inherently non-portable;
provide an implementation for Haiku hosts.
Signed-off-by: David Carlier <devnexen@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200703145614.16684-9-peter.maydell@linaro.org
[PMM: Expanded commit message]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
util/oslib-posix.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/util/oslib-posix.c b/util/oslib-posix.c
index 7ad9195c445..72907d4d7fe 100644
--- a/util/oslib-posix.c
+++ b/util/oslib-posix.c
@@ -60,6 +60,10 @@
#include <mach-o/dyld.h>
#endif
+#ifdef __HAIKU__
+#include <kernel/image.h>
+#endif
+
#include "qemu/mmap-alloc.h"
#ifdef CONFIG_DEBUG_STACK_USAGE
@@ -389,6 +393,21 @@ void qemu_init_exec_dir(const char *argv0)
}
}
}
+#elif defined(__HAIKU__)
+ {
+ image_info ii;
+ int32_t c = 0;
+
+ *buf = '\0';
+ while (get_next_image_info(0, &c, &ii) == B_OK) {
+ if (ii.type == B_APP_IMAGE) {
+ strncpy(buf, ii.name, sizeof(buf));
+ buf[sizeof(buf) - 1] = 0;
+ p = buf;
+ break;
+ }
+ }
+ }
#endif
/* If we don't have any way of figuring out the actual executable
location then try argv[0]. */
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 16/25] util/drm: make portable by avoiding struct dirent d_type
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (14 preceding siblings ...)
2020-07-13 14:10 ` [PULL 15/25] util/oslib-posix.c: Implement qemu_init_exec_dir() for Haiku Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 17/25] target/nios2: add DISAS_NORETURN case for nothing more to generate Peter Maydell
` (9 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Gerd Hoffmann <kraxel@redhat.com>
Given this isn't perforance critical at all lets avoid the non-portable
d_type and use fstat instead to check whenever the file is a chardev.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reported-by: David Carlier <devnexen@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200703145614.16684-10-peter.maydell@linaro.org
Message-id: 20200701180302.14821-1-kraxel@redhat.com
[PMM: fixed comment style; tweaked subject line]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
util/drm.c | 19 ++++++++++++++-----
1 file changed, 14 insertions(+), 5 deletions(-)
diff --git a/util/drm.c b/util/drm.c
index a23ff245382..dae8ffebc81 100644
--- a/util/drm.c
+++ b/util/drm.c
@@ -24,7 +24,8 @@ int qemu_drm_rendernode_open(const char *rendernode)
{
DIR *dir;
struct dirent *e;
- int r, fd;
+ struct stat st;
+ int r, fd, ret;
char *p;
if (rendernode) {
@@ -38,10 +39,6 @@ int qemu_drm_rendernode_open(const char *rendernode)
fd = -1;
while ((e = readdir(dir))) {
- if (e->d_type != DT_CHR) {
- continue;
- }
-
if (strncmp(e->d_name, "renderD", 7)) {
continue;
}
@@ -53,6 +50,18 @@ int qemu_drm_rendernode_open(const char *rendernode)
g_free(p);
continue;
}
+
+ /*
+ * prefer fstat() over checking e->d_type == DT_CHR for
+ * portability reasons
+ */
+ ret = fstat(r, &st);
+ if (ret < 0 || (st.st_mode & S_IFMT) != S_IFCHR) {
+ close(r);
+ g_free(p);
+ continue;
+ }
+
fd = r;
g_free(p);
break;
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 17/25] target/nios2: add DISAS_NORETURN case for nothing more to generate
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (15 preceding siblings ...)
2020-07-13 14:10 ` [PULL 16/25] util/drm: make portable by avoiding struct dirent d_type Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 18/25] target/nios2: in line the semantics of DISAS_UPDATE with other targets Peter Maydell
` (8 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Wentong Wu <wentong.wu@intel.com>
Add DISAS_NORETURN case for nothing more to generate because at runtime
execution will never return from some helper call. And at the same time
replace DISAS_UPDATE in t_gen_helper_raise_exception and gen_exception
with the newly added DISAS_NORETURN.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Message-id: 20200710233433.19729-1-wentong.wu@intel.com
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/nios2/translate.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 6c34cd31937..00b591cc298 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -149,7 +149,7 @@ static void t_gen_helper_raise_exception(DisasContext *dc,
tcg_gen_movi_tl(dc->cpu_R[R_PC], dc->pc);
gen_helper_raise_exception(dc->cpu_env, tmp);
tcg_temp_free_i32(tmp);
- dc->is_jmp = DISAS_UPDATE;
+ dc->is_jmp = DISAS_NORETURN;
}
static bool use_goto_tb(DisasContext *dc, uint32_t dest)
@@ -802,7 +802,7 @@ static void gen_exception(DisasContext *dc, uint32_t excp)
tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
gen_helper_raise_exception(cpu_env, tmp);
tcg_temp_free_i32(tmp);
- dc->is_jmp = DISAS_UPDATE;
+ dc->is_jmp = DISAS_NORETURN;
}
/* generate intermediate code for basic block 'tb'. */
@@ -877,6 +877,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
tcg_gen_exit_tb(NULL, 0);
break;
+ case DISAS_NORETURN:
case DISAS_TB_JUMP:
/* nothing more to generate */
break;
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 18/25] target/nios2: in line the semantics of DISAS_UPDATE with other targets
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (16 preceding siblings ...)
2020-07-13 14:10 ` [PULL 17/25] target/nios2: add DISAS_NORETURN case for nothing more to generate Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 19/25] target/nios2: Use gen_io_start around wrctl instruction Peter Maydell
` (7 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Wentong Wu <wentong.wu@intel.com>
In line the semantics of DISAS_UPDATE on nios2 target with other targets
which is to explicitly write the PC back into the cpu state before doing
a tcg_gen_exit_tb().
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Message-id: 20200710233433.19729-2-wentong.wu@intel.com
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/nios2/translate.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index 00b591cc298..c2a134f932d 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -865,6 +865,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
/* Indicate where the next block should start */
switch (dc->is_jmp) {
case DISAS_NEXT:
+ case DISAS_UPDATE:
/* Save the current PC back into the CPU register */
tcg_gen_movi_tl(cpu_R[R_PC], dc->pc);
tcg_gen_exit_tb(NULL, 0);
@@ -872,7 +873,6 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb, int max_insns)
default:
case DISAS_JUMP:
- case DISAS_UPDATE:
/* The jump will already have updated the PC register */
tcg_gen_exit_tb(NULL, 0);
break;
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 19/25] target/nios2: Use gen_io_start around wrctl instruction
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (17 preceding siblings ...)
2020-07-13 14:10 ` [PULL 18/25] target/nios2: in line the semantics of DISAS_UPDATE with other targets Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:10 ` [PULL 20/25] hw/nios2: exit to main CPU loop only when unmasking interrupts Peter Maydell
` (6 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Wentong Wu <wentong.wu@intel.com>
wrctl instruction on nios2 target will cause checking cpu
interrupt but tcg_handle_interrupt() will call cpu_abort()
if the CPU gets an interrupt while it's not in 'can do IO'
state, so add gen_io_start around wrctl instruction. Also
at the same time, end the onging TB with DISAS_UPDATE.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Message-id: 20200710233433.19729-3-wentong.wu@intel.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/nios2/translate.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/target/nios2/translate.c b/target/nios2/translate.c
index c2a134f932d..9824544eb37 100644
--- a/target/nios2/translate.c
+++ b/target/nios2/translate.c
@@ -32,6 +32,7 @@
#include "exec/cpu_ldst.h"
#include "exec/translator.h"
#include "qemu/qemu-print.h"
+#include "exec/gen-icount.h"
/* is_jmp field values */
#define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */
@@ -518,7 +519,11 @@ static void wrctl(DisasContext *dc, uint32_t code, uint32_t flags)
/* If interrupts were enabled using WRCTL, trigger them. */
#if !defined(CONFIG_USER_ONLY)
if ((instr.imm5 + CR_BASE) == CR_STATUS) {
+ if (tb_cflags(dc->tb) & CF_USE_ICOUNT) {
+ gen_io_start();
+ }
gen_helper_check_interrupts(dc->cpu_env);
+ dc->is_jmp = DISAS_UPDATE;
}
#endif
}
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 20/25] hw/nios2: exit to main CPU loop only when unmasking interrupts
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (18 preceding siblings ...)
2020-07-13 14:10 ` [PULL 19/25] target/nios2: Use gen_io_start around wrctl instruction Peter Maydell
@ 2020-07-13 14:10 ` Peter Maydell
2020-07-13 14:11 ` [PULL 21/25] hw/arm/tosa.c: Detabify Peter Maydell
` (5 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:10 UTC (permalink / raw)
To: qemu-devel
From: Wentong Wu <wentong.wu@intel.com>
Only when guest code is unmasking interrupts, terminate the excution
of translated code and exit to the main CPU loop to handle previous
pended interrupts because of the interrupts mask by guest code.
Signed-off-by: Wentong Wu <wentong.wu@intel.com>
Message-id: 20200710233433.19729-4-wentong.wu@intel.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/nios2/cpu_pic.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/nios2/cpu_pic.c b/hw/nios2/cpu_pic.c
index 1c1989d56a0..5ea7e52ab83 100644
--- a/hw/nios2/cpu_pic.c
+++ b/hw/nios2/cpu_pic.c
@@ -54,7 +54,8 @@ static void nios2_pic_cpu_handler(void *opaque, int irq, int level)
void nios2_check_interrupts(CPUNios2State *env)
{
- if (env->irq_pending) {
+ if (env->irq_pending &&
+ (env->regs[CR_STATUS] & CR_STATUS_PIE)) {
env->irq_pending = 0;
cpu_interrupt(env_cpu(env), CPU_INTERRUPT_HARD);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 21/25] hw/arm/tosa.c: Detabify
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (19 preceding siblings ...)
2020-07-13 14:10 ` [PULL 20/25] hw/nios2: exit to main CPU loop only when unmasking interrupts Peter Maydell
@ 2020-07-13 14:11 ` Peter Maydell
2020-07-13 14:11 ` [PULL 22/25] hw/arm/tosa: Encapsulate misc GPIO handling in a device Peter Maydell
` (4 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:11 UTC (permalink / raw)
To: qemu-devel
Remove the hardcoded tabs from hw/arm/tosa.c. There aren't
many, but since they're all in constant #defines they're not
going to go away with our usual "only when we touch a function"
policy on reformatting.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200628203748.14250-2-peter.maydell@linaro.org
---
hw/arm/tosa.c | 44 ++++++++++++++++++++++----------------------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
index 5dee2d76c61..06ecf1e7824 100644
--- a/hw/arm/tosa.c
+++ b/hw/arm/tosa.c
@@ -26,32 +26,32 @@
#include "hw/sysbus.h"
#include "exec/address-spaces.h"
-#define TOSA_RAM 0x04000000
-#define TOSA_ROM 0x00800000
+#define TOSA_RAM 0x04000000
+#define TOSA_ROM 0x00800000
-#define TOSA_GPIO_USB_IN (5)
-#define TOSA_GPIO_nSD_DETECT (9)
-#define TOSA_GPIO_ON_RESET (19)
-#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */
-#define TOSA_GPIO_CF_CD (13)
-#define TOSA_GPIO_TC6393XB_INT (15)
-#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */
+#define TOSA_GPIO_USB_IN (5)
+#define TOSA_GPIO_nSD_DETECT (9)
+#define TOSA_GPIO_ON_RESET (19)
+#define TOSA_GPIO_CF_IRQ (21) /* CF slot0 Ready */
+#define TOSA_GPIO_CF_CD (13)
+#define TOSA_GPIO_TC6393XB_INT (15)
+#define TOSA_GPIO_JC_CF_IRQ (36) /* CF slot1 Ready */
-#define TOSA_SCOOP_GPIO_BASE 1
-#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
-#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3)
-#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4)
+#define TOSA_SCOOP_GPIO_BASE 1
+#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
+#define TOSA_GPIO_SD_WP (TOSA_SCOOP_GPIO_BASE + 3)
+#define TOSA_GPIO_PWR_ON (TOSA_SCOOP_GPIO_BASE + 4)
-#define TOSA_SCOOP_JC_GPIO_BASE 1
-#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
-#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
-#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
-#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5)
-#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7)
+#define TOSA_SCOOP_JC_GPIO_BASE 1
+#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
+#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
+#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
+#define TOSA_GPIO_TC6393XB_L3V_ON (TOSA_SCOOP_JC_GPIO_BASE + 5)
+#define TOSA_GPIO_WLAN_LED (TOSA_SCOOP_JC_GPIO_BASE + 7)
-#define DAC_BASE 0x4e
-#define DAC_CH1 0
-#define DAC_CH2 1
+#define DAC_BASE 0x4e
+#define DAC_CH1 0
+#define DAC_CH2 1
static void tosa_microdrive_attach(PXA2xxState *cpu)
{
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 22/25] hw/arm/tosa: Encapsulate misc GPIO handling in a device
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (20 preceding siblings ...)
2020-07-13 14:11 ` [PULL 21/25] hw/arm/tosa.c: Detabify Peter Maydell
@ 2020-07-13 14:11 ` Peter Maydell
2020-07-13 14:11 ` [PULL 23/25] hw/arm/palm.c: Detabify Peter Maydell
` (3 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:11 UTC (permalink / raw)
To: qemu-devel
Currently we have a free-floating set of IRQs and a function
tosa_out_switch() which handle the GPIO lines on the tosa board which
connect to LEDs, and another free-floating IRQ and tosa_reset()
function to handle the GPIO line that resets the system. Encapsulate
this behaviour in a simple QOM device.
This commit fixes Coverity issue CID 1421929 (which pointed out that
the 'outsignals' in tosa_gpio_setup() were leaked), because it
removes the use of the qemu_allocate_irqs() API from this code
entirely.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200628203748.14250-3-peter.maydell@linaro.org
---
hw/arm/tosa.c | 88 +++++++++++++++++++++++++++++++++++++--------------
1 file changed, 64 insertions(+), 24 deletions(-)
diff --git a/hw/arm/tosa.c b/hw/arm/tosa.c
index 06ecf1e7824..383b3b22e24 100644
--- a/hw/arm/tosa.c
+++ b/hw/arm/tosa.c
@@ -65,24 +65,39 @@ static void tosa_microdrive_attach(PXA2xxState *cpu)
pxa2xx_pcmcia_attach(cpu->pcmcia[0], md);
}
-static void tosa_out_switch(void *opaque, int line, int level)
+/*
+ * Encapsulation of some GPIO line behaviour for the Tosa board
+ *
+ * QEMU interface:
+ * + named GPIO inputs "leds[0..3]": assert to light LEDs
+ * + named GPIO input "reset": when asserted, resets the system
+ */
+
+#define TYPE_TOSA_MISC_GPIO "tosa-misc-gpio"
+#define TOSA_MISC_GPIO(obj) \
+ OBJECT_CHECK(TosaMiscGPIOState, (obj), TYPE_TOSA_MISC_GPIO)
+
+typedef struct TosaMiscGPIOState {
+ SysBusDevice parent_obj;
+} TosaMiscGPIOState;
+
+static void tosa_gpio_leds(void *opaque, int line, int level)
{
switch (line) {
- case 0:
- fprintf(stderr, "blue LED %s.\n", level ? "on" : "off");
- break;
- case 1:
- fprintf(stderr, "green LED %s.\n", level ? "on" : "off");
- break;
- case 2:
- fprintf(stderr, "amber LED %s.\n", level ? "on" : "off");
- break;
- case 3:
- fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off");
- break;
- default:
- fprintf(stderr, "Uhandled out event: %d = %d\n", line, level);
- break;
+ case 0:
+ fprintf(stderr, "blue LED %s.\n", level ? "on" : "off");
+ break;
+ case 1:
+ fprintf(stderr, "green LED %s.\n", level ? "on" : "off");
+ break;
+ case 2:
+ fprintf(stderr, "amber LED %s.\n", level ? "on" : "off");
+ break;
+ case 3:
+ fprintf(stderr, "wlan LED %s.\n", level ? "on" : "off");
+ break;
+ default:
+ g_assert_not_reached();
}
}
@@ -93,13 +108,22 @@ static void tosa_reset(void *opaque, int line, int level)
}
}
+static void tosa_misc_gpio_init(Object *obj)
+{
+ DeviceState *dev = DEVICE(obj);
+
+ qdev_init_gpio_in_named(dev, tosa_gpio_leds, "leds", 4);
+ qdev_init_gpio_in_named(dev, tosa_reset, "reset", 1);
+}
+
static void tosa_gpio_setup(PXA2xxState *cpu,
DeviceState *scp0,
DeviceState *scp1,
TC6393xbState *tmio)
{
- qemu_irq *outsignals = qemu_allocate_irqs(tosa_out_switch, cpu, 4);
- qemu_irq reset;
+ DeviceState *misc_gpio;
+
+ misc_gpio = sysbus_create_simple(TYPE_TOSA_MISC_GPIO, -1, NULL);
/* MMC/SD host */
pxa2xx_mmci_handlers(cpu->mmc,
@@ -107,8 +131,8 @@ static void tosa_gpio_setup(PXA2xxState *cpu,
qemu_irq_invert(qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_nSD_DETECT)));
/* Handle reset */
- reset = qemu_allocate_irq(tosa_reset, cpu, 0);
- qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET, reset);
+ qdev_connect_gpio_out(cpu->gpio, TOSA_GPIO_ON_RESET,
+ qdev_get_gpio_in_named(misc_gpio, "reset", 0));
/* PCMCIA signals: card's IRQ and Card-Detect */
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
@@ -119,10 +143,14 @@ static void tosa_gpio_setup(PXA2xxState *cpu,
qdev_get_gpio_in(cpu->gpio, TOSA_GPIO_JC_CF_IRQ),
NULL);
- qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED, outsignals[0]);
- qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED, outsignals[1]);
- qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED, outsignals[2]);
- qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED, outsignals[3]);
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_BT_LED,
+ qdev_get_gpio_in_named(misc_gpio, "leds", 0));
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_NOTE_LED,
+ qdev_get_gpio_in_named(misc_gpio, "leds", 1));
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_CHRG_ERR_LED,
+ qdev_get_gpio_in_named(misc_gpio, "leds", 2));
+ qdev_connect_gpio_out(scp1, TOSA_GPIO_WLAN_LED,
+ qdev_get_gpio_in_named(misc_gpio, "leds", 3));
qdev_connect_gpio_out(scp1, TOSA_GPIO_TC6393XB_L3V_ON, tc6393xb_l3v_get(tmio));
@@ -287,10 +315,22 @@ static const TypeInfo tosa_ssp_info = {
.class_init = tosa_ssp_class_init,
};
+static const TypeInfo tosa_misc_gpio_info = {
+ .name = "tosa-misc-gpio",
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(TosaMiscGPIOState),
+ .instance_init = tosa_misc_gpio_init,
+ /*
+ * No class init required: device has no internal state so does not
+ * need to set up reset or vmstate, and has no realize method.
+ */
+};
+
static void tosa_register_types(void)
{
type_register_static(&tosa_dac_info);
type_register_static(&tosa_ssp_info);
+ type_register_static(&tosa_misc_gpio_info);
}
type_init(tosa_register_types)
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 23/25] hw/arm/palm.c: Detabify
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (21 preceding siblings ...)
2020-07-13 14:11 ` [PULL 22/25] hw/arm/tosa: Encapsulate misc GPIO handling in a device Peter Maydell
@ 2020-07-13 14:11 ` Peter Maydell
2020-07-13 14:11 ` [PULL 24/25] hw/arm/palm.c: Encapsulate misc GPIO handling in a device Peter Maydell
` (2 subsequent siblings)
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:11 UTC (permalink / raw)
To: qemu-devel
Remove hard-tabs from palm.c.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200628214230.2592-2-peter.maydell@linaro.org
---
hw/arm/palm.c | 64 +++++++++++++++++++++++++--------------------------
1 file changed, 32 insertions(+), 32 deletions(-)
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
index 97ca105d297..569836178f6 100644
--- a/hw/arm/palm.c
+++ b/hw/arm/palm.c
@@ -61,21 +61,21 @@ static const MemoryRegionOps static_ops = {
/* Palm Tunsgten|E support */
/* Shared GPIOs */
-#define PALMTE_USBDETECT_GPIO 0
-#define PALMTE_USB_OR_DC_GPIO 1
-#define PALMTE_TSC_GPIO 4
-#define PALMTE_PINTDAV_GPIO 6
-#define PALMTE_MMC_WP_GPIO 8
-#define PALMTE_MMC_POWER_GPIO 9
-#define PALMTE_HDQ_GPIO 11
-#define PALMTE_HEADPHONES_GPIO 14
-#define PALMTE_SPEAKER_GPIO 15
+#define PALMTE_USBDETECT_GPIO 0
+#define PALMTE_USB_OR_DC_GPIO 1
+#define PALMTE_TSC_GPIO 4
+#define PALMTE_PINTDAV_GPIO 6
+#define PALMTE_MMC_WP_GPIO 8
+#define PALMTE_MMC_POWER_GPIO 9
+#define PALMTE_HDQ_GPIO 11
+#define PALMTE_HEADPHONES_GPIO 14
+#define PALMTE_SPEAKER_GPIO 15
/* MPU private GPIOs */
-#define PALMTE_DC_GPIO 2
-#define PALMTE_MMC_SWITCH_GPIO 4
-#define PALMTE_MMC1_GPIO 6
-#define PALMTE_MMC2_GPIO 7
-#define PALMTE_MMC3_GPIO 11
+#define PALMTE_DC_GPIO 2
+#define PALMTE_MMC_SWITCH_GPIO 4
+#define PALMTE_MMC1_GPIO 6
+#define PALMTE_MMC2_GPIO 7
+#define PALMTE_MMC3_GPIO 11
static MouseTransformInfo palmte_pointercal = {
.x = 320,
@@ -100,17 +100,17 @@ static struct {
int column;
} palmte_keymap[0x80] = {
[0 ... 0x7f] = { -1, -1 },
- [0x3b] = { 0, 0 }, /* F1 -> Calendar */
- [0x3c] = { 1, 0 }, /* F2 -> Contacts */
- [0x3d] = { 2, 0 }, /* F3 -> Tasks List */
- [0x3e] = { 3, 0 }, /* F4 -> Note Pad */
- [0x01] = { 4, 0 }, /* Esc -> Power */
- [0x4b] = { 0, 1 }, /* Left */
- [0x50] = { 1, 1 }, /* Down */
- [0x48] = { 2, 1 }, /* Up */
- [0x4d] = { 3, 1 }, /* Right */
- [0x4c] = { 4, 1 }, /* Centre */
- [0x39] = { 4, 1 }, /* Spc -> Centre */
+ [0x3b] = { 0, 0 }, /* F1 -> Calendar */
+ [0x3c] = { 1, 0 }, /* F2 -> Contacts */
+ [0x3d] = { 2, 0 }, /* F3 -> Tasks List */
+ [0x3e] = { 3, 0 }, /* F4 -> Note Pad */
+ [0x01] = { 4, 0 }, /* Esc -> Power */
+ [0x4b] = { 0, 1 }, /* Left */
+ [0x50] = { 1, 1 }, /* Down */
+ [0x48] = { 2, 1 }, /* Up */
+ [0x4d] = { 3, 1 }, /* Right */
+ [0x4c] = { 4, 1 }, /* Centre */
+ [0x39] = { 4, 1 }, /* Spc -> Centre */
};
static void palmte_button_event(void *opaque, int keycode)
@@ -161,13 +161,13 @@ static void palmte_gpio_setup(struct omap_mpu_state_s *cpu)
[PALMTE_MMC_SWITCH_GPIO]));
misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7);
- qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]);
- qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]);
- qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]);
- qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]);
- qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]);
- omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]);
- omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]);
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]);
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]);
+ qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]);
+ qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]);
+ qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]);
+ omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]);
+ omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]);
/* Reset some inputs to initial state. */
qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO));
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 24/25] hw/arm/palm.c: Encapsulate misc GPIO handling in a device
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (22 preceding siblings ...)
2020-07-13 14:11 ` [PULL 23/25] hw/arm/palm.c: Detabify Peter Maydell
@ 2020-07-13 14:11 ` Peter Maydell
2020-07-13 14:11 ` [PULL 25/25] hw/arm/aspeed: Do not create and attach empty SD cards by default Peter Maydell
2020-07-13 15:58 ` [PULL 00/25] target-arm queue Peter Maydell
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:11 UTC (permalink / raw)
To: qemu-devel
Replace the free-floating set of IRQs and palmte_onoff_gpios()
function with a simple QOM device that encapsulates this
behaviour.
This fixes Coverity issue CID 1421944, which points out that
the memory returned by qemu_allocate_irqs() is leaked.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200628214230.2592-3-peter.maydell@linaro.org
---
hw/arm/palm.c | 61 +++++++++++++++++++++++++++++++++++++++++++--------
1 file changed, 52 insertions(+), 9 deletions(-)
diff --git a/hw/arm/palm.c b/hw/arm/palm.c
index 569836178f6..e7bc9ea4c6a 100644
--- a/hw/arm/palm.c
+++ b/hw/arm/palm.c
@@ -124,6 +124,21 @@ static void palmte_button_event(void *opaque, int keycode)
!(keycode & 0x80));
}
+/*
+ * Encapsulation of some GPIO line behaviour for the Palm board
+ *
+ * QEMU interface:
+ * + unnamed GPIO inputs 0..6: for the various miscellaneous input lines
+ */
+
+#define TYPE_PALM_MISC_GPIO "palm-misc-gpio"
+#define PALM_MISC_GPIO(obj) \
+ OBJECT_CHECK(PalmMiscGPIOState, (obj), TYPE_PALM_MISC_GPIO)
+
+typedef struct PalmMiscGPIOState {
+ SysBusDevice parent_obj;
+} PalmMiscGPIOState;
+
static void palmte_onoff_gpios(void *opaque, int line, int level)
{
switch (line) {
@@ -151,23 +166,44 @@ static void palmte_onoff_gpios(void *opaque, int line, int level)
}
}
+static void palm_misc_gpio_init(Object *obj)
+{
+ DeviceState *dev = DEVICE(obj);
+
+ qdev_init_gpio_in(dev, palmte_onoff_gpios, 7);
+}
+
+static const TypeInfo palm_misc_gpio_info = {
+ .name = TYPE_PALM_MISC_GPIO,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(PalmMiscGPIOState),
+ .instance_init = palm_misc_gpio_init,
+ /*
+ * No class init required: device has no internal state so does not
+ * need to set up reset or vmstate, and has no realize method.
+ */
+};
+
static void palmte_gpio_setup(struct omap_mpu_state_s *cpu)
{
- qemu_irq *misc_gpio;
+ DeviceState *misc_gpio;
+
+ misc_gpio = sysbus_create_simple(TYPE_PALM_MISC_GPIO, -1, NULL);
omap_mmc_handlers(cpu->mmc,
qdev_get_gpio_in(cpu->gpio, PALMTE_MMC_WP_GPIO),
qemu_irq_invert(omap_mpuio_in_get(cpu->mpuio)
[PALMTE_MMC_SWITCH_GPIO]));
- misc_gpio = qemu_allocate_irqs(palmte_onoff_gpios, cpu, 7);
- qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO, misc_gpio[0]);
- qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO, misc_gpio[1]);
- qdev_connect_gpio_out(cpu->gpio, 11, misc_gpio[2]);
- qdev_connect_gpio_out(cpu->gpio, 12, misc_gpio[3]);
- qdev_connect_gpio_out(cpu->gpio, 13, misc_gpio[4]);
- omap_mpuio_out_set(cpu->mpuio, 1, misc_gpio[5]);
- omap_mpuio_out_set(cpu->mpuio, 3, misc_gpio[6]);
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_MMC_POWER_GPIO,
+ qdev_get_gpio_in(misc_gpio, 0));
+ qdev_connect_gpio_out(cpu->gpio, PALMTE_SPEAKER_GPIO,
+ qdev_get_gpio_in(misc_gpio, 1));
+ qdev_connect_gpio_out(cpu->gpio, 11, qdev_get_gpio_in(misc_gpio, 2));
+ qdev_connect_gpio_out(cpu->gpio, 12, qdev_get_gpio_in(misc_gpio, 3));
+ qdev_connect_gpio_out(cpu->gpio, 13, qdev_get_gpio_in(misc_gpio, 4));
+ omap_mpuio_out_set(cpu->mpuio, 1, qdev_get_gpio_in(misc_gpio, 5));
+ omap_mpuio_out_set(cpu->mpuio, 3, qdev_get_gpio_in(misc_gpio, 6));
/* Reset some inputs to initial state. */
qemu_irq_lower(qdev_get_gpio_in(cpu->gpio, PALMTE_USBDETECT_GPIO));
@@ -276,3 +312,10 @@ static void palmte_machine_init(MachineClass *mc)
}
DEFINE_MACHINE("cheetah", palmte_machine_init)
+
+static void palm_register_types(void)
+{
+ type_register_static(&palm_misc_gpio_info);
+}
+
+type_init(palm_register_types)
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* [PULL 25/25] hw/arm/aspeed: Do not create and attach empty SD cards by default
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (23 preceding siblings ...)
2020-07-13 14:11 ` [PULL 24/25] hw/arm/palm.c: Encapsulate misc GPIO handling in a device Peter Maydell
@ 2020-07-13 14:11 ` Peter Maydell
2020-07-13 15:58 ` [PULL 00/25] target-arm queue Peter Maydell
25 siblings, 0 replies; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 14:11 UTC (permalink / raw)
To: qemu-devel
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Since added in commit 2bea128c3d, each SDHCI is wired with a SD
card, using empty card when no block drive provided. This is not
the desired behavior. The SDHCI exposes a SD bus to plug cards
on, if no card available, it is fine to have an unplugged bus.
Avoid creating unnecessary SD card device when no block drive
provided.
Fixes: 2bea128c3d ("hw/sd/aspeed_sdhci: New device")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20200705173402.15620-1-f4bug@amsat.org
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/arm/aspeed.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 660dcb54144..6a3a345a6f6 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -246,11 +246,12 @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
{
DeviceState *card;
- card = qdev_new(TYPE_SD_CARD);
- if (dinfo) {
- qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
- &error_fatal);
+ if (!dinfo) {
+ return;
}
+ card = qdev_new(TYPE_SD_CARD);
+ qdev_prop_set_drive_err(card, "drive", blk_by_legacy_dinfo(dinfo),
+ &error_fatal);
qdev_realize_and_unref(card,
qdev_get_child_bus(DEVICE(sdhci), "sd-bus"),
&error_fatal);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread* Re: [PULL 00/25] target-arm queue
2020-07-13 14:10 [PULL 00/25] target-arm queue Peter Maydell
` (24 preceding siblings ...)
2020-07-13 14:11 ` [PULL 25/25] hw/arm/aspeed: Do not create and attach empty SD cards by default Peter Maydell
@ 2020-07-13 15:58 ` Peter Maydell
2020-07-14 14:52 ` Wu, Wentong
25 siblings, 1 reply; 36+ messages in thread
From: Peter Maydell @ 2020-07-13 15:58 UTC (permalink / raw)
To: QEMU Developers
On Mon, 13 Jul 2020 at 15:11, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> Last lot of target-arm changes to squeeze in before rc1:
> * various minor Arm bug fixes
> * David Carlier's Haiku build portability fixes
> * Wentong Wu's fixes for icount handling in the nios2 target
>
> The following changes since commit 00ce6c36b35e0eb8cc5d68a28f288a6335848813:
>
> Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-07-13' into staging (2020-07-13 13:01:30 +0100)
>
> are available in the Git repository at:
>
> https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200713
>
> for you to fetch changes up to 756f739b1682bf131994ec96dad7fbdf8b54493a:
>
> hw/arm/aspeed: Do not create and attach empty SD cards by default (2020-07-13 14:36:12 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
> * hw/arm/bcm2836: Remove unused 'cpu_type' field
> * target/arm: Fix mtedesc for do_mem_zpz
> * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
> * target/arm: Don't do raw writes for PMINTENCLR
> * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
> * build: Fix various issues with building on Haiku
> * target/nios2: fix wrctl behaviour when using icount
> * hw/arm/tosa: Encapsulate misc GPIO handling in a device
> * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
> * hw/arm/aspeed: Do not create and attach empty SD cards by default
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 36+ messages in thread* RE: [PULL 00/25] target-arm queue
2020-07-13 15:58 ` [PULL 00/25] target-arm queue Peter Maydell
@ 2020-07-14 14:52 ` Wu, Wentong
2020-07-14 14:55 ` Peter Maydell
0 siblings, 1 reply; 36+ messages in thread
From: Wu, Wentong @ 2020-07-14 14:52 UTC (permalink / raw)
To: Peter Maydell, QEMU Developers
> -----Original Message-----
> From: Qemu-devel <qemu-devel-bounces+wentong.wu=intel.com@nongnu.org> On Behalf Of Peter Maydell
> Sent: Monday, July 13, 2020 11:59 PM
> To: QEMU Developers <qemu-devel@nongnu.org>
> Subject: Re: [PULL 00/25] target-arm queue
>
> On Mon, 13 Jul 2020 at 15:11, Peter Maydell <peter.maydell@linaro.org> wrote:
> >
> > Last lot of target-arm changes to squeeze in before rc1:
> > * various minor Arm bug fixes
> > * David Carlier's Haiku build portability fixes
> > * Wentong Wu's fixes for icount handling in the nios2 target
> >
> > The following changes since commit 00ce6c36b35e0eb8cc5d68a28f288a6335848813:
> >
> > Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2020-07-13' into staging (2020-07-13 13:01:30 +0100)
> >
> > are available in the Git repository at:
> >
> > https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20200713
> >
> > for you to fetch changes up to 756f739b1682bf131994ec96dad7fbdf8b54493a:
> >
> > hw/arm/aspeed: Do not create and attach empty SD cards by default (2020-07-13 14:36:12 +0100)
> >
> > ----------------------------------------------------------------
> > target-arm queue:
> > * hw/arm/bcm2836: Remove unused 'cpu_type' field
> > * target/arm: Fix mtedesc for do_mem_zpz
> > * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
> > * target/arm: Don't do raw writes for PMINTENCLR
> > * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
> > * build: Fix various issues with building on Haiku
> > * target/nios2: fix wrctl behaviour when using icount
> > * hw/arm/tosa: Encapsulate misc GPIO handling in a device
> > * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
> > * hw/arm/aspeed: Do not create and attach empty SD cards by default
>
>
> Applied, thanks.
>
> Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
> for any user-visible changes.
Who will be responsible updating the changelog? Patch author or the person who has the special access for that wiki page?
Thanks
> -- PMM
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [PULL 00/25] target-arm queue
2020-07-14 14:52 ` Wu, Wentong
@ 2020-07-14 14:55 ` Peter Maydell
2020-07-14 15:03 ` Wu, Wentong
0 siblings, 1 reply; 36+ messages in thread
From: Peter Maydell @ 2020-07-14 14:55 UTC (permalink / raw)
To: Wu, Wentong; +Cc: QEMU Developers
On Tue, 14 Jul 2020 at 15:52, Wu, Wentong <wentong.wu@intel.com> wrote:
>
> > On Mon, 13 Jul 2020 at 15:11, Peter Maydell <peter.maydell@linaro.org> wrote:
> > > ----------------------------------------------------------------
> > > target-arm queue:
> > > * hw/arm/bcm2836: Remove unused 'cpu_type' field
> > > * target/arm: Fix mtedesc for do_mem_zpz
> > > * Add the ability to change the FEC PHY MDIO device number on i.MX25/i.MX6/i.MX7
> > > * target/arm: Don't do raw writes for PMINTENCLR
> > > * virtio-iommu: Fix coverity issue in virtio_iommu_handle_command()
> > > * build: Fix various issues with building on Haiku
> > > * target/nios2: fix wrctl behaviour when using icount
> > > * hw/arm/tosa: Encapsulate misc GPIO handling in a device
> > > * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
> > > * hw/arm/aspeed: Do not create and attach empty SD cards by default
> >
> >
> > Applied, thanks.
> >
> > Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
> > for any user-visible changes.
>
> Who will be responsible updating the changelog? Patch author or
> the person who has the special access for that wiki page?
Usually it's the person who sends the pullrequest (me in this case),
unless they specifically ask a patch author to write some changelog
text. In this case I didn't think anything in this set of patches
needed a changelog entry except for the empty-SD-card change.
If you think there's some text worth adding I can add it for you.
The changelog wiki page, incidentally, can be edited by anybody
with a wiki account. We don't have an automatic account-creation
process because it was heavily hit by spammers, but anybody with
an existing wiki account can create one for developers who want one.
thanks
-- PMM
^ permalink raw reply [flat|nested] 36+ messages in thread
* RE: [PULL 00/25] target-arm queue
2020-07-14 14:55 ` Peter Maydell
@ 2020-07-14 15:03 ` Wu, Wentong
0 siblings, 0 replies; 36+ messages in thread
From: Wu, Wentong @ 2020-07-14 15:03 UTC (permalink / raw)
To: Peter Maydell; +Cc: QEMU Developers
> -----Original Message-----
> From: Peter Maydell <peter.maydell@linaro.org>
> Sent: Tuesday, July 14, 2020 10:55 PM
> To: Wu, Wentong <wentong.wu@intel.com>
> Cc: QEMU Developers <qemu-devel@nongnu.org>
> Subject: Re: [PULL 00/25] target-arm queue
>
> On Tue, 14 Jul 2020 at 15:52, Wu, Wentong <wentong.wu@intel.com> wrote:
> >
> > > On Mon, 13 Jul 2020 at 15:11, Peter Maydell <peter.maydell@linaro.org> wrote:
> > > > ----------------------------------------------------------------
> > > > target-arm queue:
> > > > * hw/arm/bcm2836: Remove unused 'cpu_type' field
> > > > * target/arm: Fix mtedesc for do_mem_zpz
> > > > * Add the ability to change the FEC PHY MDIO device number on
> > > > i.MX25/i.MX6/i.MX7
> > > > * target/arm: Don't do raw writes for PMINTENCLR
> > > > * virtio-iommu: Fix coverity issue in
> > > > virtio_iommu_handle_command()
> > > > * build: Fix various issues with building on Haiku
> > > > * target/nios2: fix wrctl behaviour when using icount
> > > > * hw/arm/tosa: Encapsulate misc GPIO handling in a device
> > > > * hw/arm/palm.c: Encapsulate misc GPIO handling in a device
> > > > * hw/arm/aspeed: Do not create and attach empty SD cards by
> > > > default
> > >
> > >
> > > Applied, thanks.
> > >
> > > Please update the changelog at https://wiki.qemu.org/ChangeLog/5.1
> > > for any user-visible changes.
> >
> > Who will be responsible updating the changelog? Patch author or the
> > person who has the special access for that wiki page?
>
> Usually it's the person who sends the pullrequest (me in this case), unless they specifically ask a patch author to write some changelog text. In this case I didn't think anything in this set of patches needed a changelog entry except for the empty-SD-card change.
Thanks for the detail, I asked this because I don't want to break any working process in case patch author should do that. Now I understand it and no text worth adding, thanks again!
> If you think there's some text worth adding I can add it for you.
>
> The changelog wiki page, incidentally, can be edited by anybody with a wiki account. We don't have an automatic account-creation process because it was heavily hit by spammers, but anybody with an existing wiki account can create one for developers who want one.
> thanks
> -- PMM
^ permalink raw reply [flat|nested] 36+ messages in thread