From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753808AbeC1OiP (ORCPT ); Wed, 28 Mar 2018 10:38:15 -0400 Received: from mail-co1nam03on0074.outbound.protection.outlook.com ([104.47.40.74]:20939 "EHLO NAM03-CO1-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1753290AbeC1OiN (ORCPT ); Wed, 28 Mar 2018 10:38:13 -0400 From: "Ghannam, Yazen" To: Borislav Petkov CC: "linux-edac@vger.kernel.org" , "linux-kernel@vger.kernel.org" Subject: RE: [PATCH 1/3] EDAC/amd64: Print ECC enabled/disabled for nodes with enabled MCs Thread-Topic: [PATCH 1/3] EDAC/amd64: Print ECC enabled/disabled for nodes with enabled MCs Thread-Index: AQHTwUjB15Zr4Ec/0kCFKsa6VxO+naPlpusAgAAUS3A= Date: Wed, 28 Mar 2018 14:38:11 +0000 Message-ID: References: <20180321191335.7832-1-Yazen.Ghannam@amd.com> <20180328130028.GB20533@pd.tnic> In-Reply-To: <20180328130028.GB20533@pd.tnic> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [2601:345:301:c593:3414:3059:320b:d027] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1;DM5PR12MB1195;7:MxHeicf/hiDArOMyDrICyZXcAW3W2UF7GaGAx+lPQAqlwfpfFA/alhtM41Khc2x6I8x+5+2kpmdUFispZCSOT840OZ6dQMmgiq5KIabO/dVe7VRH0SJQI/awCamd70s388eEyTMUnJBvhMrAVhJVRZ06MjwRVmnrd5RnJdxJWaHpfH7EHtrLgNkF1Xf7/p+XJiCsO/bL1eaYn4L0Y5Z/ZO6ZnEqXAex2IJNPbkc4HZQPYoENS5BdtVpg0WbTk2IA;20:gXATHZG+sCENZA7FfD+N2OrS8ifhwBX4Ludt4A8s9UzgosVtLkuM9tlaBrvmAXh/ghrbyRaLjiHfjCz6YJnCySHSaflP73NxEVqXKzmxbyAE5isuIiWn9mCeliflerkAUubtAJZ8qv8JOVa8vwQLo3UmLM5uyF/XI0f7hQkxfctZDu7f0jO2dHuknmT0TbNjL0/JphcaV9IDfPPrio7BmPXwaLvQjkZpxSbTWLVVjP4K72CR7OkQGhAaqsKkI7lQ x-ms-exchange-antispam-srfa-diagnostics: SOS; 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x-microsoft-antispam-message-info: ONOLjzR8RFqzrQnFVVJZ4ixm7IXgFlXkesLBcyXcB7KAaR9eEuspQsa0y1ij7gYeFOeyPh/w3BQb1x/WfB0PMpTjSAgnPlS1j6PFe/U//ClqwyLZ20i1xaBFOzoeumKKiOJa7pbXjQ2C+7waVVCUs8xczVsi10F7JfZqe6lHWZQnXbmyTZuL62gqDnz88wcHsUDdctbtCYZTbuABsw6MSahmoz2GSG4v4RLgNi8dzZ9mHZG+oZVrldqpBCT2IHpaScZbZ22ftrMVfnkyrGbrPln4GJXdZ9Fykie9sQVi88az2BVWQvIW4qxOw3qxse2HawBGpEiSENYTgvdPt7KccA== spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 45d492fd-b3f1-48ef-9139-08d594b98854 X-MS-Exchange-CrossTenant-originalarrivaltime: 28 Mar 2018 14:38:11.8647 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1195 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from base64 to 8bit by mail.home.local id w2SEcJA5021753 > -----Original Message----- > From: linux-edac-owner@vger.kernel.org owner@vger.kernel.org> On Behalf Of Borislav Petkov > Sent: Wednesday, March 28, 2018 9:00 AM > To: Ghannam, Yazen > Cc: linux-edac@vger.kernel.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH 1/3] EDAC/amd64: Print ECC enabled/disabled for nodes > with enabled MCs > > On Wed, Mar 21, 2018 at 02:13:33PM -0500, Yazen Ghannam wrote: > > From: Yazen Ghannam > > > > It's possible that a system can be used without any DRAM populated on > > one or more physical Dies on multi-die systems. Firmware will not > > enable DRAM ECC on Dies without DRAM. Users will then see a message > > about DRAM ECC disabled on those nodes without DRAM. However, DRAM > ECC > > may, in fact, be enabled on the other Dies that have DRAM. > > > > Only print ECC enabled/disabled information for nodes that have at least > > one enabled memory channel. > > So if the only reason for this is make the error messages more precise, > then let's not make it uglier than it is. > > The right way to do it would be to push those checks down to > debug_display_dimm_sizes* which looks at the CS rows and the chip select > enable bits and there to differentiate between > > * memory controller doesn't have DIMMs > > and > > * memory controller has DIMMs but ECC is disabled in the BIOS > > and then print the respective informative error message. But not with a > yet another boolean which kinda takes care of F17h only and leaves the > old families as they were. > In either of those cases we won't get to debug_display_dimm_sizes* because we won't initialize the instance. We have a message for "memory controller doesn't have DIMMs". edac_dbg(0, "Node %d: No enabled UMCs.\n", nid); We can change the wording of this to make it more clear. Also, we can make this a pr_info and return from here. So something like this: diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 329cb96f886f..6e211ed6d419 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -3061,10 +3061,12 @@ static bool ecc_enabled(struct pci_dev *F3, u16 nid) } /* Check whether at least one UMC is enabled: */ - if (umc_en_mask) + if (umc_en_mask) { ecc_en = umc_en_mask == ecc_en_mask; - else - edac_dbg(0, "Node %d: No enabled UMCs.\n", nid); + } else { + amd64_info("Node %d: No DIMMs populated on memory controller.\n", nid); + return false; + } /* Assume UMC MCA banks are enabled. */ nb_mce_en = true; This would work for Fam17h. For older systems I think we can look at D18F2x94_dct[1:0][DisDramInterface] Or maybe we have a separate function to check for enabled memory controllers before we check for ECC? Thanks, Yazen From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [1/3] EDAC/amd64: Print ECC enabled/disabled for nodes with enabled MCs From: Yazen Ghannam Message-Id: Date: Wed, 28 Mar 2018 14:38:11 +0000 To: Borislav Petkov Cc: "linux-edac@vger.kernel.org" , "linux-kernel@vger.kernel.org" List-ID: PiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBsaW51eC1lZGFjLW93bmVyQHZn ZXIua2VybmVsLm9yZyA8bGludXgtZWRhYy0NCj4gb3duZXJAdmdlci5rZXJuZWwub3JnPiBPbiBC ZWhhbGYgT2YgQm9yaXNsYXYgUGV0a292DQo+IFNlbnQ6IFdlZG5lc2RheSwgTWFyY2ggMjgsIDIw MTggOTowMCBBTQ0KPiBUbzogR2hhbm5hbSwgWWF6ZW4gPFlhemVuLkdoYW5uYW1AYW1kLmNvbT4N Cj4gQ2M6IGxpbnV4LWVkYWNAdmdlci5rZXJuZWwub3JnOyBsaW51eC1rZXJuZWxAdmdlci5rZXJu ZWwub3JnDQo+IFN1YmplY3Q6IFJlOiBbUEFUQ0ggMS8zXSBFREFDL2FtZDY0OiBQcmludCBFQ0Mg ZW5hYmxlZC9kaXNhYmxlZCBmb3Igbm9kZXMNCj4gd2l0aCBlbmFibGVkIE1Dcw0KPiANCj4gT24g V2VkLCBNYXIgMjEsIDIwMTggYXQgMDI6MTM6MzNQTSAtMDUwMCwgWWF6ZW4gR2hhbm5hbSB3cm90 ZToNCj4gPiBGcm9tOiBZYXplbiBHaGFubmFtIDx5YXplbi5naGFubmFtQGFtZC5jb20+DQo+ID4N Cj4gPiBJdCdzIHBvc3NpYmxlIHRoYXQgYSBzeXN0ZW0gY2FuIGJlIHVzZWQgd2l0aG91dCBhbnkg RFJBTSBwb3B1bGF0ZWQgb24NCj4gPiBvbmUgb3IgbW9yZSBwaHlzaWNhbCBEaWVzIG9uIG11bHRp LWRpZSBzeXN0ZW1zLiBGaXJtd2FyZSB3aWxsIG5vdA0KPiA+IGVuYWJsZSBEUkFNIEVDQyBvbiBE aWVzIHdpdGhvdXQgRFJBTS4gVXNlcnMgd2lsbCB0aGVuIHNlZSBhIG1lc3NhZ2UNCj4gPiBhYm91 dCBEUkFNIEVDQyBkaXNhYmxlZCBvbiB0aG9zZSBub2RlcyB3aXRob3V0IERSQU0uIEhvd2V2ZXIs IERSQU0NCj4gRUNDDQo+ID4gbWF5LCBpbiBmYWN0LCBiZSBlbmFibGVkIG9uIHRoZSBvdGhlciBE aWVzIHRoYXQgaGF2ZSBEUkFNLg0KPiA+DQo+ID4gT25seSBwcmludCBFQ0MgZW5hYmxlZC9kaXNh YmxlZCBpbmZvcm1hdGlvbiBmb3Igbm9kZXMgdGhhdCBoYXZlIGF0IGxlYXN0DQo+ID4gb25lIGVu YWJsZWQgbWVtb3J5IGNoYW5uZWwuDQo+IA0KPiBTbyBpZiB0aGUgb25seSByZWFzb24gZm9yIHRo aXMgaXMgbWFrZSB0aGUgZXJyb3IgbWVzc2FnZXMgbW9yZSBwcmVjaXNlLA0KPiB0aGVuIGxldCdz IG5vdCBtYWtlIGl0IHVnbGllciB0aGFuIGl0IGlzLg0KPiANCj4gVGhlIHJpZ2h0IHdheSB0byBk byBpdCB3b3VsZCBiZSB0byBwdXNoIHRob3NlIGNoZWNrcyBkb3duIHRvDQo+IGRlYnVnX2Rpc3Bs YXlfZGltbV9zaXplcyogd2hpY2ggbG9va3MgYXQgdGhlIENTIHJvd3MgYW5kIHRoZSBjaGlwIHNl bGVjdA0KPiBlbmFibGUgYml0cyBhbmQgdGhlcmUgdG8gZGlmZmVyZW50aWF0ZSBiZXR3ZWVuDQo+ IA0KPiAqIG1lbW9yeSBjb250cm9sbGVyIGRvZXNuJ3QgaGF2ZSBESU1Ncw0KPiANCj4gYW5kDQo+ IA0KPiAqIG1lbW9yeSBjb250cm9sbGVyIGhhcyBESU1NcyBidXQgRUNDIGlzIGRpc2FibGVkIGlu IHRoZSBCSU9TDQo+IA0KPiBhbmQgdGhlbiBwcmludCB0aGUgcmVzcGVjdGl2ZSBpbmZvcm1hdGl2 ZSBlcnJvciBtZXNzYWdlLiBCdXQgbm90IHdpdGggYQ0KPiB5ZXQgYW5vdGhlciBib29sZWFuIHdo aWNoIGtpbmRhIHRha2VzIGNhcmUgb2YgRjE3aCBvbmx5IGFuZCBsZWF2ZXMgdGhlDQo+IG9sZCBm YW1pbGllcyBhcyB0aGV5IHdlcmUuDQo+IA0KDQpJbiBlaXRoZXIgb2YgdGhvc2UgY2FzZXMgd2Ug d29uJ3QgZ2V0IHRvIGRlYnVnX2Rpc3BsYXlfZGltbV9zaXplcyoNCmJlY2F1c2Ugd2Ugd29uJ3Qg aW5pdGlhbGl6ZSB0aGUgaW5zdGFuY2UuDQoNCldlIGhhdmUgYSBtZXNzYWdlIGZvciAibWVtb3J5 IGNvbnRyb2xsZXIgZG9lc24ndCBoYXZlIERJTU1zIi4NCmVkYWNfZGJnKDAsICJOb2RlICVkOiBO byBlbmFibGVkIFVNQ3MuXG4iLCBuaWQpOw0KDQpXZSBjYW4gY2hhbmdlIHRoZSB3b3JkaW5nIG9m IHRoaXMgdG8gbWFrZSBpdCBtb3JlIGNsZWFyLiBBbHNvLCB3ZSBjYW4NCm1ha2UgdGhpcyBhIHBy X2luZm8gYW5kIHJldHVybiBmcm9tIGhlcmUuDQoNClNvIHNvbWV0aGluZyBsaWtlIHRoaXM6DQoN Cg0KVGhpcyB3b3VsZCB3b3JrIGZvciBGYW0xN2guIEZvciBvbGRlciBzeXN0ZW1zIEkgdGhpbmsg d2UgY2FuIGxvb2sgYXQNCkQxOEYyeDk0X2RjdFsxOjBdW0Rpc0RyYW1JbnRlcmZhY2VdDQoNCk9y IG1heWJlIHdlIGhhdmUgYSBzZXBhcmF0ZSBmdW5jdGlvbiB0byBjaGVjayBmb3IgZW5hYmxlZCBt ZW1vcnkgY29udHJvbGxlcnMNCmJlZm9yZSB3ZSBjaGVjayBmb3IgRUNDPw0KDQpUaGFua3MsDQpZ YXplbgoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZWRhYy9hbWQ2NF9lZGFjLmMgYi9kcml2ZXJzL2Vk YWMvYW1kNjRfZWRhYy5jDQppbmRleCAzMjljYjk2Zjg4NmYuLjZlMjExZWQ2ZDQxOSAxMDA2NDQN Ci0tLSBhL2RyaXZlcnMvZWRhYy9hbWQ2NF9lZGFjLmMNCisrKyBiL2RyaXZlcnMvZWRhYy9hbWQ2 NF9lZGFjLmMNCkBAIC0zMDYxLDEwICszMDYxLDEyIEBAIHN0YXRpYyBib29sIGVjY19lbmFibGVk KHN0cnVjdCBwY2lfZGV2ICpGMywgdTE2IG5pZCkNCiAgICAgICAgICAgICAgICB9DQogDQogICAg ICAgICAgICAgICAgLyogQ2hlY2sgd2hldGhlciBhdCBsZWFzdCBvbmUgVU1DIGlzIGVuYWJsZWQ6 ICovDQotICAgICAgICAgICAgICAgaWYgKHVtY19lbl9tYXNrKQ0KKyAgICAgICAgICAgICAgIGlm ICh1bWNfZW5fbWFzaykgew0KICAgICAgICAgICAgICAgICAgICAgICAgZWNjX2VuID0gdW1jX2Vu X21hc2sgPT0gZWNjX2VuX21hc2s7DQotICAgICAgICAgICAgICAgZWxzZQ0KLSAgICAgICAgICAg ICAgICAgICAgICAgZWRhY19kYmcoMCwgIk5vZGUgJWQ6IE5vIGVuYWJsZWQgVU1Dcy5cbiIsIG5p ZCk7DQorICAgICAgICAgICAgICAgfSBlbHNlIHsNCisgICAgICAgICAgICAgICAgICAgICAgIGFt ZDY0X2luZm8oIk5vZGUgJWQ6IE5vIERJTU1zIHBvcHVsYXRlZCBvbiBtZW1vcnkgY29udHJvbGxl ci5cbiIsIG5pZCk7DQorICAgICAgICAgICAgICAgICAgICAgICByZXR1cm4gZmFsc2U7DQorICAg ICAgICAgICAgICAgfQ0KIA0KICAgICAgICAgICAgICAgIC8qIEFzc3VtZSBVTUMgTUNBIGJhbmtz IGFyZSBlbmFibGVkLiAqLw0KICAgICAgICAgICAgICAgIG5iX21jZV9lbiA9IHRydWU7DQo=