[PATCH] drm/amdgpu: convert sienna_cichlid_populate_umd_state_clk() to use IP version

[PATCH] drm/amdgpu: convert sienna_cichlid_populate_umd_state_clk() to use IP version

[Alex Deucher]

Rather than asic type.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 .../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c    | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 78f3d9e722bb..871435cca3c1 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -1464,19 +1464,19 @@ static int sienna_cichlid_populate_umd_state_clk(struct smu_context *smu)
 	pstate_table->socclk_pstate.min = soc_table->min;
 	pstate_table->socclk_pstate.peak = soc_table->max;
 
-	switch (adev->asic_type) {
-	case CHIP_SIENNA_CICHLID:
-	case CHIP_NAVY_FLOUNDER:
+	switch (adev->ip_versions[MP1_HWIP][0]) {
+	case IP_VERSION(11, 0, 7):
+	case IP_VERSION(11, 0, 11):
 		pstate_table->gfxclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK;
 		pstate_table->uclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK;
 		pstate_table->socclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_SOCCLK;
 		break;
-	case CHIP_DIMGREY_CAVEFISH:
+	case IP_VERSION(11, 0, 12):
 		pstate_table->gfxclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_GFXCLK;
 		pstate_table->uclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_MEMCLK;
 		pstate_table->socclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_SOCCLK;
 		break;
-	case CHIP_BEIGE_GOBY:
+	case IP_VERSION(11, 0, 13):
 		pstate_table->gfxclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_GFXCLK;
 		pstate_table->uclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_MEMCLK;
 		pstate_table->socclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_SOCCLK;
-- 
2.35.3

[PATCH] drm/amdgpu: simplify the logic in amdgpu_device_parse_gpu_info_fw()

[Alex Deucher]

Drop all of the extra cases in the default case.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 29 ----------------------
 1 file changed, 29 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 4daa0e893965..7f7d475c46b4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1942,35 +1942,6 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
 	}
 
 	switch (adev->asic_type) {
-#ifdef CONFIG_DRM_AMDGPU_SI
-	case CHIP_VERDE:
-	case CHIP_TAHITI:
-	case CHIP_PITCAIRN:
-	case CHIP_OLAND:
-	case CHIP_HAINAN:
-#endif
-#ifdef CONFIG_DRM_AMDGPU_CIK
-	case CHIP_BONAIRE:
-	case CHIP_HAWAII:
-	case CHIP_KAVERI:
-	case CHIP_KABINI:
-	case CHIP_MULLINS:
-#endif
-	case CHIP_TOPAZ:
-	case CHIP_TONGA:
-	case CHIP_FIJI:
-	case CHIP_POLARIS10:
-	case CHIP_POLARIS11:
-	case CHIP_POLARIS12:
-	case CHIP_VEGAM:
-	case CHIP_CARRIZO:
-	case CHIP_STONEY:
-	case CHIP_VEGA20:
-	case CHIP_ALDEBARAN:
-	case CHIP_SIENNA_CICHLID:
-	case CHIP_NAVY_FLOUNDER:
-	case CHIP_DIMGREY_CAVEFISH:
-	case CHIP_BEIGE_GOBY:
 	default:
 		return 0;
 	case CHIP_VEGA10:
-- 
2.35.3

[PATCH] drm/amdgpu: simplify amdgpu_ucode_get_load_type()

[Alex Deucher]

This is the same as the default case, so drop the extra
logic.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 20 --------------------
 1 file changed, 20 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
index ffa4c0d207db..c312577df596 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
@@ -486,26 +486,6 @@ amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type)
 	case CHIP_POLARIS12:
 	case CHIP_VEGAM:
 		return AMDGPU_FW_LOAD_SMU;
-	case CHIP_VEGA10:
-	case CHIP_RAVEN:
-	case CHIP_VEGA12:
-	case CHIP_VEGA20:
-	case CHIP_ARCTURUS:
-	case CHIP_RENOIR:
-	case CHIP_NAVI10:
-	case CHIP_NAVI14:
-	case CHIP_NAVI12:
-	case CHIP_SIENNA_CICHLID:
-	case CHIP_NAVY_FLOUNDER:
-	case CHIP_VANGOGH:
-	case CHIP_DIMGREY_CAVEFISH:
-	case CHIP_ALDEBARAN:
-	case CHIP_BEIGE_GOBY:
-	case CHIP_YELLOW_CARP:
-		if (!load_type)
-			return AMDGPU_FW_LOAD_DIRECT;
-		else
-			return AMDGPU_FW_LOAD_PSP;
 	case CHIP_CYAN_SKILLFISH:
 		if (!(load_type &&
 		      adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2))
-- 
2.35.3

[PATCH] drm/amdgpu: simplify amdgpu_device_asic_has_dc_support()

[Alex Deucher]

Drop extra cases in the default case.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 26 ----------------------
 1 file changed, 26 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 7f7d475c46b4..dab0c59bfb1b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3292,32 +3292,6 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
 		 * cause regressions.
 		 */
 		return amdgpu_dc > 0;
-	case CHIP_HAWAII:
-	case CHIP_CARRIZO:
-	case CHIP_STONEY:
-	case CHIP_POLARIS10:
-	case CHIP_POLARIS11:
-	case CHIP_POLARIS12:
-	case CHIP_VEGAM:
-	case CHIP_TONGA:
-	case CHIP_FIJI:
-	case CHIP_VEGA10:
-	case CHIP_VEGA12:
-	case CHIP_VEGA20:
-#if defined(CONFIG_DRM_AMD_DC_DCN)
-	case CHIP_RAVEN:
-	case CHIP_NAVI10:
-	case CHIP_NAVI14:
-	case CHIP_NAVI12:
-	case CHIP_RENOIR:
-	case CHIP_CYAN_SKILLFISH:
-	case CHIP_SIENNA_CICHLID:
-	case CHIP_NAVY_FLOUNDER:
-	case CHIP_DIMGREY_CAVEFISH:
-	case CHIP_BEIGE_GOBY:
-	case CHIP_VANGOGH:
-	case CHIP_YELLOW_CARP:
-#endif
 	default:
 		return amdgpu_dc != 0;
 #else
-- 
2.35.3

[PATCH] drm/amdgpu: fix up comment in amdgpu_device_asic_has_dc_support()

[Alex Deucher]

LVDS support was implemented in DC a while ago.  Just DAC
support is left to do.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index dab0c59bfb1b..fa26e462e750 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3286,7 +3286,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
 	case CHIP_MULLINS:
 		/*
 		 * We have systems in the wild with these ASICs that require
-		 * LVDS and VGA support which is not supported with DC.
+		 * VGA support which is not supported with DC.
 		 *
 		 * Fallback to the non-DC driver here by default so as not to
 		 * cause regressions.
-- 
2.35.3

[PATCH] drm/amdgpu: convert sienna_cichlid_get_default_config_table_settings() to IP version

[Alex Deucher]

Use IP version rather than asic type.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 871435cca3c1..1c5ce9c5cba9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -4192,7 +4192,7 @@ static int sienna_cichlid_get_default_config_table_settings(struct smu_context *
 	table->gfx_activity_average_tau = 10;
 	table->mem_activity_average_tau = 10;
 	table->socket_power_average_tau = 100;
-	if (adev->asic_type != CHIP_SIENNA_CICHLID)
+	if (adev->ip_versions[MP1_HWIP][0] != IP_VERSION(11, 0, 7))
 		table->apu_socket_power_average_tau = 100;
 
 	return 0;
-- 
2.35.3

[PATCH] drm/amdgpu: convert nbio_v2_3_clear_doorbell_interrupt() to IP version

[Alex Deucher]

Check IP version rather than asic type.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
index 6cd1fb2eb913..34c610b9157d 100644
--- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
@@ -547,7 +547,7 @@ static void nbio_v2_3_clear_doorbell_interrupt(struct amdgpu_device *adev)
 {
 	uint32_t reg, reg_data;
 
-	if (adev->asic_type != CHIP_SIENNA_CICHLID)
+	if (adev->ip_versions[NBIO_HWIP][0] != IP_VERSION(3, 3, 0))
 		return;
 
 	reg = RREG32_SOC15(NBIO, 0, mmBIF_RB_CNTL);
-- 
2.35.3

RE: [PATCH] drm/amdgpu: simplify amdgpu_device_asic_has_dc_support()

[Chen, Guchun]

Reviewed-by: Guchun Chen <guchun.chen@amd.com>

Regards,
Guchun

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Wednesday, May 25, 2022 10:09 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: [PATCH] drm/amdgpu: simplify amdgpu_device_asic_has_dc_support()

Drop extra cases in the default case.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 26 ----------------------
 1 file changed, 26 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 7f7d475c46b4..dab0c59bfb1b 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3292,32 +3292,6 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
 		 * cause regressions.
 		 */
 		return amdgpu_dc > 0;
-	case CHIP_HAWAII:
-	case CHIP_CARRIZO:
-	case CHIP_STONEY:
-	case CHIP_POLARIS10:
-	case CHIP_POLARIS11:
-	case CHIP_POLARIS12:
-	case CHIP_VEGAM:
-	case CHIP_TONGA:
-	case CHIP_FIJI:
-	case CHIP_VEGA10:
-	case CHIP_VEGA12:
-	case CHIP_VEGA20:
-#if defined(CONFIG_DRM_AMD_DC_DCN)
-	case CHIP_RAVEN:
-	case CHIP_NAVI10:
-	case CHIP_NAVI14:
-	case CHIP_NAVI12:
-	case CHIP_RENOIR:
-	case CHIP_CYAN_SKILLFISH:
-	case CHIP_SIENNA_CICHLID:
-	case CHIP_NAVY_FLOUNDER:
-	case CHIP_DIMGREY_CAVEFISH:
-	case CHIP_BEIGE_GOBY:
-	case CHIP_VANGOGH:
-	case CHIP_YELLOW_CARP:
-#endif
 	default:
 		return amdgpu_dc != 0;
 #else
-- 
2.35.3

RE: [PATCH] drm/amdgpu: convert sienna_cichlid_get_default_config_table_settings() to IP version

[Chen, Guchun]

Reviewed-by: Guchun Chen <guchun.chen@amd.com>

Regards,
Guchun

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Wednesday, May 25, 2022 10:09 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander <Alexander.Deucher@amd.com>
Subject: [PATCH] drm/amdgpu: convert sienna_cichlid_get_default_config_table_settings() to IP version

Use IP version rather than asic type.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---
 drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
index 871435cca3c1..1c5ce9c5cba9 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
@@ -4192,7 +4192,7 @@ static int sienna_cichlid_get_default_config_table_settings(struct smu_context *
 	table->gfx_activity_average_tau = 10;
 	table->mem_activity_average_tau = 10;
 	table->socket_power_average_tau = 100;
-	if (adev->asic_type != CHIP_SIENNA_CICHLID)
+	if (adev->ip_versions[MP1_HWIP][0] != IP_VERSION(11, 0, 7))
 		table->apu_socket_power_average_tau = 100;
 
 	return 0;
-- 
2.35.3

Re: [PATCH] drm/amdgpu: convert sienna_cichlid_populate_umd_state_clk() to use IP version

[Alex Deucher]

Ping?

On Tue, May 24, 2022 at 10:09 PM Alex Deucher <alexander.deucher@amd.com> wrote:
>
> Rather than asic type.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  .../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c    | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> index 78f3d9e722bb..871435cca3c1 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> @@ -1464,19 +1464,19 @@ static int sienna_cichlid_populate_umd_state_clk(struct smu_context *smu)
>         pstate_table->socclk_pstate.min = soc_table->min;
>         pstate_table->socclk_pstate.peak = soc_table->max;
>
> -       switch (adev->asic_type) {
> -       case CHIP_SIENNA_CICHLID:
> -       case CHIP_NAVY_FLOUNDER:
> +       switch (adev->ip_versions[MP1_HWIP][0]) {
> +       case IP_VERSION(11, 0, 7):
> +       case IP_VERSION(11, 0, 11):
>                 pstate_table->gfxclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK;
>                 pstate_table->uclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK;
>                 pstate_table->socclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_SOCCLK;
>                 break;
> -       case CHIP_DIMGREY_CAVEFISH:
> +       case IP_VERSION(11, 0, 12):
>                 pstate_table->gfxclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_GFXCLK;
>                 pstate_table->uclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_MEMCLK;
>                 pstate_table->socclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_SOCCLK;
>                 break;
> -       case CHIP_BEIGE_GOBY:
> +       case IP_VERSION(11, 0, 13):
>                 pstate_table->gfxclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_GFXCLK;
>                 pstate_table->uclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_MEMCLK;
>                 pstate_table->socclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_SOCCLK;
> --
> 2.35.3
>

Re: [PATCH] drm/amdgpu: simplify the logic in amdgpu_device_parse_gpu_info_fw()

[Alex Deucher]

Ping?

On Tue, May 24, 2022 at 10:09 PM Alex Deucher <alexander.deucher@amd.com> wrote:
>
> Drop all of the extra cases in the default case.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 29 ----------------------
>  1 file changed, 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 4daa0e893965..7f7d475c46b4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1942,35 +1942,6 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
>         }
>
>         switch (adev->asic_type) {
> -#ifdef CONFIG_DRM_AMDGPU_SI
> -       case CHIP_VERDE:
> -       case CHIP_TAHITI:
> -       case CHIP_PITCAIRN:
> -       case CHIP_OLAND:
> -       case CHIP_HAINAN:
> -#endif
> -#ifdef CONFIG_DRM_AMDGPU_CIK
> -       case CHIP_BONAIRE:
> -       case CHIP_HAWAII:
> -       case CHIP_KAVERI:
> -       case CHIP_KABINI:
> -       case CHIP_MULLINS:
> -#endif
> -       case CHIP_TOPAZ:
> -       case CHIP_TONGA:
> -       case CHIP_FIJI:
> -       case CHIP_POLARIS10:
> -       case CHIP_POLARIS11:
> -       case CHIP_POLARIS12:
> -       case CHIP_VEGAM:
> -       case CHIP_CARRIZO:
> -       case CHIP_STONEY:
> -       case CHIP_VEGA20:
> -       case CHIP_ALDEBARAN:
> -       case CHIP_SIENNA_CICHLID:
> -       case CHIP_NAVY_FLOUNDER:
> -       case CHIP_DIMGREY_CAVEFISH:
> -       case CHIP_BEIGE_GOBY:
>         default:
>                 return 0;
>         case CHIP_VEGA10:
> --
> 2.35.3
>

Re: [PATCH] drm/amdgpu: convert nbio_v2_3_clear_doorbell_interrupt() to IP version

[Alex Deucher]

Ping?

On Tue, May 24, 2022 at 10:09 PM Alex Deucher <alexander.deucher@amd.com> wrote:
>
> Check IP version rather than asic type.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
> index 6cd1fb2eb913..34c610b9157d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
> @@ -547,7 +547,7 @@ static void nbio_v2_3_clear_doorbell_interrupt(struct amdgpu_device *adev)
>  {
>         uint32_t reg, reg_data;
>
> -       if (adev->asic_type != CHIP_SIENNA_CICHLID)
> +       if (adev->ip_versions[NBIO_HWIP][0] != IP_VERSION(3, 3, 0))
>                 return;
>
>         reg = RREG32_SOC15(NBIO, 0, mmBIF_RB_CNTL);
> --
> 2.35.3
>

Re: [PATCH] drm/amdgpu: fix up comment in amdgpu_device_asic_has_dc_support()

[Alex Deucher]

Ping?

On Tue, May 24, 2022 at 10:09 PM Alex Deucher <alexander.deucher@amd.com> wrote:
>
> LVDS support was implemented in DC a while ago.  Just DAC
> support is left to do.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index dab0c59bfb1b..fa26e462e750 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -3286,7 +3286,7 @@ bool amdgpu_device_asic_has_dc_support(enum amd_asic_type asic_type)
>         case CHIP_MULLINS:
>                 /*
>                  * We have systems in the wild with these ASICs that require
> -                * LVDS and VGA support which is not supported with DC.
> +                * VGA support which is not supported with DC.
>                  *
>                  * Fallback to the non-DC driver here by default so as not to
>                  * cause regressions.
> --
> 2.35.3
>

RE: [PATCH] drm/amdgpu: convert sienna_cichlid_populate_umd_state_clk() to use IP version

[Chen, Guchun]

Reviewed-by: Guchun Chen <guchun.chen@amd.com>

Regards,
Guchun

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Wednesday, June 1, 2022 5:13 AM
To: Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/amdgpu: convert sienna_cichlid_populate_umd_state_clk() to use IP version

Ping?

On Tue, May 24, 2022 at 10:09 PM Alex Deucher <alexander.deucher@amd.com> wrote:
>
> Rather than asic type.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  .../gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c    | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> index 78f3d9e722bb..871435cca3c1 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c
> @@ -1464,19 +1464,19 @@ static int sienna_cichlid_populate_umd_state_clk(struct smu_context *smu)
>         pstate_table->socclk_pstate.min = soc_table->min;
>         pstate_table->socclk_pstate.peak = soc_table->max;
>
> -       switch (adev->asic_type) {
> -       case CHIP_SIENNA_CICHLID:
> -       case CHIP_NAVY_FLOUNDER:
> +       switch (adev->ip_versions[MP1_HWIP][0]) {
> +       case IP_VERSION(11, 0, 7):
> +       case IP_VERSION(11, 0, 11):
>                 pstate_table->gfxclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_GFXCLK;
>                 pstate_table->uclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_MEMCLK;
>                 pstate_table->socclk_pstate.standard = SIENNA_CICHLID_UMD_PSTATE_PROFILING_SOCCLK;
>                 break;
> -       case CHIP_DIMGREY_CAVEFISH:
> +       case IP_VERSION(11, 0, 12):
>                 pstate_table->gfxclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_GFXCLK;
>                 pstate_table->uclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_MEMCLK;
>                 pstate_table->socclk_pstate.standard = DIMGREY_CAVEFISH_UMD_PSTATE_PROFILING_SOCCLK;
>                 break;
> -       case CHIP_BEIGE_GOBY:
> +       case IP_VERSION(11, 0, 13):
>                 pstate_table->gfxclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_GFXCLK;
>                 pstate_table->uclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_MEMCLK;
>                 pstate_table->socclk_pstate.standard = BEIGE_GOBY_UMD_PSTATE_PROFILING_SOCCLK;
> --
> 2.35.3
>

RE: [PATCH] drm/amdgpu: simplify the logic in amdgpu_device_parse_gpu_info_fw()

[Chen, Guchun]

Reviewed-by: Guchun Chen <guchun.chen@amd.com>

Regards,
Guchun

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Wednesday, June 1, 2022 5:13 AM
To: Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/amdgpu: simplify the logic in amdgpu_device_parse_gpu_info_fw()

Ping?

On Tue, May 24, 2022 at 10:09 PM Alex Deucher <alexander.deucher@amd.com> wrote:
>
> Drop all of the extra cases in the default case.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 29 ----------------------
>  1 file changed, 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index 4daa0e893965..7f7d475c46b4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -1942,35 +1942,6 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
>         }
>
>         switch (adev->asic_type) {
> -#ifdef CONFIG_DRM_AMDGPU_SI
> -       case CHIP_VERDE:
> -       case CHIP_TAHITI:
> -       case CHIP_PITCAIRN:
> -       case CHIP_OLAND:
> -       case CHIP_HAINAN:
> -#endif
> -#ifdef CONFIG_DRM_AMDGPU_CIK
> -       case CHIP_BONAIRE:
> -       case CHIP_HAWAII:
> -       case CHIP_KAVERI:
> -       case CHIP_KABINI:
> -       case CHIP_MULLINS:
> -#endif
> -       case CHIP_TOPAZ:
> -       case CHIP_TONGA:
> -       case CHIP_FIJI:
> -       case CHIP_POLARIS10:
> -       case CHIP_POLARIS11:
> -       case CHIP_POLARIS12:
> -       case CHIP_VEGAM:
> -       case CHIP_CARRIZO:
> -       case CHIP_STONEY:
> -       case CHIP_VEGA20:
> -       case CHIP_ALDEBARAN:
> -       case CHIP_SIENNA_CICHLID:
> -       case CHIP_NAVY_FLOUNDER:
> -       case CHIP_DIMGREY_CAVEFISH:
> -       case CHIP_BEIGE_GOBY:
>         default:
>                 return 0;
>         case CHIP_VEGA10:
> --
> 2.35.3
>

RE: [PATCH] drm/amdgpu: convert nbio_v2_3_clear_doorbell_interrupt() to IP version

[Chen, Guchun]

Reviewed-by: Guchun Chen <guchun.chen@amd.com>

Regards,
Guchun

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Wednesday, June 1, 2022 5:14 AM
To: Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/amdgpu: convert nbio_v2_3_clear_doorbell_interrupt() to IP version

Ping?

On Tue, May 24, 2022 at 10:09 PM Alex Deucher <alexander.deucher@amd.com> wrote:
>
> Check IP version rather than asic type.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c 
> b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
> index 6cd1fb2eb913..34c610b9157d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v2_3.c
> @@ -547,7 +547,7 @@ static void 
> nbio_v2_3_clear_doorbell_interrupt(struct amdgpu_device *adev)  {
>         uint32_t reg, reg_data;
>
> -       if (adev->asic_type != CHIP_SIENNA_CICHLID)
> +       if (adev->ip_versions[NBIO_HWIP][0] != IP_VERSION(3, 3, 0))
>                 return;
>
>         reg = RREG32_SOC15(NBIO, 0, mmBIF_RB_CNTL);
> --
> 2.35.3
>

RE: [PATCH] drm/amdgpu: fix up comment in amdgpu_device_asic_has_dc_support()

[Quan, Evan]

[AMD Official Use Only - General]

Reviewed-by: Evan Quan <evan.quan@amd.com>

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex
> Deucher
> Sent: Wednesday, May 25, 2022 10:09 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander <Alexander.Deucher@amd.com>
> Subject: [PATCH] drm/amdgpu: fix up comment in
> amdgpu_device_asic_has_dc_support()
> 
> LVDS support was implemented in DC a while ago.  Just DAC support is left to
> do.
> 
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> index dab0c59bfb1b..fa26e462e750 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> @@ -3286,7 +3286,7 @@ bool amdgpu_device_asic_has_dc_support(enum
> amd_asic_type asic_type)
>  	case CHIP_MULLINS:
>  		/*
>  		 * We have systems in the wild with these ASICs that require
> -		 * LVDS and VGA support which is not supported with DC.
> +		 * VGA support which is not supported with DC.
>  		 *
>  		 * Fallback to the non-DC driver here by default so as not to
>  		 * cause regressions.
> --
> 2.35.3

Re: [PATCH] drm/amdgpu: simplify amdgpu_ucode_get_load_type()

[Alex Deucher]

Ping?

Alex

On Tue, May 24, 2022 at 10:09 PM Alex Deucher <alexander.deucher@amd.com> wrote:
>
> This is the same as the default case, so drop the extra
> logic.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 20 --------------------
>  1 file changed, 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> index ffa4c0d207db..c312577df596 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> @@ -486,26 +486,6 @@ amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type)
>         case CHIP_POLARIS12:
>         case CHIP_VEGAM:
>                 return AMDGPU_FW_LOAD_SMU;
> -       case CHIP_VEGA10:
> -       case CHIP_RAVEN:
> -       case CHIP_VEGA12:
> -       case CHIP_VEGA20:
> -       case CHIP_ARCTURUS:
> -       case CHIP_RENOIR:
> -       case CHIP_NAVI10:
> -       case CHIP_NAVI14:
> -       case CHIP_NAVI12:
> -       case CHIP_SIENNA_CICHLID:
> -       case CHIP_NAVY_FLOUNDER:
> -       case CHIP_VANGOGH:
> -       case CHIP_DIMGREY_CAVEFISH:
> -       case CHIP_ALDEBARAN:
> -       case CHIP_BEIGE_GOBY:
> -       case CHIP_YELLOW_CARP:
> -               if (!load_type)
> -                       return AMDGPU_FW_LOAD_DIRECT;
> -               else
> -                       return AMDGPU_FW_LOAD_PSP;
>         case CHIP_CYAN_SKILLFISH:
>                 if (!(load_type &&
>                       adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2))
> --
> 2.35.3
>

RE: [PATCH] drm/amdgpu: simplify amdgpu_ucode_get_load_type()

[Chen, Guchun]

Reviewed-by: Guchun Chen <guchun.chen@amd.com>

Regards,
Guchun

-----Original Message-----
From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Alex Deucher
Sent: Tuesday, June 7, 2022 2:40 AM
To: Deucher, Alexander <Alexander.Deucher@amd.com>
Cc: amd-gfx list <amd-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/amdgpu: simplify amdgpu_ucode_get_load_type()

Ping?

Alex

On Tue, May 24, 2022 at 10:09 PM Alex Deucher <alexander.deucher@amd.com> wrote:
>
> This is the same as the default case, so drop the extra logic.
>
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 20 --------------------
>  1 file changed, 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> index ffa4c0d207db..c312577df596 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
> @@ -486,26 +486,6 @@ amdgpu_ucode_get_load_type(struct amdgpu_device *adev, int load_type)
>         case CHIP_POLARIS12:
>         case CHIP_VEGAM:
>                 return AMDGPU_FW_LOAD_SMU;
> -       case CHIP_VEGA10:
> -       case CHIP_RAVEN:
> -       case CHIP_VEGA12:
> -       case CHIP_VEGA20:
> -       case CHIP_ARCTURUS:
> -       case CHIP_RENOIR:
> -       case CHIP_NAVI10:
> -       case CHIP_NAVI14:
> -       case CHIP_NAVI12:
> -       case CHIP_SIENNA_CICHLID:
> -       case CHIP_NAVY_FLOUNDER:
> -       case CHIP_VANGOGH:
> -       case CHIP_DIMGREY_CAVEFISH:
> -       case CHIP_ALDEBARAN:
> -       case CHIP_BEIGE_GOBY:
> -       case CHIP_YELLOW_CARP:
> -               if (!load_type)
> -                       return AMDGPU_FW_LOAD_DIRECT;
> -               else
> -                       return AMDGPU_FW_LOAD_PSP;
>         case CHIP_CYAN_SKILLFISH:
>                 if (!(load_type &&
>                       adev->apu_flags & AMD_APU_IS_CYAN_SKILLFISH2))
> --
> 2.35.3
>