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From: Avri Altman <Avri.Altman@wdc.com>
To: "Adrian Hunter" <adrian.hunter@intel.com>,
	"Christian Löhle" <CLoehle@hyperstone.com>,
	"Michael Wu" <michael@allwinnertech.com>,
	"ulf.hansson@linaro.org" <ulf.hansson@linaro.org>,
	"beanhuo@micron.com" <beanhuo@micron.com>,
	"porzio@gmail.com" <porzio@gmail.com>
Cc: "linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	allwinner-opensource-support 
	<allwinner-opensource-support@allwinnertech.com>
Subject: RE: [PATCH] mmc: block: enable cache-flushing when mmc cache is on
Date: Sun, 27 Mar 2022 08:09:38 +0000	[thread overview]
Message-ID: <DM6PR04MB657599A82C0513C46B80EB47FC1C9@DM6PR04MB6575.namprd04.prod.outlook.com> (raw)
In-Reply-To: <a1230f11-a2dd-1959-5444-28c57d3babf6@intel.com>

 
> On 16.3.2022 16.46, Christian Löhle wrote:
> >> So we are not going to let the block layer know about SD cache?
> >> Or is it a separate change?
> >
> > I have some code for this laying around, but as it requires reading,
> > parsing and writing Function Registers, in particular PEH, it's a lot of
> boilerplate code to get the functionality, but I'll clean it up and send a patch
> in the coming weeks.
> >
> 
> We have the sd cache flush.  We would presumably just need to call
> blk_queue_write_cache() for the !mmc_card_mmc(card) case e.g.
> 
>         if (mmc_has_reliable_write(card)) {
>                 md->flags |= MMC_BLK_REL_WR;
>                 enable_fua = true;
>         }
> 
>         if (mmc_cache_enabled(card->host))
>                 enable_cache = true;
> 
>         blk_queue_write_cache(md->queue.queue, enable_cache, enable_fua);
> 
> Avri, were you objecting to that?
Hi, Sorry for my late response.
Yes - That's fine.

Thanks,
Avri

> 
> >
> >
> >
> >
> > From: Adrian Hunter <adrian.hunter@intel.com>
> > Sent: Wednesday, March 16, 2022 12:28 PM
> > To: Avri Altman; Michael Wu; ulf.hansson@linaro.org;
> > beanhuo@micron.com; porzio@gmail.com
> > Cc: linux-mmc@vger.kernel.org; linux-kernel@vger.kernel.org;
> > allwinner-opensource-support
> > Subject: Re: [PATCH] mmc: block: enable cache-flushing when mmc cache
> > is on
> >
> > On 16.3.2022 13.09, Avri Altman wrote:
> >>> Hi Avril & Adrian,
> >>> Thanks for your efforts. Could we have an agreement now --
> >>>
> >>> 1. enabling-cache and cmd23/reliable-write should be independent;
> >>>
> >>> Here's what I found in the spec JESD84-B51:
> >>>   > 6.6.31 Cache
> >>>   > Caching of data shall apply only for the single block
> >>>   > read/write(CMD17/24), pre-defined multiple block
> >>>   > read/write(CMD23+CMD18/25) and open ended multiple block
> >>>   > read/write(CMD18/25+CMD12) commands and excludes any other
> access
> >>>   > e.g., to the register space(e.g., CMD6).
> >>> Which means with CMD18/25+CMD12 (without using CMD23), the cache
> can
> >>> also be enabled. Maybe this could be an evidence of the independence
> >>> between enabling-cache and cmd23/reliable-write?
> >> Acked-by: Avri Altman <avri.altman@wdc.com>
> >>
> >> Thanks,
> >> Avri
> >>
> >>>
> >>> 2. We don't consider supporting SD in this change.
> >>>
> >>>   > On 14/03/2022 19:10, Avri Altman wrote:
> >>>   >> Here is what our SD system guys wrote:
> >>>   >> " In SD we don’t support reliable write and this eMMC driver may not
> >>>   >>    be utilizing the cache feature we added in SD5.0.
> >>>   >>   The method of cache flush is different between SD and eMMC."
> >>>   >>
> >>>   >> So adding SD seems to be out of scope of this change.
> >>>
> >>> Is there anything else I can do about this patch? Thanks again.
> >
> > So we are not going to let the block layer know about SD cache?
> > Or is it a separate change?
> >     =
> > Hyperstone GmbH | Reichenaustr. 39a  | 78467 Konstanz Managing
> > Director: Dr. Jan Peter Berns.
> > Commercial register of local courts: Freiburg HRB381782
> >


  parent reply	other threads:[~2022-03-27  8:09 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-12  4:43 [PATCH] mmc: block: enable cache-flushing when mmc cache is on Michael Wu
2022-03-14  6:54 ` Adrian Hunter
2022-03-14  9:20   ` Michael Wu
2022-03-14  9:37     ` Avri Altman
2022-03-16  9:54       ` Michael Wu
2022-03-16 11:09         ` Avri Altman
2022-03-16 11:28           ` Adrian Hunter
2022-03-16 14:46             ` Christian Löhle
2022-03-16 16:05               ` Adrian Hunter
2022-03-17  9:14                 ` Ulf Hansson
2022-03-24 11:27                   ` Ulf Hansson
2022-03-25  5:45                     ` Michael Wu
2022-03-25 10:13                       ` Ulf Hansson
2022-03-28 10:11                         ` Michael Wu
2022-03-28 11:38                           ` Ulf Hansson
2022-03-29  9:08                             ` Michael Wu
2022-03-29  9:53                               ` Ulf Hansson
2022-03-27  8:09                 ` Avri Altman [this message]
2022-03-14 11:10     ` Avri Altman
2022-03-14  7:26 ` Avri Altman
2022-03-14 10:32   ` Adrian Hunter

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