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Tue, 2 Nov 2021 02:44:54 +0000 From: "Guo, Junfeng" To: "Zhang, Qi Z" , "Wu, Jingjing" , "Xing, Beilei" CC: "dev@dpdk.org" , "Yigit, Ferruh" , "Xu, Ting" Thread-Topic: [PATCH v8 4/4] net/ice: enable protocol agnostic flow offloading in FDIR Thread-Index: AQHXzvu0vW2NO4BzJEahDAen8Pr+t6vvWhcAgAAm8eA= Date: Tue, 2 Nov 2021 02:44:54 +0000 Message-ID: References: <20211028091346.1674650-5-junfeng.guo@intel.com> <20211101083612.2380503-1-junfeng.guo@intel.com> <20211101083612.2380503-5-junfeng.guo@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-reaction: no-action dlp-version: 11.6.200.16 authentication-results: intel.com; dkim=none (message not signed) header.d=none;intel.com; dmarc=none action=none header.from=intel.com; x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: ef0055b3-1ba2-4197-249f-08d99daac05e x-ms-traffictypediagnostic: DM5PR11MB1689: x-ld-processed: 46c98d88-e344-4ed4-8496-4ed7712e255d,ExtAddr x-microsoft-antispam-prvs: x-ms-oob-tlc-oobclassifiers: OLM:10000; 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DM6PR11MB3723.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: ef0055b3-1ba2-4197-249f-08d99daac05e X-MS-Exchange-CrossTenant-originalarrivaltime: 02 Nov 2021 02:44:54.5383 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: jNm1Q1sR3ubd7mrYsFPBgAevWZXzvys756N8VSOJSvGzBdpy/zsU0AMbo6m016VnVS6o5CDovYXWDZjOPNuDKQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR11MB1689 X-OriginatorOrg: intel.com Subject: Re: [dpdk-dev] [PATCH v8 4/4] net/ice: enable protocol agnostic flow offloading in FDIR X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Zhang, Qi Z > Sent: Tuesday, November 2, 2021 07:56 > To: Guo, Junfeng ; Wu, Jingjing > ; Xing, Beilei > Cc: dev@dpdk.org; Yigit, Ferruh ; Xu, Ting > > Subject: RE: [PATCH v8 4/4] net/ice: enable protocol agnostic flow > offloading in FDIR >=20 >=20 >=20 > > -----Original Message----- > > From: Guo, Junfeng > > Sent: Monday, November 1, 2021 4:36 PM > > To: Zhang, Qi Z ; Wu, Jingjing > ; > > Xing, Beilei > > Cc: dev@dpdk.org; Yigit, Ferruh ; Xu, Ting > > ; Guo, Junfeng > > Subject: [PATCH v8 4/4] net/ice: enable protocol agnostic flow > offloading in > > FDIR > > > > Protocol agnostic flow offloading in Flow Director is enabled by this > patch > > based on the Parser Library, using existing rte_flow raw API. > > > > Note that the raw flow requires: > > 1. byte string of raw target packet bits. > > 2. byte string of mask of target packet. > > > > Here is an example: > > FDIR matching ipv4 dst addr with 1.2.3.4 and redirect to queue 3: > > > > flow create 0 ingress pattern raw \ > > pattern spec \ > > > 000000000000000000000000080045000014000040004010000000000000 > 0 > > 1020304 \ pattern mask \ > > > 000000000000000000000000000000000000000000000000000000000000 > ff > > ffffff \ / end actions queue index 3 / mark id 3 / end > > > > Note that mask of some key bits (e.g., 0x0800 to indicate ipv4 proto) i= s > > optional in our cases. To avoid redundancy, we just omit the mask of > 0x0800 > > (with 0xFFFF) in the mask byte string example. The prefix '0x' for the > spec and > > mask byte (hex) strings are also omitted here. > > > > Signed-off-by: Junfeng Guo > > --- > > doc/guides/rel_notes/release_21_11.rst | 1 + > > drivers/net/ice/ice_ethdev.h | 14 ++ > > drivers/net/ice/ice_fdir_filter.c | 235 +++++++++++++++++++++++++ > > drivers/net/ice/ice_generic_flow.c | 7 + > > drivers/net/ice/ice_generic_flow.h | 3 + > > 5 files changed, 260 insertions(+) > > > > diff --git a/doc/guides/rel_notes/release_21_11.rst > > b/doc/guides/rel_notes/release_21_11.rst > > index 98d50a160b..36fdee0a98 100644 > > --- a/doc/guides/rel_notes/release_21_11.rst > > +++ b/doc/guides/rel_notes/release_21_11.rst > > @@ -167,6 +167,7 @@ New Features > > > > * **Updated Intel ice driver.** > > > > + * Added protocol agnostic flow offloading support in Flow Director. > > * Added 1PPS out support by a devargs. > > * Added IPv4 and L4 (TCP/UDP/SCTP) checksum hash support in RSS > flow. > > * Added DEV_RX_OFFLOAD_TIMESTAMP support. > > diff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.= h > index > > 0e42c4c063..bbfeb0cc23 100644 > > --- a/drivers/net/ice/ice_ethdev.h > > +++ b/drivers/net/ice/ice_ethdev.h > > @@ -318,6 +318,11 @@ struct ice_fdir_filter_conf { > > uint64_t input_set_o; /* used for non-tunnel or tunnel outer fields */ > > uint64_t input_set_i; /* only for tunnel inner fields */ > > uint32_t mark_flag; > > + > > +struct ice_parser_profile *prof; > > +const u8 *pkt_buf; > > +bool parser_ena; > > +u8 pkt_len; > > }; > > > > #define ICE_MAX_FDIR_FILTER_NUM(1024 * 16) > > @@ -487,6 +492,14 @@ struct ice_devargs { > > uint8_t pps_out_ena; > > }; > > > > +/** > > + * Structure to store fdir fv entry. > > + */ > > +struct ice_fdir_prof_info { > > +struct ice_parser_profile prof; > > +u64 fdir_actived_cnt; > > +}; > > + > > /** > > * Structure to store private data for each PF/VF instance. > > */ > > @@ -510,6 +523,7 @@ struct ice_adapter { > > struct rte_timecounter tx_tstamp_tc; > > bool ptp_ena; > > uint64_t time_hw; > > +struct ice_fdir_prof_info fdir_prof_info[ICE_MAX_PTGS]; > > #ifdef RTE_ARCH_X86 > > bool rx_use_avx2; > > bool rx_use_avx512; > > diff --git a/drivers/net/ice/ice_fdir_filter.c > b/drivers/net/ice/ice_fdir_filter.c > > index bd627e3aa8..888f0dea6d 100644 > > --- a/drivers/net/ice/ice_fdir_filter.c > > +++ b/drivers/net/ice/ice_fdir_filter.c > > @@ -107,6 +107,7 @@ > > ICE_INSET_NAT_T_ESP_SPI) > > > > static struct ice_pattern_match_item ice_fdir_pattern_list[] =3D { > > +{pattern_raw,ICE_INSET_NONE, > > ICE_INSET_NONE,ICE_INSET_NONE}, > > {pattern_ethertype,ICE_FDIR_INSET_ETH, > > ICE_INSET_NONE,ICE_INSET_NONE}, > > {pattern_eth_ipv4,ICE_FDIR_INSET_ETH_IPV4, > > ICE_INSET_NONE,ICE_INSET_NONE}, > > {pattern_eth_ipv4_udp,ICE_FDIR_INSET_ETH_IPV4_UDP, > > ICE_INSET_NONE,ICE_INSET_NONE}, > > @@ -1188,6 +1189,24 @@ ice_fdir_is_tunnel_profile(enum > > ice_fdir_tunnel_type tunnel_type) > > return 0; > > } > > > > +static int > > +ice_fdir_add_del_raw(struct ice_pf *pf, > > + struct ice_fdir_filter_conf *filter, > > + bool add) > > +{ > > +struct ice_hw *hw =3D ICE_PF_TO_HW(pf); > > + > > +unsigned char *pkt =3D (unsigned char *)pf->fdir.prg_pkt; > > +rte_memcpy(pkt, filter->pkt_buf, filter->pkt_len); > > + > > +struct ice_fltr_desc desc; > > +memset(&desc, 0, sizeof(desc)); > > +filter->input.comp_report =3D ICE_FXD_FLTR_QW0_COMP_REPORT_SW; > > +ice_fdir_get_prgm_desc(hw, &filter->input, &desc, add); > > + > > +return ice_fdir_programming(pf, &desc); } > > + > > static int > > ice_fdir_add_del_filter(struct ice_pf *pf, > > struct ice_fdir_filter_conf *filter, @@ -1303,6 +1322,72 @@ > > ice_fdir_create_filter(struct ice_adapter *ad, > > struct ice_fdir_fltr_pattern key; > > bool is_tun; > > int ret; > > +int i; > > + > > +if (filter->parser_ena) { > > +struct ice_hw *hw =3D ICE_PF_TO_HW(pf); > > + > > +int id =3D ice_find_first_bit(filter->prof->ptypes, UINT16_MAX); > > +int ptg =3D hw->blk[ICE_BLK_FD].xlt1.t[id]; > > +u16 ctrl_vsi =3D pf->fdir.fdir_vsi->idx; > > +u16 main_vsi =3D pf->main_vsi->idx; > > +bool fv_found =3D false; > > + > > +struct ice_fdir_prof_info *pi =3D &ad->fdir_prof_info[ptg]; > > +if (pi->fdir_actived_cnt !=3D 0) { > > +for (i =3D 0; i < ICE_MAX_FV_WORDS; i++) > > +if (pi->prof.fv[i].proto_id !=3D > > + filter->prof->fv[i].proto_id || > > + pi->prof.fv[i].offset !=3D > > + filter->prof->fv[i].offset || > > + pi->prof.fv[i].msk !=3D > > + filter->prof->fv[i].msk) > > +break; > > +if (i =3D=3D ICE_MAX_FV_WORDS) { > > +fv_found =3D true; > > +pi->fdir_actived_cnt++; > > +} > > +} > > + > > +if (!fv_found) { > > +ret =3D ice_flow_set_hw_prof(hw, main_vsi, ctrl_vsi, > > + filter->prof, ICE_BLK_FD); > > +if (ret) > > +return -rte_errno; > > +} > > + > > +ret =3D ice_fdir_add_del_raw(pf, filter, true); > > +if (ret) > > +return -rte_errno; > > + > > +if (!fv_found) { > > +for (i =3D 0; i < filter->prof->fv_num; i++) { > > +pi->prof.fv[i].proto_id =3D > > +filter->prof->fv[i].proto_id; > > +pi->prof.fv[i].offset =3D > > +filter->prof->fv[i].offset; > > +pi->prof.fv[i].spec =3D filter->prof->fv[i].spec; > > +pi->prof.fv[i].msk =3D filter->prof->fv[i].msk; > > +} > > +pi->fdir_actived_cnt =3D 1; > > +} > > + > > +if (filter->mark_flag =3D=3D 1) > > +ice_fdir_rx_parsing_enable(ad, 1); > > + > > +entry =3D rte_zmalloc("fdir_entry", sizeof(*entry), 0); > > +if (!entry) > > +return -rte_errno; > > + > > +rte_memcpy(entry, filter, sizeof(*filter)); > > + > > +filter->prof =3D NULL; > > +filter->pkt_buf =3D NULL; >=20 > Should we free filter here? as a copy of it already be assigned to flow- > >rule. Here we just free the two filter members of "filter", which are allocated b= y us in func ice_fdir_parse_pattern. Once the copy of "filter" to "entry" is ready, these two fields of "filter"= will belong to "entry". We set them to NULL to ensure that later free of meta ("filter") will not h= ave impact on "entry". >=20 > Actually the filter is assigned by meta, and it is created during > parse_pattern_action, and assume to be freed in create_filter. >=20 > Or we can assign meta to flow->rule directly, then we only need to free i= t > during destroy. The "filter" is assigned with a global variable in ice_fdir_parse with "*fi= lter =3D &pf->fdir.conf". So we cannot just assign meta to flow->rule directly. The copy of "filter" will be added into the list of flow and used later for= other purpose like destroy. >=20 > > + > > +flow->rule =3D entry; > > + > > +return 0; > > +} > > > > ice_fdir_extract_fltr_key(&key, filter); > > node =3D ice_fdir_entry_lookup(fdir_info, &key); @@ -1397,6 +1482,49 > > @@ ice_fdir_destroy_filter(struct ice_adapter *ad, > > > > filter =3D (struct ice_fdir_filter_conf *)flow->rule; > > > > +if (filter->parser_ena) { > > +struct ice_hw *hw =3D ICE_PF_TO_HW(pf); > > + > > +int id =3D ice_find_first_bit(filter->prof->ptypes, UINT16_MAX); > > +int ptg =3D hw->blk[ICE_BLK_FD].xlt1.t[id]; > > +u16 ctrl_vsi =3D pf->fdir.fdir_vsi->idx; > > +u16 main_vsi =3D pf->main_vsi->idx; > > +u16 vsi_num; > > + > > +ret =3D ice_fdir_add_del_raw(pf, filter, false); > > +if (ret) > > +return -rte_errno; > > + > > +struct ice_fdir_prof_info *pi =3D &ad->fdir_prof_info[ptg]; > > +if (pi->fdir_actived_cnt !=3D 0) { > > +pi->fdir_actived_cnt--; > > +if (!pi->fdir_actived_cnt) { > > +vsi_num =3D ice_get_hw_vsi_num(hw, ctrl_vsi); > > +ret =3D ice_rem_prof_id_flow(hw, ICE_BLK_FD, > > + vsi_num, id); > > +if (ret) > > +return -rte_errno; > > + > > +vsi_num =3D ice_get_hw_vsi_num(hw, main_vsi); > > +ret =3D ice_rem_prof_id_flow(hw, ICE_BLK_FD, > > + vsi_num, id); > > +if (ret) > > +return -rte_errno; > > +} > > +} > > + > > +if (filter->mark_flag =3D=3D 1) > > +ice_fdir_rx_parsing_enable(ad, 0); > > + > > +flow->rule =3D NULL; > > +filter->prof =3D NULL; > > +filter->pkt_buf =3D NULL; >=20 > Should we free the pkt_buf and prof before assign them to NULL. > They are created during parse_pattern but never be freed before. Since prof and pkt_buf is allocated by us, these two fields should also be = freed by us before freeing "filter". >=20 > > + > > +rte_free(filter); > > + > > +return 0; > > +} > > + >=20