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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DU0PR04MB9417.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 23773e2c-53e2-4dbc-bdee-08da4e825c9b X-MS-Exchange-CrossTenant-originalarrivaltime: 15 Jun 2022 03:51:43.2616 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: uLdbyiKqiETcGCBq5vU5xP9id1UIVSmFKfvvbcA6CbrjpcPTB9EKjKXK1LLo78o8LpXBIFjVwpIgnSTjyxsX6A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR04MB7867 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Subject: Re: [PATCH V4 1/7] dt-bindings: soc: add i.MX93 SRC >=20 > On Tue, Jun 14, 2022 at 11:22:43PM +0000, Peng Fan wrote: > > > Subject: Re: [PATCH V4 1/7] dt-bindings: soc: add i.MX93 SRC > > > > > > On Thu, Jun 09, 2022 at 08:50:54PM +0800, Peng Fan (OSS) wrote: > > > > From: Peng Fan > > > > > > > > Add bindings for i.MX93 System Reset Controller(SRC). SRC supports > > > > resets and power gating for mixes. > > > > > > > > Signed-off-by: Peng Fan > > > > --- > > > > .../bindings/power/fsl,imx93-src.yaml | 96 > > > +++++++++++++++++++ > > > > include/dt-bindings/power/fsl,imx93-power.h | 11 +++ > > > > 2 files changed, 107 insertions(+) create mode 100644 > > > > Documentation/devicetree/bindings/power/fsl,imx93-src.yaml > > > > create mode 100644 include/dt-bindings/power/fsl,imx93-power.h > > > > > > > > diff --git > > > > a/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml > > > > b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml > > > > new file mode 100644 > > > > index 000000000000..880500a841f7 > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml > > > > @@ -0,0 +1,96 @@ > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML > > > > +1.2 > > > > +--- > > > > +$id: > > > > +https://eur01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2= F > > > > +devi > > > > > > > > +cetree.org%2Fschemas%2Fpower%2Ffsl%2Cimx93-src.yaml%23&data=3D0 > > > 5%7C > > > > > > > > +01%7Cpeng.fan%40nxp.com%7Cbce11534c1f9456c1a4108da4e4e6d4d%7C6 > > > 86ea1d3 > > > > > > > > +bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637908395997226535%7CUnkn > > > own%7CTWF > > > > > > > > +pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVC > > > I6 > > > > > > > > +Mn0%3D%7C3000%7C%7C%7C&sdata=3DsTDHZ9BVww%2FFe2pwS%2Fjoz > > > HPwWRmkU1hi > > > > +966eGXzjFSk%3D&reserved=3D0 > > > > +$schema: > > > > +https://eur01.safelinks.protection.outlook.com/?url=3Dhttp%3A%2F%2= F > > > > +devi > > > > > > > > +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=3D05%7C01%7Cpeng > > > .fan% > > > > > > > > +40nxp.com%7Cbce11534c1f9456c1a4108da4e4e6d4d%7C686ea1d3bc2b4c6 > > > fa92cd9 > > > > > > > > +9c5c301635%7C0%7C0%7C637908395997226535%7CUnknown%7CTWFpbG > > > Zsb3d8eyJWI > > > > > > > > +joiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3 > > > 000% > > > > > > > > +7C%7C%7C&sdata=3DxAU2zmsZDWOtCndpmKvMScG1XqjytSUnXLvzxR40p > > > HY%3D& > > > > +;reserved=3D0 > > > > + > > > > +title: NXP i.MX93 System Reset Controller > > > > + > > > > +maintainers: > > > > + - Peng Fan > > > > + > > > > +description: | > > > > + The System Reset Controller (SRC) is responsible for the > > > > +generation of > > > > + all the system reset signals and boot argument latching. > > > > + > > > > + Its main functions are as follows, > > > > + - Deals with all global system reset sources from other modules, > > > > + and generates global system reset. > > > > + - Responsible for power gating of MIXs (Slices) and their memory > > > > + low power control. > > > > + > > > > +properties: > > > > + compatible: > > > > + items: > > > > + - const: fsl,imx93-src > > > > + - const: syscon > > > > + > > > > + reg: > > > > + maxItems: 1 > > > > + > > > > + slices: > > > > > > power-controller > > > > > > But if there aren't any other child nodes for the SRC, then why do > > > you need this level at all? If there are others, then your binding is > incomplete. > > > > Currently we not need other parts from driver, so I not add them. I > > just add mix slices with name "slices". For U-Boot, we are not using > > DTB for mem slices, so I not add mem slices. > > > > It has following mix slices. >=20 > What's a mix slice? i.MX9 has many logic block named [x]mix, such as wakeupmix, mediamix. One mix slice is for one mix block logic. >=20 > > 0 EdgeLock Enclave > > 1 AONMIX > > 2 WAKEUPMIX > > 3 DDRMIX > > 4 DDRPHY > > 5 MLMIX > > 6 NICMIX > > 7 HSIOMIX > > 8 MEDIAMIX > > 9 CM33MIX > > 10 CA55 core 0 > > 11 CA55 core 1 > > 12 CA55 cluster > > > > It has following mem slices: >=20 > What's a mem slice? >From HW perspective, registers are actually memory. So saying mem slice is for memory related stuff for a mix. >=20 > > 0 AONMIX memory > > 1 WAKEUPMIX memory > > 2 DDRMIX memory > > 3 DDRPHY memory > > 4 MLMIX memory > > 5 NICMIX memory > > 6 OCRAM > > 7 HSIOMIX memory > > 8 MEDIA memory > > 9 CA55 core 0 memory > > 10 CA55 core 1 memory > > 11 CA55 cluster memory > > 12 L3 cache > > > > It has some general purpose functions that could be covered by SRC > > node itself. >=20 > Please make bindings as complete as possible, not what some u-boot or lin= ux > currently uses or not. ok, got it. Then do you think following is ok? mix-slices: type: object description: list of power domains provided by this controller. properties: '#address-cells': const: 1 '#size-cells': const: 0 patternProperties: "power-domain@[0-9]$": $ref: /schemas/power/power-domain.yaml# type: object properties: '#power-domain-cells': const: 0 reg: description: | Power domain index. Valid values are defined in include/dt-bindings/power/imx93-power.h for fsl,imx93-src maxItems: 1 clocks: description: | A number of phandles to clocks that need to be enabled during domain power-up sequencing to ensure reset propagation into devices located inside this power domain. minItems: 1 maxItems: 5 required: - '#power-domain-cells' - reg mem-slices: type: object description: list of power domains provided by this controller. properties: '#address-cells': const: 1 '#size-cells': const: 0 patternProperties: "power-domain@[0-9]$": $ref: /schemas/power/power-domain.yaml# type: object properties: '#power-domain-cells': const: 0 reg: description: | Power domain index. Valid values are defined in include/dt-bindings/power/imx93-power.h for fsl,imx93-src maxItems: 1 clocks: description: | A number of phandles to clocks that need to be enabled during domain power-up sequencing to ensure reset propagation into devices located inside this power domain. minItems: 1 maxItems: 5 required: - '#power-domain-cells' - reg Thanks, Peng. >=20 > Rob From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AC4ACC433EF for ; Wed, 15 Jun 2022 03:53:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:In-Reply-To:References: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org > Subject: Re: [PATCH V4 1/7] dt-bindings: soc: add i.MX93 SRC > > On Tue, Jun 14, 2022 at 11:22:43PM +0000, Peng Fan wrote: > > > Subject: Re: [PATCH V4 1/7] dt-bindings: soc: add i.MX93 SRC > > > > > > On Thu, Jun 09, 2022 at 08:50:54PM +0800, Peng Fan (OSS) wrote: > > > > From: Peng Fan > > > > > > > > Add bindings for i.MX93 System Reset Controller(SRC). SRC supports > > > > resets and power gating for mixes. > > > > > > > > Signed-off-by: Peng Fan > > > > --- > > > > .../bindings/power/fsl,imx93-src.yaml | 96 > > > +++++++++++++++++++ > > > > include/dt-bindings/power/fsl,imx93-power.h | 11 +++ > > > > 2 files changed, 107 insertions(+) create mode 100644 > > > > Documentation/devicetree/bindings/power/fsl,imx93-src.yaml > > > > create mode 100644 include/dt-bindings/power/fsl,imx93-power.h > > > > > > > > diff --git > > > > a/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml > > > > b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml > > > > new file mode 100644 > > > > index 000000000000..880500a841f7 > > > > --- /dev/null > > > > +++ b/Documentation/devicetree/bindings/power/fsl,imx93-src.yaml > > > > @@ -0,0 +1,96 @@ > > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML > > > > +1.2 > > > > +--- > > > > +$id: > > > > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2F > > > > +devi > > > > > > > > +cetree.org%2Fschemas%2Fpower%2Ffsl%2Cimx93-src.yaml%23&data=0 > > > 5%7C > > > > > > > > +01%7Cpeng.fan%40nxp.com%7Cbce11534c1f9456c1a4108da4e4e6d4d%7C6 > > > 86ea1d3 > > > > > > > > +bc2b4c6fa92cd99c5c301635%7C0%7C0%7C637908395997226535%7CUnkn > > > own%7CTWF > > > > > > > > +pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVC > > > I6 > > > > > > > > +Mn0%3D%7C3000%7C%7C%7C&sdata=sTDHZ9BVww%2FFe2pwS%2Fjoz > > > HPwWRmkU1hi > > > > +966eGXzjFSk%3D&reserved=0 > > > > +$schema: > > > > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2F > > > > +devi > > > > > > > > +cetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cpeng > > > .fan% > > > > > > > > +40nxp.com%7Cbce11534c1f9456c1a4108da4e4e6d4d%7C686ea1d3bc2b4c6 > > > fa92cd9 > > > > > > > > +9c5c301635%7C0%7C0%7C637908395997226535%7CUnknown%7CTWFpbG > > > Zsb3d8eyJWI > > > > > > > > +joiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3 > > > 000% > > > > > > > > +7C%7C%7C&sdata=xAU2zmsZDWOtCndpmKvMScG1XqjytSUnXLvzxR40p > > > HY%3D& > > > > +;reserved=0 > > > > + > > > > +title: NXP i.MX93 System Reset Controller > > > > + > > > > +maintainers: > > > > + - Peng Fan > > > > + > > > > +description: | > > > > + The System Reset Controller (SRC) is responsible for the > > > > +generation of > > > > + all the system reset signals and boot argument latching. > > > > + > > > > + Its main functions are as follows, > > > > + - Deals with all global system reset sources from other modules, > > > > + and generates global system reset. > > > > + - Responsible for power gating of MIXs (Slices) and their memory > > > > + low power control. > > > > + > > > > +properties: > > > > + compatible: > > > > + items: > > > > + - const: fsl,imx93-src > > > > + - const: syscon > > > > + > > > > + reg: > > > > + maxItems: 1 > > > > + > > > > + slices: > > > > > > power-controller > > > > > > But if there aren't any other child nodes for the SRC, then why do > > > you need this level at all? If there are others, then your binding is > incomplete. > > > > Currently we not need other parts from driver, so I not add them. I > > just add mix slices with name "slices". For U-Boot, we are not using > > DTB for mem slices, so I not add mem slices. > > > > It has following mix slices. > > What's a mix slice? i.MX9 has many logic block named [x]mix, such as wakeupmix, mediamix. One mix slice is for one mix block logic. > > > 0 EdgeLock Enclave > > 1 AONMIX > > 2 WAKEUPMIX > > 3 DDRMIX > > 4 DDRPHY > > 5 MLMIX > > 6 NICMIX > > 7 HSIOMIX > > 8 MEDIAMIX > > 9 CM33MIX > > 10 CA55 core 0 > > 11 CA55 core 1 > > 12 CA55 cluster > > > > It has following mem slices: > > What's a mem slice? >From HW perspective, registers are actually memory. So saying mem slice is for memory related stuff for a mix. > > > 0 AONMIX memory > > 1 WAKEUPMIX memory > > 2 DDRMIX memory > > 3 DDRPHY memory > > 4 MLMIX memory > > 5 NICMIX memory > > 6 OCRAM > > 7 HSIOMIX memory > > 8 MEDIA memory > > 9 CA55 core 0 memory > > 10 CA55 core 1 memory > > 11 CA55 cluster memory > > 12 L3 cache > > > > It has some general purpose functions that could be covered by SRC > > node itself. > > Please make bindings as complete as possible, not what some u-boot or linux > currently uses or not. ok, got it. Then do you think following is ok? mix-slices: type: object description: list of power domains provided by this controller. properties: '#address-cells': const: 1 '#size-cells': const: 0 patternProperties: "power-domain@[0-9]$": $ref: /schemas/power/power-domain.yaml# type: object properties: '#power-domain-cells': const: 0 reg: description: | Power domain index. Valid values are defined in include/dt-bindings/power/imx93-power.h for fsl,imx93-src maxItems: 1 clocks: description: | A number of phandles to clocks that need to be enabled during domain power-up sequencing to ensure reset propagation into devices located inside this power domain. minItems: 1 maxItems: 5 required: - '#power-domain-cells' - reg mem-slices: type: object description: list of power domains provided by this controller. properties: '#address-cells': const: 1 '#size-cells': const: 0 patternProperties: "power-domain@[0-9]$": $ref: /schemas/power/power-domain.yaml# type: object properties: '#power-domain-cells': const: 0 reg: description: | Power domain index. Valid values are defined in include/dt-bindings/power/imx93-power.h for fsl,imx93-src maxItems: 1 clocks: description: | A number of phandles to clocks that need to be enabled during domain power-up sequencing to ensure reset propagation into devices located inside this power domain. minItems: 1 maxItems: 5 required: - '#power-domain-cells' - reg Thanks, Peng. > > Rob _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel