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([2601:646:c200:1ef2:8ca3:e740:b6fd:9350]) by smtp.gmail.com with ESMTPSA id u14sm22032051pfc.39.2021.02.16.08.57.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 16 Feb 2021 08:57:21 -0800 (PST) Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Andy Lutomirski Mime-Version: 1.0 (1.0) Subject: Re: AMD SEV-SNP/Intel TDX: validation of memory pages Date: Tue, 16 Feb 2021 08:57:18 -0800 Message-Id: References: <5ff9690f-331a-8322-3431-212b14f64fcc@redhat.com> Cc: Peter Zijlstra , Andi Kleen , Joerg Roedel , David Rientjes , Borislav Petkov , Andy Lutomirski , Sean Christopherson , Andrew Morton , "Kirill A. Shutemov" , Brijesh Singh , Tom Lendacky , Jon Grimm , Thomas Gleixner , Christoph Hellwig , Ingo Molnar , x86@kernel.org, linux-mm@kvack.org In-Reply-To: <5ff9690f-331a-8322-3431-212b14f64fcc@redhat.com> To: Paolo Bonzini X-Mailer: iPhone Mail (18D52) X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: > On Feb 16, 2021, at 7:59 AM, Paolo Bonzini wrote: >=20 > =EF=BB=BFOn 16/02/21 15:46, Peter Zijlstra wrote: >>> On Tue, Feb 16, 2021 at 06:27:41AM -0800, Andi Kleen wrote: >>> I think the IST solution should at least be explored before >>> dismissing it. It might be simpler than anything else (like >>> using new APIs) >> Have you seen the trainwreck bonzini proposed? >=20 > You had been suspiciously silent... Can one of you point me at the original proposal? >=20 >> The very simplest thing is saying no to TDX. >> That 'solution' also hard relies on #VE not nesting more than once, so >> lovely things like: #VE -> #DB -> #VE -> #NMI -> #VE, or #VE -> NMI -> >> #VE -> #MC -> #VE or any number of other possible 'fun' combinations >> _must_ not happen. >=20 > ... but no, this is not how it works. It is actually guaranteed that #VE d= oes not nest more than once, and that's the big difference with NMIs. >=20 > Let's look at the first case you listed, this is what would happen: >=20 >=20 > #VE handler starts on stack 1 > First #VE processing... > clear VE-in-progress flag in the info block (allowing reentrancy) > #DB handler starts > nested #VE handler starts on stack 2 > outer #VE handler marks stack 1 for reexecution > nested #VE handler ends *** > #DB handler ends > #VE handler IRETs back to the start of the handler itself > Second #VE processing starts (also on stack 1) > clear VE-in-progress flag in the info block > #NMI handler > nested #VE handler starts on stack 2 > outer #VE handler marks stack 1 for reexecution > nested #VE handler ends *** > #NMI handler ends > #VE handler IRETs back to the start of the handler itself This sounds suspiciously like the current NMI code. I want to look at the co= de. If nothing else, I suspect it=E2=80=99s busted wrt CET, but the current N= MI code definitely has bugs. For example, if we are about to IRET from NMI a= nd we get #VE in the IRET insn itself and then get a new NMI inside the #VE,= we are toast. > Third #VE processing starts (also on stack 1) > clear VE-in-progress flag in the info block > #VE handler IRETs back to the caller >=20 >=20 > Two things of note: >=20 > - note that at the points marked *** the nested #VE handler has not allowe= d another exception to come. That only happens in the outer handler. >=20 > - the inner handler does nothing but telling the outer handler to rerun. T= he way it does it is certainly not pretty, because it has to work at any ins= truction boundary, but at its heart it's basically a do{}while loop. >=20 > Paolo >=20 >> And yes, I know #MC isn't supported just now, but the above would >> mandate it never be supported _ever_, because otherwise the IST hack >> crumbles. >> Again, repeat after me: ISTs are a part of the problem. >> So how about fixing TDX instead of forcing us to do horrible fragile >> things we all know will end up in tears? >=20