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From: Mark Brown <broonie@kernel.org>
To: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>,
	Alex Deucher <alexander.deucher@amd.com>,
	Mark Brown <broonie@kernel.org>
Cc: alsa-devel@alsa-project.org
Subject: Applied "ASoC: dwc: add quirk for different register offset" to the asoc tree
Date: Mon, 07 Dec 2015 19:54:05 +0000	[thread overview]
Message-ID: <E1a61rJ-0003VE-Tb@debutante> (raw)
In-Reply-To: <1449272440-8735-5-git-send-email-alexander.deucher@amd.com>

The patch

   ASoC: dwc: add quirk for different register offset

has been applied to the asoc tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

>From e164835a0270cc01c93794536027cc70cd00d0ff Mon Sep 17 00:00:00 2001
From: Maruthi Srinivas Bayyavarapu <Maruthi.Bayyavarapu@amd.com>
Date: Fri, 4 Dec 2015 18:40:32 -0500
Subject: [PATCH] ASoC: dwc: add quirk for different register offset

DWC in ACP 2.x IP has different offsets for I2S_COMP_PARAM_* registers.
Added a quirk to support the same.

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 include/sound/designware_i2s.h |  5 +++++
 sound/soc/dwc/designware_i2s.c | 17 ++++++++++++++---
 2 files changed, 19 insertions(+), 3 deletions(-)

diff --git a/include/sound/designware_i2s.h b/include/sound/designware_i2s.h
index 8966ba7c9629..e0bb45807f29 100644
--- a/include/sound/designware_i2s.h
+++ b/include/sound/designware_i2s.h
@@ -45,6 +45,11 @@ struct i2s_platform_data {
 	u32 snd_fmts;
 	u32 snd_rates;
 
+	#define DW_I2S_QUIRK_COMP_REG_OFFSET	(1 << 0)
+	unsigned int quirks;
+	unsigned int i2s_reg_comp1;
+	unsigned int i2s_reg_comp2;
+
 	void *play_dma_data;
 	void *capture_dma_data;
 	bool (*filter)(struct dma_chan *chan, void *slave);
diff --git a/sound/soc/dwc/designware_i2s.c b/sound/soc/dwc/designware_i2s.c
index 3d7754c115ec..940c88136a34 100644
--- a/sound/soc/dwc/designware_i2s.c
+++ b/sound/soc/dwc/designware_i2s.c
@@ -94,6 +94,9 @@ struct dw_i2s_dev {
 	struct clk *clk;
 	int active;
 	unsigned int capability;
+	unsigned int quirks;
+	unsigned int i2s_reg_comp1;
+	unsigned int i2s_reg_comp2;
 	struct device *dev;
 
 	/* data related to DMA transfers b/w i2s and DMAC */
@@ -477,8 +480,8 @@ static int dw_configure_dai(struct dw_i2s_dev *dev,
 	 * Read component parameter registers to extract
 	 * the I2S block's configuration.
 	 */
-	u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1);
-	u32 comp2 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_2);
+	u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1);
+	u32 comp2 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp2);
 	u32 idx;
 
 	if (COMP1_TX_ENABLED(comp1)) {
@@ -521,7 +524,7 @@ static int dw_configure_dai_by_pd(struct dw_i2s_dev *dev,
 				   struct resource *res,
 				   const struct i2s_platform_data *pdata)
 {
-	u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1);
+	u32 comp1 = i2s_read_reg(dev->i2s_base, dev->i2s_reg_comp1);
 	u32 idx = COMP1_APB_DATA_WIDTH(comp1);
 	int ret;
 
@@ -625,6 +628,14 @@ static int dw_i2s_probe(struct platform_device *pdev)
 	if (pdata) {
 		dev->capability = pdata->cap;
 		clk_id = NULL;
+		dev->quirks = pdata->quirks;
+		if (dev->quirks & DW_I2S_QUIRK_COMP_REG_OFFSET) {
+			dev->i2s_reg_comp1 = pdata->i2s_reg_comp1;
+			dev->i2s_reg_comp2 = pdata->i2s_reg_comp2;
+		} else {
+			dev->i2s_reg_comp1 = I2S_COMP_PARAM_1;
+			dev->i2s_reg_comp2 = I2S_COMP_PARAM_2;
+		}
 		ret = dw_configure_dai_by_pd(dev, dw_i2s_dai, res, pdata);
 	} else {
 		clk_id = "i2sclk";
-- 
2.6.2

  reply	other threads:[~2015-12-07 19:54 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-04 23:40 [PATCH 00/13] Add ASoC support for AMD APUs [v5] Alex Deucher
2015-12-04 23:40 ` [PATCH 01/13] drm/amdgpu/cgs: add an interface to access PCI resources Alex Deucher
2015-12-04 23:40 ` [PATCH 02/13] drm/amdgpu: add irq domain support Alex Deucher
2015-12-04 23:40 ` [PATCH 03/13] ASoC: dwc: add runtime suspend/resume functionality Alex Deucher
2015-12-07 19:54   ` Applied "ASoC: dwc: add runtime suspend/resume functionality" to the asoc tree Mark Brown
2015-12-04 23:40 ` [PATCH 04/13] ASoC: dwc: add quirk for different register offset Alex Deucher
2015-12-07 19:54   ` Mark Brown [this message]
2015-12-04 23:40 ` [PATCH 05/13] ASoC: dwc: reconfigure dwc in 'resume' from 'suspend' Alex Deucher
2015-12-07 19:54   ` Applied "ASoC: dwc: reconfigure dwc in 'resume' from 'suspend'" to the asoc tree Mark Brown
2015-12-04 23:40 ` [PATCH 06/13] PM / Domains: export symbols to add/remove devices from genpd Alex Deucher
2015-12-18 11:25   ` Mark Brown
2015-12-04 23:40 ` [PATCH 07/13] drm/amd: add ACP driver support Alex Deucher
2015-12-04 23:40 ` [PATCH 08/13] drm/amd: add pm domain for ACP IP sub blocks Alex Deucher
2015-12-04 23:40 ` [PATCH 10/13] ASoC: AMD: add ACP 2.x IP DMA abstraction layer Alex Deucher
2015-12-18 11:22   ` Mark Brown
2015-12-04 23:40 ` [PATCH 11/13] ASoC: AMD: add AMD ASoC ACP 2.x DMA driver Alex Deucher
2015-12-18 12:04   ` Mark Brown
2015-12-04 23:40 ` [PATCH 12/13] ASoC: AMD: add pm ops Alex Deucher
2015-12-04 23:40 ` [PATCH 13/13] ASoC: AMD: Manage ACP 2.x SRAM banks power Alex Deucher
2015-12-18 12:08   ` Mark Brown
2015-12-18 12:09 ` [PATCH 00/13] Add ASoC support for AMD APUs [v5] Mark Brown
2015-12-21 19:08 ` Christian König

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