From mboxrd@z Thu Jan  1 00:00:00 1970
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Date: Sun, 06 Aug 2017 19:18:19 +0200
Subject: [U-Boot] [U-Boot, v4,
 44/66] rockchip: clk: rk3368: support configuring the DRAM PLL
 (from TPL)
In-Reply-To: <1501706105-7490-45-git-send-email-philipp.tomsich@theobroma-systems.com>
References: <1501706105-7490-45-git-send-email-philipp.tomsich@theobroma-systems.com>
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> As part of the DRAM initialisation process (running as part of the TPL
> stage) on the RK3368, we need to set up the DRAM PLL.
> 
> This implements support for configuring the PLL to for 1200, 1332 or
> 1600 MHz (i.e. for DDR3-1200, DDR3-1333, DDR3-1600 operating modes).
> 
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> 
> Reviewed-by: Simon Glass <sjg@chromium.org>
> ---
> 
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> 
>  drivers/clk/rockchip/clk_rk3368.c | 13 +++++++------
>  1 file changed, 7 insertions(+), 6 deletions(-)
> 

Applied to u-boot-rockchip, thanks!