[U-Boot] [PATCH 0/3] rockchip: Improve SDHCI throughput on the RK3399-Q7 (puma-rk3399)

[U-Boot] [PATCH 0/3] rockchip: Improve SDHCI throughput on the RK3399-Q7 (puma-rk3399)

[Philipp Tomsich]

This series
 - adds 8bit support for rockchip_sdhci.c on the RK3399
 - enables DMA for SDHCI on the RK3399-Q7

And while we're at it: we also add the Rockchip-specific wrapper to
the list of files maintained as part of the Rockchip sub-architecture.


Philipp Tomsich (3):
  rockchip: defconfig: puma-rk3399: enable DMA for SDHCI controller
  rockchip: mmc: update MAINTAINERS
  rockchip: sdhci: support 8bit bus-width

 MAINTAINERS                   | 2 ++
 configs/puma-rk3399_defconfig | 1 +
 drivers/mmc/rockchip_sdhci.c  | 8 ++++++++
 3 files changed, 11 insertions(+)

-- 
2.1.4

[U-Boot] [PATCH 1/3] rockchip: defconfig: puma-rk3399: enable DMA for SDHCI controller

[Philipp Tomsich]

For the RK3399-Q7, we have a fast eMMC connected in an 8 bit wide
configuration to the SDHCI controller (sdhci at fe330000).  Enable DMA
within the SDHCI driver to get the best performance out of it.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
---

 configs/puma-rk3399_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index a8b4bac..32aa72c 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -56,6 +56,7 @@ CONFIG_ROCKCHIP_EFUSE=y
 CONFIG_MMC_DW=y
 CONFIG_MMC_DW_ROCKCHIP=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
 CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
-- 
2.1.4

[U-Boot] [PATCH 2/3] rockchip: mmc: update MAINTAINERS

[Philipp Tomsich]

The Rockchip-specific wrappers to the DW-MMC and the SDHCI driver
were not covered as part of what's maintained by the architecture
maintainers.  Add them here.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
---

 MAINTAINERS | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 6c7f3ae..976341c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -159,6 +159,8 @@ F:	board/rockchip/
 F:	drivers/clk/rockchip/
 F:	drivers/gpio/rk_gpio.c
 F:	drivers/misc/rockchip-efuse.c
+F:	drivers/mmc/rockchip_sdhci.c
+F:	drivers/mmc/rockchip_dw_mmc.c
 F:	drivers/pinctrl/rockchip/
 F:	drivers/ram/rockchip/
 F:	drivers/sysreset/sysreset_rockchip.c
-- 
2.1.4

[U-Boot] [PATCH 3/3] rockchip: sdhci: support 8bit bus-width

[Philipp Tomsich]

The Rockchip-specific SDHCI wrapper does not process the 'bus-width'
property in the SDHCI node. Consequently, the bus is always kept in
4bit mode, even if 8bit wide operation is available, supported and
requested in the DTS.

This change adds processing of the 'bus-width' property and sets the
host capability flag for an 8bit wide bus, if set to 8. As the logic
in sdhci.c does not support clearing the 4bit capability, we assume
that 4bit operation is always supported.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

---

 drivers/mmc/rockchip_sdhci.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index be6edb2..ab89be4 100644
--- a/drivers/mmc/rockchip_sdhci.c
+++ b/drivers/mmc/rockchip_sdhci.c
@@ -62,6 +62,13 @@ static int arasan_sdhci_probe(struct udevice *dev)
 
 	host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD;
 	host->max_clk = max_frequency;
+	/*
+	 * The sdhci-driver only supports 4bit and 8bit, as sdhci_setup_cfg
+	 * doesn't allow us to clear MMC_MODE_4BIT.  Consequently, we don't
+	 * check for other bus-width values.
+	 */
+	if (host->bus_width == 8)
+		host->host_caps |= MMC_MODE_8BIT;
 
 	ret = sdhci_setup_cfg(&plat->cfg, host, 0, EMMC_MIN_FREQ);
 
@@ -82,6 +89,7 @@ static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
 
 	host->name = dev->name;
 	host->ioaddr = dev_read_addr_ptr(dev);
+	host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
 #endif
 
 	return 0;
-- 
2.1.4

[U-Boot] [U-Boot, 1/3] rockchip: defconfig: puma-rk3399: enable DMA for SDHCI controller

[Philipp Tomsich]

> For the RK3399-Q7, we have a fast eMMC connected in an 8 bit wide
> configuration to the SDHCI controller (sdhci at fe330000).  Enable DMA
> within the SDHCI driver to get the best performance out of it.
> 
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
> 
>  configs/puma-rk3399_defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 

Applied to u-boot-rockchip, thanks!

[U-Boot] [U-Boot,2/3] rockchip: mmc: update MAINTAINERS

[Philipp Tomsich]

> The Rockchip-specific wrappers to the DW-MMC and the SDHCI driver
> were not covered as part of what's maintained by the architecture
> maintainers.  Add them here.
> 
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
> 
>  MAINTAINERS | 2 ++
>  1 file changed, 2 insertions(+)
> 

Applied to u-boot-rockchip, thanks!

[U-Boot] [U-Boot,3/3] rockchip: sdhci: support 8bit bus-width

[Philipp Tomsich]

> The Rockchip-specific SDHCI wrapper does not process the 'bus-width'
> property in the SDHCI node. Consequently, the bus is always kept in
> 4bit mode, even if 8bit wide operation is available, supported and
> requested in the DTS.
> 
> This change adds processing of the 'bus-width' property and sets the
> host capability flag for an 8bit wide bus, if set to 8. As the logic
> in sdhci.c does not support clearing the 4bit capability, we assume
> that 4bit operation is always supported.
> 
> Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
> ---
> 
>  drivers/mmc/rockchip_sdhci.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 

Applied to u-boot-rockchip, thanks!